diff options
Diffstat (limited to 'VNFs/DPPD-PROX/prox_port_cfg.c')
| -rw-r--r-- | VNFs/DPPD-PROX/prox_port_cfg.c | 628 |
1 files changed, 557 insertions, 71 deletions
diff --git a/VNFs/DPPD-PROX/prox_port_cfg.c b/VNFs/DPPD-PROX/prox_port_cfg.c index c4787b1e..3b7f778d 100644 --- a/VNFs/DPPD-PROX/prox_port_cfg.c +++ b/VNFs/DPPD-PROX/prox_port_cfg.c @@ -1,5 +1,5 @@ /* -// Copyright (c) 2010-2017 Intel Corporation +// Copyright (c) 2010-2020 Intel Corporation // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -31,6 +31,9 @@ #endif #endif +#include <sys/ioctl.h> +#include <net/if.h> + #include "prox_port_cfg.h" #include "prox_globals.h" #include "log.h" @@ -40,8 +43,12 @@ #include "defines.h" #include "prox_cksum.h" #include "stats_irq.h" +#include "prox_compat.h" +#include "rte_ethdev.h" +#include "lconf.h" struct prox_port_cfg prox_port_cfg[PROX_MAX_PORTS]; + rte_atomic32_t lsc; int prox_nb_active_ports(void) @@ -102,10 +109,10 @@ void prox_pktmbuf_init(struct rte_mempool *mp, void *opaque_arg, void *_m, unsig struct rte_mbuf *mbuf = _m; #if RTE_VERSION >= RTE_VERSION_NUM(1,8,0,0) - mbuf->tx_offload = CALC_TX_OL(sizeof(struct ether_hdr), sizeof(struct ipv4_hdr)); + mbuf->tx_offload = CALC_TX_OL(sizeof(prox_rte_ether_hdr), sizeof(prox_rte_ipv4_hdr)); #else - mbuf->pkt.vlan_macip.f.l2_len = sizeof(struct ether_hdr); - mbuf->pkt.vlan_macip.f.l3_len = sizeof(struct ipv4_hdr); + mbuf->pkt.vlan_macip.f.l2_len = sizeof(prox_rte_ether_hdr); + mbuf->pkt.vlan_macip.f.l3_len = sizeof(prox_rte_ipv4_hdr); #endif rte_pktmbuf_init(mp, opaque_arg, mbuf, i); @@ -123,14 +130,159 @@ void prox_pktmbuf_reinit(void *arg, void *start, __attribute__((unused)) void *e prox_pktmbuf_init(init_args->mp, init_args->lconf, obj, idx); } +#define CONFIGURE_TX_OFFLOAD(flag) \ + if (port_cfg->requested_tx_offload & flag) {\ + if (port_cfg->disabled_tx_offload & flag) {\ + plog_info("\t\t%s disabled by configuration\n", #flag);\ + port_cfg->requested_tx_offload &= ~flag;\ + } else if (port_cfg->dev_info.tx_offload_capa & flag) {\ + port_cfg->port_conf.txmode.offloads |= flag;\ + plog_info("\t\t%s enabled on port\n", #flag);\ + } else if (port_cfg->dev_info.tx_queue_offload_capa & flag) {\ + port_cfg->tx_conf.offloads |= flag;\ + plog_info("\t\t%s enabled on queue\n", #flag);\ + } else {\ + port_cfg->requested_tx_offload &= ~flag;\ + plog_info("\t\t%s disabled as neither port or queue supports it\n", #flag);\ + }\ + } else {\ + plog_info("\t\t%s disabled\n", #flag);\ + }\ + +#define CONFIGURE_RX_OFFLOAD(flag) \ + if (port_cfg->requested_rx_offload & flag) {\ + if (port_cfg->dev_info.rx_offload_capa & flag) {\ + port_cfg->port_conf.rxmode.offloads |= flag;\ + plog_info("\t\t%s enabled on port\n", #flag);\ + } else if (port_cfg->dev_info.rx_queue_offload_capa & flag) {\ + port_cfg->rx_conf.offloads |= flag;\ + plog_info("\t\t%s enabled on queue\n", #flag);\ + } else {\ + port_cfg->requested_rx_offload &= ~flag;\ + plog_info("\t\t%s disabled as neither port or queue supports it\n", #flag);\ + }\ + } else {\ + plog_info("\t\t%s disabled\n", #flag);\ + }\ + +static inline uint32_t get_netmask(uint8_t prefix) +{ + if (prefix == 0) + return(~((uint32_t) -1)); + else + return rte_cpu_to_be_32(~((1 << (32 - prefix)) - 1)); +} + +static void set_ip_address(char *devname, uint32_t ip, uint8_t prefix) +{ + struct ifreq ifreq; + struct sockaddr_in in_addr; + int fd, rc; + uint32_t netmask = get_netmask(prefix); + plog_info("Setting netmask to %x\n", netmask); + uint32_t ip_cpu = rte_be_to_cpu_32(ip); + + fd = socket(AF_INET, SOCK_DGRAM, 0); + + memset(&ifreq, 0, sizeof(struct ifreq)); + memset(&in_addr, 0, sizeof(struct sockaddr_in)); + + in_addr.sin_family = AF_INET; + in_addr.sin_addr = *(struct in_addr *)&ip_cpu; + + prox_strncpy(ifreq.ifr_name, devname, IFNAMSIZ); + ifreq.ifr_addr = *(struct sockaddr *)&in_addr; + rc = ioctl(fd, SIOCSIFADDR, &ifreq); + PROX_PANIC(rc < 0, "Failed to set IP address %x on device %s: error = %d (%s)\n", ip_cpu, devname, errno, strerror(errno)); + + in_addr.sin_addr = *(struct in_addr *)&netmask; + ifreq.ifr_netmask = *(struct sockaddr *)&in_addr; + rc = ioctl(fd, SIOCSIFNETMASK, &ifreq); + PROX_PANIC(rc < 0, "Failed to set netmask %x (prefix %d) on device %s: error = %d (%s)\n", netmask, prefix, devname, errno, strerror(errno)); + close(fd); +} + /* initialize rte devices and check the number of available ports */ void init_rte_dev(int use_dummy_devices) { uint8_t nb_ports, port_id_max; - int port_id_last; + int port_id_last, rc = 0; struct rte_eth_dev_info dev_info; + const struct rte_pci_device *pci_dev; + + for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) { + if (prox_port_cfg[port_id].active && (prox_port_cfg[port_id].virtual == 0) && (port_id >= prox_rte_eth_dev_count_avail())) { + PROX_PANIC(1, "port %u used but only %u available\n", port_id, prox_rte_eth_dev_count_avail()); + } + } + for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) { + if (!prox_port_cfg[port_id].active) { + continue; + } + struct prox_port_cfg* port_cfg = &prox_port_cfg[port_id]; + + prox_port_cfg[port_id].n_vlans = 0; + while ((prox_port_cfg[port_id].n_vlans < PROX_MAX_VLAN_TAGS) && (prox_port_cfg[port_id].vlan_tags[prox_port_cfg[port_id].n_vlans])) { + prox_port_cfg[port_id].n_vlans++; + } - nb_ports = rte_eth_dev_count(); + if (port_cfg->vdev[0]) { + char name[MAX_NAME_BUFFER_SIZE], tap[MAX_NAME_SIZE]; + snprintf(tap, MAX_NAME_SIZE, "net_tap%d", port_id); +#if (RTE_VERSION > RTE_VERSION_NUM(17,5,0,1)) + snprintf(name, MAX_NAME_BUFFER_SIZE, "iface=%s", port_cfg->vdev); + rc = rte_vdev_init(tap, name); +#else + PROX_PANIC(1, "vdev not supported in DPDK < 17.05\n"); +#endif + PROX_PANIC(rc != 0, "Unable to create device %s %s\n", "net tap", port_cfg->vdev); + int vdev_port_id = prox_rte_eth_dev_count_avail() - 1; + PROX_PANIC(vdev_port_id >= PROX_MAX_PORTS, "Too many port defined %d >= %d\n", vdev_port_id, PROX_MAX_PORTS); + plog_info("\tCreating device %s, port %d\n", port_cfg->vdev, vdev_port_id); + prox_port_cfg[vdev_port_id].is_vdev = 1; + prox_port_cfg[vdev_port_id].active = 1; + prox_port_cfg[vdev_port_id].dpdk_mapping = port_id; + prox_port_cfg[vdev_port_id].n_txq = 1; + prox_port_cfg[vdev_port_id].n_vlans = prox_port_cfg[port_id].n_vlans; + + for (uint32_t tag_id = 0; tag_id < prox_port_cfg[port_id].n_vlans; tag_id++) { + prox_port_cfg[vdev_port_id].vlan_tags[tag_id] = prox_port_cfg[port_id].vlan_tags[tag_id]; + char command[1024]; + snprintf(prox_port_cfg[vdev_port_id].names[tag_id], MAX_NAME_BUFFER_SIZE, "%s_%d", port_cfg->vdev, prox_port_cfg[port_id].vlan_tags[tag_id]); + sprintf(command, "ip link add link %s name %s type vlan id %d", port_cfg->vdev, prox_port_cfg[vdev_port_id].names[tag_id], prox_port_cfg[port_id].vlan_tags[tag_id]); + system(command); + plog_info("\tRunning %s\n", command); + plog_info("\tUsing vlan tag %d - added device %s\n", prox_port_cfg[port_id].vlan_tags[tag_id], prox_port_cfg[vdev_port_id].names[tag_id]); + } + if (prox_port_cfg[port_id].n_vlans == 0) { + strncpy(prox_port_cfg[vdev_port_id].names[0], port_cfg->vdev, MAX_NAME_SIZE); + prox_port_cfg[vdev_port_id].n_vlans = 1; + prox_port_cfg[vdev_port_id].vlan_tags[0] = 0; + } + + prox_port_cfg[port_id].dpdk_mapping = vdev_port_id; + uint32_t i = 0; + while ((i < PROX_MAX_VLAN_TAGS) && (prox_port_cfg[port_id].ip_addr[i].ip)) { + prox_port_cfg[vdev_port_id].ip_addr[i].ip = prox_port_cfg[port_id].ip_addr[i].ip; + prox_port_cfg[vdev_port_id].ip_addr[i].prefix = prox_port_cfg[port_id].ip_addr[i].prefix; + i++; + } + prox_port_cfg[vdev_port_id].type = prox_port_cfg[port_id].type; + if (prox_port_cfg[vdev_port_id].type == PROX_PORT_MAC_HW) { + // If DPDK port MAC set to HW, then make sure the vdev has the same MAC as DPDK port + prox_port_cfg[vdev_port_id].type = PROX_PORT_MAC_SET; + rte_eth_macaddr_get(port_id, &prox_port_cfg[vdev_port_id].eth_addr); + plog_info("\tDPDK port %d MAC address pre-configured to MAC from port %d: "MAC_BYTES_FMT"\n", + vdev_port_id, port_id, MAC_BYTES(prox_port_cfg[vdev_port_id].eth_addr.addr_bytes)); + } else + memcpy(&prox_port_cfg[vdev_port_id].eth_addr, &prox_port_cfg[port_id].eth_addr, sizeof(prox_port_cfg[port_id].eth_addr)); + } + if (prox_port_cfg[port_id].n_vlans == 0) { + prox_port_cfg[port_id].n_vlans = 1; + prox_port_cfg[port_id].vlan_tags[0] = 0; + } + } + nb_ports = prox_rte_eth_dev_count_avail(); /* get available ports configuration */ PROX_PANIC(use_dummy_devices && nb_ports, "Can't use dummy devices while there are also real ports\n"); @@ -142,9 +294,9 @@ void init_rte_dev(int use_dummy_devices) char port_name[32] = "0dummy_dev"; for (uint32_t i = 0; i < nb_ports; ++i) { #if (RTE_VERSION > RTE_VERSION_NUM(17,5,0,1)) - rte_vdev_init(port_name, "size=ETHER_MIN_LEN,copy=0"); + rte_vdev_init(port_name, "size=64,copy=0"); #else - eth_dev_null_create(port_name, 0, ETHER_MIN_LEN, 0); + eth_dev_null_create(port_name, 0, PROX_RTE_ETHER_MIN_LEN, 0); #endif port_name[0]++; } @@ -163,46 +315,94 @@ void init_rte_dev(int use_dummy_devices) nb_ports = PROX_MAX_PORTS; } + +#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0)) + port_id_max = -1; + uint16_t id; + RTE_ETH_FOREACH_DEV(id) { + char name[256]; + rte_eth_dev_get_name_by_port(id, name); + plog_info("\tFound DPDK port id %u %s\n", id, name); + if (id >= PROX_MAX_PORTS) { + plog_warn("\tWarning: I can deal with at most %u ports." + " Please update PROX_MAX_PORTS and recompile.\n", PROX_MAX_PORTS); + } else { + prox_port_cfg[id].available = 1; + if (id > port_id_max) + port_id_max = id; + } + } +#else port_id_max = nb_ports - 1; +#endif + port_id_last = prox_last_port_active(); PROX_PANIC(port_id_last > port_id_max, "\tError: invalid port(s) specified, last port index active: %d (max index is %d)\n", port_id_last, port_id_max); /* Assign ports to PROX interfaces & Read max RX/TX queues per port */ - for (uint8_t port_id = 0; port_id < nb_ports; ++port_id) { +#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0)) + for (uint8_t port_id = 0; port_id <= port_id_last; ++port_id) { +#else + for (uint8_t port_id = 0; port_id <= nb_ports; ++port_id) { +#endif /* skip ports that are not enabled */ if (!prox_port_cfg[port_id].active) { continue; +#if (RTE_VERSION >= RTE_VERSION_NUM(17,5,0,0)) + } else if (prox_port_cfg[port_id].available == 0) { + PROX_PANIC(1, "port %u enabled but not available\n", port_id); +#endif } plog_info("\tGetting info for rte dev %u\n", port_id); rte_eth_dev_info_get(port_id, &dev_info); struct prox_port_cfg* port_cfg = &prox_port_cfg[port_id]; port_cfg->socket = -1; + memcpy(&port_cfg->dev_info, &dev_info, sizeof(struct rte_eth_dev_info)); port_cfg->max_txq = dev_info.max_tx_queues; port_cfg->max_rxq = dev_info.max_rx_queues; - - if (!dev_info.pci_dev) - continue; - - snprintf(port_cfg->pci_addr, sizeof(port_cfg->pci_addr), - "%04x:%02x:%02x.%1x", dev_info.pci_dev->addr.domain, dev_info.pci_dev->addr.bus, dev_info.pci_dev->addr.devid, dev_info.pci_dev->addr.function); - strncpy(port_cfg->driver_name, dev_info.driver_name, sizeof(port_cfg->driver_name)); + port_cfg->max_rx_pkt_len = dev_info.max_rx_pktlen; + port_cfg->min_rx_bufsize = dev_info.min_rx_bufsize; + port_cfg->min_tx_desc = dev_info.tx_desc_lim.nb_min; + port_cfg->max_tx_desc = dev_info.tx_desc_lim.nb_max; + port_cfg->min_rx_desc = dev_info.rx_desc_lim.nb_min; + port_cfg->max_rx_desc = dev_info.rx_desc_lim.nb_max; + + prox_strncpy(port_cfg->driver_name, dev_info.driver_name, sizeof(port_cfg->driver_name)); plog_info("\tPort %u : driver='%s' tx_queues=%d rx_queues=%d\n", port_id, !strcmp(port_cfg->driver_name, "")? "null" : port_cfg->driver_name, port_cfg->max_txq, port_cfg->max_rxq); + plog_info("\tPort %u : %d<=nb_tx_desc<=%d %d<=nb_rx_desc<=%d\n", port_id, port_cfg->min_tx_desc, port_cfg->max_tx_desc, port_cfg->min_rx_desc, port_cfg->max_rx_desc); if (strncmp(port_cfg->driver_name, "rte_", 4) == 0) { - strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name + 4, sizeof(port_cfg->short_name)); + prox_strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name + 4, sizeof(port_cfg->short_name)); } else if (strncmp(port_cfg->driver_name, "net_", 4) == 0) { - strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name + 4, sizeof(port_cfg->short_name)); + prox_strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name + 4, sizeof(port_cfg->short_name)); } else { - strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name, sizeof(port_cfg->short_name)); + prox_strncpy(port_cfg->short_name, prox_port_cfg[port_id].driver_name, sizeof(port_cfg->short_name)); } char *ptr; if ((ptr = strstr(port_cfg->short_name, "_pmd")) != NULL) { *ptr = '\x0'; } + // Set socket for vdev device identical to socket of corresponding port + if (prox_port_cfg[port_id].is_vdev) { + prox_port_cfg[port_id].socket = prox_port_cfg[prox_port_cfg[port_id].dpdk_mapping].socket; + continue; + } + +#if RTE_VERSION < RTE_VERSION_NUM(18,5,0,0) + pci_dev = dev_info.pci_dev; +#else + if (!dev_info.device) + continue; + pci_dev = RTE_DEV_TO_PCI(dev_info.device); +#endif + if (!pci_dev) + continue; + snprintf(port_cfg->pci_addr, sizeof(port_cfg->pci_addr), + "%04x:%02x:%02x.%1x", pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function); /* Try to find the device's numa node */ char buf[1024]; snprintf(buf, sizeof(buf), "/sys/bus/pci/devices/%s/numa_node", port_cfg->pci_addr); @@ -218,11 +418,21 @@ void init_rte_dev(int use_dummy_devices) fclose(numa_node_fd); } - if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM) { - port_cfg->capabilities.tx_offload_cksum |= IPV4_CKSUM; + // In DPDK 18.08 vmxnet3 reports it supports IPV4 checksum, but packets does not go through when IPv4 cksum is enabled + if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)) { + plog_info("\t\tDisabling IPV4 cksum on vmxnet3\n"); + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; } - if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM) { - port_cfg->capabilities.tx_offload_cksum |= UDP_CKSUM; + if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) { + plog_info("\t\tDisabling UDP cksum on vmxnet3\n"); + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM; + } + // Some OVS versions reports that they support UDP offload and no IPv4 offload, but fails when UDP offload is enabled + if ((!strcmp(port_cfg->short_name, "virtio")) && + ((port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) == 0) && + (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) { + plog_info("\t\tDisabling UDP cksum on virtio\n"); + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM; } } } @@ -246,7 +456,7 @@ uint8_t init_rte_ring_dev(void) struct rte_ring* tx_ring = rte_ring_lookup(port_cfg->tx_ring); PROX_PANIC(tx_ring == NULL, "Ring %s not found for port %d!\n", port_cfg->tx_ring, port_id); - int ret = rte_eth_from_rings(port_cfg->name, &rx_ring, 1, &tx_ring, 1, rte_socket_id()); + int ret = rte_eth_from_rings(port_cfg->names[0], &rx_ring, 1, &tx_ring, 1, rte_socket_id()); PROX_PANIC(ret != 0, "Failed to create eth_dev from rings for port %d\n", port_id); port_cfg->port_conf.intr_conf.lsc = 0; /* Link state interrupt not supported for ring-backed ports */ @@ -258,19 +468,167 @@ uint8_t init_rte_ring_dev(void) return nb_ring_dev; } -static void init_port(struct prox_port_cfg *port_cfg) +static void print_port_capa(struct prox_port_cfg *port_cfg) { - static char dummy_pool_name[] = "0_dummy"; - struct rte_eth_link link; uint8_t port_id; - int ret; port_id = port_cfg - prox_port_cfg; plog_info("\t*** Initializing port %u ***\n", port_id); - plog_info("\t\tPort name is set to %s\n", port_cfg->name); + plog_info("\t\tPort name is set to %s\n", port_cfg->names[0]); plog_info("\t\tPort max RX/TX queue is %u/%u\n", port_cfg->max_rxq, port_cfg->max_txq); plog_info("\t\tPort driver is %s\n", port_cfg->driver_name); +#if RTE_VERSION >= RTE_VERSION_NUM(16,4,0,0) + plog_info("\t\tSupported speed mask = 0x%x\n", port_cfg->dev_info.speed_capa); +#endif + if (port_cfg->max_link_speed != UINT32_MAX) { + plog_info("\t\tHighest link speed capa = %d Mbps\n", port_cfg->max_link_speed); + } + +#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) + plog_info("\t\tRX offload capa = 0x%lx = ", port_cfg->dev_info.rx_offload_capa); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) + plog_info("VLAN STRIP | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM) + plog_info("IPV4 CKSUM | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_UDP_CKSUM) + plog_info("UDP CKSUM | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_CKSUM) + plog_info("TCP CKSUM | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_LRO) + plog_info("TCP LRO | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_QINQ_STRIP) + plog_info("QINQ STRIP | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM) + plog_info("OUTER_IPV4_CKSUM | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_MACSEC_STRIP) + plog_info("MACSEC STRIP | "); +#if defined(RTE_ETH_RX_OFFLOAD_HEADER_SPLIT) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT) + plog_info("HEADER SPLIT | "); +#endif + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) + plog_info("VLAN FILTER | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) + plog_info("VLAN EXTEND | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME) + plog_info("JUMBO FRAME | "); +#if defined(RTE_ETH_RX_OFFLOAD_CRC_STRIP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_CRC_STRIP) + plog_info("CRC STRIP | "); +#endif +#if defined(RTE_ETH_RX_OFFLOAD_KEEP_CRC) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_KEEP_CRC) + plog_info("KEEP CRC | "); +#endif + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SCATTER) + plog_info("SCATTER | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TIMESTAMP) + plog_info("TIMESTAMP | "); + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SECURITY) + plog_info("SECURITY "); + plog_info("\n"); + + plog_info("\t\tTX offload capa = 0x%lx = ", port_cfg->dev_info.tx_offload_capa); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VLAN_INSERT) + plog_info("VLAN INSERT | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) + plog_info("IPV4 CKSUM | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM) + plog_info("UDP CKSUM | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_CKSUM) + plog_info("TCP CKSUM | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM) + plog_info("SCTP CKSUM | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_TSO) + plog_info("TCP TS0 | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TSO) + plog_info("UDP TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM) + plog_info("OUTER IPV4 CKSUM | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_QINQ_INSERT) + plog_info("QINQ INSERT | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO) + plog_info("VLAN TNL TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO) + plog_info("GRE TNL TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO) + plog_info("IPIP TNL TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO) + plog_info("GENEVE TNL TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MACSEC_INSERT) + plog_info("MACSEC INSERT | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE) + plog_info("MT LOCKFREE | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MULTI_SEGS) + plog_info("MULTI SEG | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SECURITY) + plog_info("SECURITY | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO) + plog_info("UDP TNL TSO | "); + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IP_TNL_TSO) + plog_info("IP TNL TSO | "); + plog_info("\n"); + + plog_info("\t\trx_queue_offload_capa = 0x%lx\n", port_cfg->dev_info.rx_queue_offload_capa); + plog_info("\t\ttx_queue_offload_capa = 0x%lx\n", port_cfg->dev_info.tx_queue_offload_capa); + plog_info("\t\tflow_type_rss_offloads = 0x%lx\n", port_cfg->dev_info.flow_type_rss_offloads); + plog_info("\t\tdefault RX port conf: burst_size = %d, ring_size = %d, nb_queues = %d\n", port_cfg->dev_info.default_rxportconf.burst_size, port_cfg->dev_info.default_rxportconf.ring_size, port_cfg->dev_info.default_rxportconf.nb_queues); + plog_info("\t\tdefault TX port conf: burst_size = %d, ring_size = %d, nb_queues = %d\n", port_cfg->dev_info.default_txportconf.burst_size, port_cfg->dev_info.default_txportconf.ring_size, port_cfg->dev_info.default_txportconf.nb_queues); +#endif +} + +static void get_max_link_speed(struct prox_port_cfg *port_cfg) +{ + port_cfg->max_link_speed = UINT32_MAX; + +#if RTE_VERSION >= RTE_VERSION_NUM(16,4,0,0) + // virtio and vmxnet3 reports fake max_link_speed + if (strcmp(port_cfg->short_name, "vmxnet3") && strcmp(port_cfg->short_name, "virtio")) { + // Get link_speed from highest capability from the port + // This will be used by gen and lat for extrapolation purposes + // The negotiated link_speed (as reported by rte_eth_link_get + // or rte_eth_link_get_nowait) might be reported too late + // and might result in wrong exrapolation, and hence should not be used + // for extrapolation purposes + if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_100G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_56G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_56G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_50G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_50G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_40G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_40G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_25G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_25G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_20G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_20G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_10G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_5G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_5G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_2_5G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_2_5G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_1G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_1G; + else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_100M_HD | RTE_ETH_LINK_SPEED_100M)) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100M; + else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_10M_HD | RTE_ETH_LINK_SPEED_10M)) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10M; + + } +#endif +} + +static void init_port(struct prox_port_cfg *port_cfg) +{ + static char dummy_pool_name[] = "0_dummy"; + struct rte_eth_link link; + uint8_t port_id; + int ret; + get_max_link_speed(port_cfg); + print_port_capa(port_cfg); + port_id = port_cfg - prox_port_cfg; PROX_PANIC(port_cfg->n_rxq == 0 && port_cfg->n_txq == 0, "\t\t port %u is enabled but no RX or TX queues have been configured", port_id); @@ -278,10 +636,10 @@ static void init_port(struct prox_port_cfg *port_cfg) /* not receiving on this port */ plog_info("\t\tPort %u had no RX queues, setting to 1\n", port_id); port_cfg->n_rxq = 1; - uint32_t mbuf_size = MBUF_SIZE; - if (strcmp(port_cfg->short_name, "vmxnet3") == 0) { - mbuf_size = MBUF_SIZE + RTE_PKTMBUF_HEADROOM; - } + uint32_t mbuf_size = TX_MBUF_SIZE; + if (mbuf_size < port_cfg->min_rx_bufsize + RTE_PKTMBUF_HEADROOM + sizeof(struct rte_mbuf)) + mbuf_size = port_cfg->min_rx_bufsize + RTE_PKTMBUF_HEADROOM + sizeof(struct rte_mbuf); + plog_info("\t\tAllocating dummy memory pool on socket %u with %u elements of size %u\n", port_cfg->socket, port_cfg->n_rxd, mbuf_size); port_cfg->pool[0] = rte_mempool_create(dummy_pool_name, port_cfg->n_rxd, mbuf_size, @@ -294,12 +652,15 @@ static void init_port(struct prox_port_cfg *port_cfg) port_cfg->socket, port_cfg->n_rxd); dummy_pool_name[0]++; } else { - // Most pmd do not support setting mtu yet... - if (!strcmp(port_cfg->short_name, "ixgbe")) { - plog_info("\t\tSetting MTU size to %u for port %u ...\n", port_cfg->mtu, port_id); - ret = rte_eth_dev_set_mtu(port_id, port_cfg->mtu); - PROX_PANIC(ret < 0, "\n\t\t\trte_eth_dev_set_mtu() failed on port %u: error %d\n", port_id, ret); + // Most pmd should now support setting mtu + if (port_cfg->mtu + PROX_RTE_ETHER_HDR_LEN + PROX_RTE_ETHER_CRC_LEN > port_cfg->max_rx_pkt_len) { + plog_info("\t\tMTU is too big for the port, reducing MTU from %d to %d\n", port_cfg->mtu, port_cfg->max_rx_pkt_len); + port_cfg->mtu = port_cfg->max_rx_pkt_len; } + plog_info("\t\tSetting MTU size to %u for port %u ...\n", port_cfg->mtu, port_id); + ret = rte_eth_dev_set_mtu(port_id, port_cfg->mtu); + if (ret) + plog_err("\t\t\trte_eth_dev_set_mtu() failed on port %u: error %d\n", port_id, ret); if (port_cfg->n_txq == 0) { /* not sending on this port */ @@ -310,15 +671,89 @@ static void init_port(struct prox_port_cfg *port_cfg) if (port_cfg->n_rxq > 1) { // Enable RSS if multiple receive queues - port_cfg->port_conf.rxmode.mq_mode |= ETH_MQ_RX_RSS; - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key = toeplitz_init_key; - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key_len = TOEPLITZ_KEY_LEN; + if (strcmp(port_cfg->short_name, "virtio")) { + port_cfg->port_conf.rxmode.mq_mode |= RTE_ETH_MQ_RX_RSS; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key = toeplitz_init_key; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key_len = TOEPLITZ_KEY_LEN; #if RTE_VERSION >= RTE_VERSION_NUM(2,0,0,0) - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IPV4|ETH_RSS_NONFRAG_IPV4_UDP; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP; #else - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP; +#endif + } + } + + // Make sure that the requested RSS offload is supported by the PMD +#if RTE_VERSION >= RTE_VERSION_NUM(2,0,0,0) + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf &= port_cfg->dev_info.flow_type_rss_offloads; +#endif + if (strcmp(port_cfg->short_name, "virtio")) { + plog_info("\t\t Enabling RSS rss_hf = 0x%lx (requested 0x%llx, supported 0x%lx)\n", port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf, RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP, port_cfg->dev_info.flow_type_rss_offloads); + } else { + plog_info("\t\t Not enabling RSS on virtio port"); + } + + // rxmode such as hw src strip +#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) +#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP) + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_CRC_STRIP); +#endif +#if defined (RTE_ETH_RX_OFFLOAD_KEEP_CRC) + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_KEEP_CRC); #endif + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_JUMBO_FRAME); + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_VLAN_STRIP); +#else + if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) { + port_cfg->port_conf.rxmode.hw_strip_crc = 1; + } + if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME) { + port_cfg->port_conf.rxmode.jumbo_frame = 1; } +#endif + + // IPV4, UDP, SCTP Checksums +#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_IPV4_CKSUM); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_UDP_CKSUM); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_VLAN_INSERT); +#else + if ((port_cfg->dev_info.tx_offload_capa & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) == 0) { + port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOOFFLOADS; + plog_info("\t\tDisabling TX offloads as pmd reports that it does not support them)\n"); + } + if (!strcmp(port_cfg->short_name, "vmxnet3")) { + port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOXSUMSCTP; + plog_info("\t\tDisabling SCTP offload on port %d as vmxnet3 does not support them\n", port_id); + } +#endif + // Multi Segments +#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MULTI_SEGS); +#else + if (!strcmp(port_cfg->short_name, "vmxnet3")) { + port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; + plog_info("\t\tDisabling TX multsegs on port %d as vmxnet3 does not support them\n", port_id); + } else if (port_cfg->tx_conf.txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS) + plog_info("\t\tDisabling TX multsegs on port %d\n", port_id); + else + plog_info("\t\tEnabling TX multsegs on port %d\n", port_id); + + if (port_cfg->tx_conf.txq_flags & ETH_TXQ_FLAGS_NOOFFLOADS) + plog_info("\t\tEnabling No TX offloads on port %d\n", port_id); + else + plog_info("\t\tTX offloads enabled on port %d\n", port_id); +#endif + + // Refcount +#if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE); +#else + if (port_cfg->tx_conf.txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) + plog_info("\t\tEnabling No refcnt on port %d\n", port_id); + else + plog_info("\t\tRefcnt enabled on port %d\n", port_id); +#endif plog_info("\t\tConfiguring port %u... with %u RX queues and %u TX queues\n", port_id, port_cfg->n_rxq, port_cfg->n_txq); @@ -343,12 +778,24 @@ static void init_port(struct prox_port_cfg *port_cfg) port_cfg->port_conf.intr_conf.lsc = port_cfg->lsc_val; plog_info("\t\tOverriding link state interrupt configuration to '%s'\n", port_cfg->lsc_val? "enabled" : "disabled"); } - if (!strcmp(port_cfg->short_name, "vmxnet3")) { - if (port_cfg->n_txd < 512) { - // Vmxnet3 driver requires minimum 512 tx descriptors - plog_info("\t\tNumber of TX descriptors is set to 512 (minimum required for vmxnet3\n"); - port_cfg->n_txd = 512; - } + if (port_cfg->n_txd < port_cfg->min_tx_desc) { + plog_info("\t\tNumber of TX descriptors is set to %d (minimum required for %s\n", port_cfg->min_tx_desc, port_cfg->short_name); + port_cfg->n_txd = port_cfg->min_tx_desc; + } + + if (port_cfg->n_rxd < port_cfg->min_rx_desc) { + plog_info("\t\tNumber of RX descriptors is set to %d (minimum required for %s\n", port_cfg->min_rx_desc, port_cfg->short_name); + port_cfg->n_rxd = port_cfg->min_rx_desc; + } + + if (port_cfg->n_txd > port_cfg->max_tx_desc) { + plog_info("\t\tNumber of TX descriptors is set to %d (maximum required for %s\n", port_cfg->max_tx_desc, port_cfg->short_name); + port_cfg->n_txd = port_cfg->max_tx_desc; + } + + if (port_cfg->n_rxd > port_cfg->max_rx_desc) { + plog_info("\t\tNumber of RX descriptors is set to %d (maximum required for %s\n", port_cfg->max_rx_desc, port_cfg->short_name); + port_cfg->n_rxd = port_cfg->max_rx_desc; } ret = rte_eth_dev_configure(port_id, port_cfg->n_rxq, @@ -361,36 +808,26 @@ static void init_port(struct prox_port_cfg *port_cfg) plog_info("\t\tMAC address set to "MAC_BYTES_FMT"\n", MAC_BYTES(port_cfg->eth_addr.addr_bytes)); + /* initialize TX queues first */ + for (uint16_t queue_id = 0; queue_id < port_cfg->n_txq; ++queue_id) { + plog_info("\t\tSetting up TX queue %u on socket %u with %u desc\n", + queue_id, port_cfg->socket, port_cfg->n_txd); + ret = rte_eth_tx_queue_setup(port_id, queue_id, port_cfg->n_txd, + port_cfg->socket, &port_cfg->tx_conf); + PROX_PANIC(ret < 0, "\t\t\trte_eth_tx_queue_setup() failed on port %u: error %d\n", port_id, ret); + } + /* initialize RX queues */ for (uint16_t queue_id = 0; queue_id < port_cfg->n_rxq; ++queue_id) { plog_info("\t\tSetting up RX queue %u on port %u on socket %u with %u desc (pool 0x%p)\n", queue_id, port_id, port_cfg->socket, port_cfg->n_rxd, port_cfg->pool[queue_id]); - ret = rte_eth_rx_queue_setup(port_id, queue_id, port_cfg->n_rxd, port_cfg->socket, &port_cfg->rx_conf, port_cfg->pool[queue_id]); - PROX_PANIC(ret < 0, "\t\t\trte_eth_rx_queue_setup() failed on port %u: error %s (%d)\n", port_id, strerror(-ret), ret); } - if (!strcmp(port_cfg->short_name, "virtio")) { - port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOOFFLOADS; - plog_info("\t\tDisabling TX offloads (virtio does not support TX offloads)\n"); - } - - if (!strcmp(port_cfg->short_name, "vmxnet3")) { - port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOOFFLOADS | ETH_TXQ_FLAGS_NOMULTSEGS; - plog_info("\t\tDisabling TX offloads and multsegs on port %d as vmxnet3 does not support them\n", port_id); - } - /* initialize one TX queue per logical core on each port */ - for (uint16_t queue_id = 0; queue_id < port_cfg->n_txq; ++queue_id) { - plog_info("\t\tSetting up TX queue %u on socket %u with %u desc\n", - queue_id, port_cfg->socket, port_cfg->n_txd); - ret = rte_eth_tx_queue_setup(port_id, queue_id, port_cfg->n_txd, - port_cfg->socket, &port_cfg->tx_conf); - PROX_PANIC(ret < 0, "\t\t\trte_eth_tx_queue_setup() failed on port %u: error %d\n", port_id, ret); - } plog_info("\t\tStarting up port %u ...", port_id); ret = rte_eth_dev_start(port_id); @@ -398,6 +835,11 @@ static void init_port(struct prox_port_cfg *port_cfg) PROX_PANIC(ret < 0, "\n\t\t\trte_eth_dev_start() failed on port %u: error %d\n", port_id, ret); plog_info(" done: "); + if (prox_port_cfg[port_id].is_vdev) { + for (int vlan_id = 0; vlan_id < prox_port_cfg[port_id].n_vlans; vlan_id++) { + set_ip_address(prox_port_cfg[port_id].names[vlan_id], prox_port_cfg[port_id].ip_addr[vlan_id].ip, prox_port_cfg[port_id].ip_addr[vlan_id].prefix); + } + } /* Getting link status can be done without waiting if Link State Interrupt is enabled since in that case, if the link is recognized as being down, an interrupt will notify that @@ -409,10 +851,11 @@ static void init_port(struct prox_port_cfg *port_cfg) port_cfg->link_up = link.link_status; port_cfg->link_speed = link.link_speed; + if (link.link_status) { plog_info("Link Up - speed %'u Mbps - %s\n", link.link_speed, - (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? + (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ? "full-duplex" : "half-duplex"); } else { @@ -428,21 +871,41 @@ static void init_port(struct prox_port_cfg *port_cfg) strcmp(port_cfg->short_name, "i40e") && strcmp(port_cfg->short_name, "i40e_vf") && strcmp(port_cfg->short_name, "vmxnet3")) { - for (uint8_t i = 0; i < 16; ++i) { + for (uint8_t i = 0; i < port_cfg->n_rxq; ++i) { ret = rte_eth_dev_set_rx_queue_stats_mapping(port_id, i, i); if (ret) { plog_info("\t\trte_eth_dev_set_rx_queue_stats_mapping() failed: error %d\n", ret); } + } + for (uint8_t i = 0; i < port_cfg->n_txq; ++i) { ret = rte_eth_dev_set_tx_queue_stats_mapping(port_id, i, i); if (ret) { plog_info("\t\trte_eth_dev_set_tx_queue_stats_mapping() failed: error %d\n", ret); } } } + if (port_cfg->nb_mc_addr) { + rte_eth_allmulticast_enable(port_id); + if ((ret = rte_eth_dev_set_mc_addr_list(port_id, port_cfg->mc_addr, port_cfg->nb_mc_addr)) != 0) { + plog_err("\t\trte_eth_dev_set_mc_addr_list returns %d on port %u\n", ret, port_id); + port_cfg->nb_mc_addr = 0; + rte_eth_allmulticast_disable(port_id); + plog_info("\t\tport %u NOT in multicast mode as failed to add mcast address\n", port_id); + } else { + plog_info("\t\trte_eth_dev_set_mc_addr_list(%d addr) on port %u\n", port_cfg->nb_mc_addr, port_id); + plog_info("\t\tport %u in multicast mode\n", port_id); + } + } } void init_port_all(void) { + enum rte_proc_type_t proc_type; + proc_type = rte_eal_process_type(); + if (proc_type == RTE_PROC_SECONDARY) { + plog_info("\tSkipping port initialization as secondary process\n"); + return; + } uint8_t max_port_idx = prox_last_port_active() + 1; for (uint8_t portid = 0; portid < max_port_idx; ++portid) { @@ -461,13 +924,29 @@ void close_ports_atexit(void) if (!prox_port_cfg[portid].active) { continue; } + plog_info("Closing port %u\n", portid); rte_eth_dev_close(portid); } + + if (lcore_cfg == NULL) + return; + + struct lcore_cfg *lconf = NULL; + struct task_args *targ; + while (core_targ_next(&lconf, &targ, 0) == 0) { + if (targ->pool) { + rte_mempool_free(targ->pool); + plog_info("freeing pool %p\n", targ->pool); + targ->pool = NULL; + } + } } void init_port_addr(void) { struct prox_port_cfg *port_cfg; + enum rte_proc_type_t proc_type; + int rc; for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) { if (!prox_port_cfg[port_id].active) { @@ -480,9 +959,16 @@ void init_port_addr(void) rte_eth_macaddr_get(port_id, &port_cfg->eth_addr); break; case PROX_PORT_MAC_RAND: - eth_random_addr(port_cfg->eth_addr.addr_bytes); + prox_rte_eth_random_addr(port_cfg->eth_addr.addr_bytes); break; case PROX_PORT_MAC_SET: + proc_type = rte_eal_process_type(); + if (proc_type == RTE_PROC_SECONDARY) { + plog_warn("\tport %u: unable to change port mac address as secondary process\n", port_id); + } else if ((rc = rte_eth_dev_default_mac_addr_set(port_id, &port_cfg->eth_addr)) != 0) + plog_warn("\tport %u: failed to set mac address. Error = %d\n", port_id, rc); + else + plog_info("Setting MAC to "MAC_BYTES_FMT"\n", MAC_BYTES(port_cfg->eth_addr.addr_bytes)); break; } } |