diff options
author | Xavier Simonart <simonartxavier@gmail.com> | 2022-02-20 00:50:56 +0000 |
---|---|---|
committer | Patrice Buriez <patrice.buriez@chenapan.org> | 2022-12-28 21:56:36 +0000 |
commit | 5efd9d81ff920b8eb546721eb6c2502ce6e887d3 (patch) | |
tree | 45d3bbe79e8977f44c9aa08e0bf98c990e89dcf5 /VNFs/DPPD-PROX | |
parent | b950110b2a8a23ac498deef1bebca643f80c38b1 (diff) |
Fix tons of deprecation warnings
reported since DPDK 20.11, 21.05, 21.11 and 22.03, and
turned into undeclared symbol errors with DPDK 22.11.
Signed-off-by: Xavier Simonart <simonartxavier@gmail.com>
Signed-off-by: Patrice Buriez <patrice.buriez@chenapan.org>
Change-Id: Ice9a0f662ee057211984f799010701cd81e5a4d0
Diffstat (limited to 'VNFs/DPPD-PROX')
-rw-r--r-- | VNFs/DPPD-PROX/commands.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/defaults.c | 6 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/display_ports.c | 14 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_cgnat.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_gen.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_ipv6_tunnel.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_master.c | 8 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_nat.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_qinq_decap4.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_qinq_encap4.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/handle_swap.c | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/main.c | 8 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_args.c | 26 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_cksum.c | 10 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_cksum.h | 2 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_compat.h | 384 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_ipv6.c | 8 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/prox_port_cfg.c | 176 | ||||
-rw-r--r-- | VNFs/DPPD-PROX/stats_port.c | 8 |
19 files changed, 515 insertions, 151 deletions
diff --git a/VNFs/DPPD-PROX/commands.c b/VNFs/DPPD-PROX/commands.c index 1c4d7020..af76a66e 100644 --- a/VNFs/DPPD-PROX/commands.c +++ b/VNFs/DPPD-PROX/commands.c @@ -1012,7 +1012,7 @@ void cmd_set_vlan_offload(uint8_t port_id, unsigned int val) } plog_info("setting vlan offload to %d\n", val); - if (val & ~(ETH_VLAN_STRIP_OFFLOAD | ETH_VLAN_FILTER_OFFLOAD | ETH_VLAN_EXTEND_OFFLOAD)) { + if (val & ~(RTE_ETH_VLAN_STRIP_OFFLOAD | RTE_ETH_VLAN_FILTER_OFFLOAD | RTE_ETH_VLAN_EXTEND_OFFLOAD)) { plog_info("wrong vlan offload value\n"); } int ret = rte_eth_dev_set_vlan_offload(port_id, val); diff --git a/VNFs/DPPD-PROX/defaults.c b/VNFs/DPPD-PROX/defaults.c index 77582c7e..ec45b784 100644 --- a/VNFs/DPPD-PROX/defaults.c +++ b/VNFs/DPPD-PROX/defaults.c @@ -230,9 +230,9 @@ void set_port_defaults(void) // CRC_STRIP becoming the default behavior in DPDK 18.08, and // DEV_RX_OFFLOAD_CRC_STRIP define has been deleted -#if defined (DEV_RX_OFFLOAD_CRC_STRIP) - prox_port_cfg[i].requested_rx_offload = DEV_RX_OFFLOAD_CRC_STRIP; +#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP) + prox_port_cfg[i].requested_rx_offload = RTE_ETH_RX_OFFLOAD_CRC_STRIP; #endif - prox_port_cfg[i].requested_tx_offload = DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM; + prox_port_cfg[i].requested_tx_offload = RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM; } } diff --git a/VNFs/DPPD-PROX/display_ports.c b/VNFs/DPPD-PROX/display_ports.c index 891ff6f6..d2140f1e 100644 --- a/VNFs/DPPD-PROX/display_ports.c +++ b/VNFs/DPPD-PROX/display_ports.c @@ -180,8 +180,8 @@ static void display_ports_draw_per_sec_stats(void) struct percent rx_percent; struct percent tx_percent; if (strcmp(prox_port_cfg[port_id].short_name, "i40e_vf") == 0) { -#if defined (DEV_RX_OFFLOAD_CRC_STRIP) - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_CRC_STRIP) { +#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP) + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) { rx_percent = calc_percent(last->rx_bytes - prev->rx_bytes + 20 * (last->rx_tot - prev->rx_tot), delta_t); tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 24 * (last->tx_tot - prev->tx_tot), delta_t); } else { @@ -189,7 +189,7 @@ static void display_ports_draw_per_sec_stats(void) tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 20 * (last->tx_tot - prev->tx_tot), delta_t); } } else { - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_CRC_STRIP) { + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) { rx_percent = calc_percent(last->rx_bytes - prev->rx_bytes + 24 * (last->rx_tot - prev->rx_tot), delta_t); tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 24 * (last->tx_tot - prev->tx_tot), delta_t); } else { @@ -198,8 +198,8 @@ static void display_ports_draw_per_sec_stats(void) } } #else -#if defined DEV_RX_OFFLOAD_KEEP_CRC - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_KEEP_CRC ) { +#if defined RTE_ETH_RX_OFFLOAD_KEEP_CRC + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_KEEP_CRC ) { rx_percent = calc_percent(last->rx_bytes - prev->rx_bytes + 20 * (last->rx_tot - prev->rx_tot), delta_t); tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 20 * (last->tx_tot - prev->tx_tot), delta_t); } else { @@ -207,7 +207,7 @@ static void display_ports_draw_per_sec_stats(void) tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 24 * (last->tx_tot - prev->tx_tot), delta_t); } } else { - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_KEEP_CRC ) { + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_KEEP_CRC ) { rx_percent = calc_percent(last->rx_bytes - prev->rx_bytes + 20 * (last->rx_tot - prev->rx_tot), delta_t); tx_percent = calc_percent(last->tx_bytes - prev->tx_bytes + 20 * (last->tx_tot - prev->tx_tot), delta_t); } else { @@ -216,7 +216,7 @@ static void display_ports_draw_per_sec_stats(void) } } #else -#error neither DEV_RX_OFFLOAD_CRC_STRIP or DEV_RX_OFFLOAD_KEEP_CRC is defined +#error neither RTE_ETH_RX_OFFLOAD_CRC_STRIP or RTE_ETH_RX_OFFLOAD_KEEP_CRC is defined #endif #endif diff --git a/VNFs/DPPD-PROX/handle_cgnat.c b/VNFs/DPPD-PROX/handle_cgnat.c index b3c22c41..03ea6dc8 100644 --- a/VNFs/DPPD-PROX/handle_cgnat.c +++ b/VNFs/DPPD-PROX/handle_cgnat.c @@ -964,7 +964,7 @@ static void init_task_nat(struct task_base *tbase, struct task_args *targ) struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - task->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } } diff --git a/VNFs/DPPD-PROX/handle_gen.c b/VNFs/DPPD-PROX/handle_gen.c index a67b6596..23112251 100644 --- a/VNFs/DPPD-PROX/handle_gen.c +++ b/VNFs/DPPD-PROX/handle_gen.c @@ -1781,7 +1781,7 @@ static void init_task_gen(struct task_base *tbase, struct task_args *targ) struct prox_port_cfg *port = find_reachable_port(targ); // TODO: check that all reachable ports have the same mtu... if (port) { - task->cksum_offload = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->cksum_offload = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); task->port = port; task->max_frame_size = port->mtu + PROX_RTE_ETHER_HDR_LEN + 2 * PROX_VLAN_TAG_SIZE; } else { diff --git a/VNFs/DPPD-PROX/handle_ipv6_tunnel.c b/VNFs/DPPD-PROX/handle_ipv6_tunnel.c index a99a8f96..1c99eb84 100644 --- a/VNFs/DPPD-PROX/handle_ipv6_tunnel.c +++ b/VNFs/DPPD-PROX/handle_ipv6_tunnel.c @@ -167,7 +167,7 @@ static void init_task_ipv6_tun_base(struct task_ipv6_tun_base* tun_base, struct struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - tun_base->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + tun_base->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } } diff --git a/VNFs/DPPD-PROX/handle_master.c b/VNFs/DPPD-PROX/handle_master.c index b72fd2c5..a1c10d50 100644 --- a/VNFs/DPPD-PROX/handle_master.c +++ b/VNFs/DPPD-PROX/handle_master.c @@ -261,7 +261,7 @@ static inline void handle_arp_request(struct task_base *tbase, struct rte_mbuf * plogx_dbg("\tMaster handling ARP request for ip "IPv4_BYTES_FMT" on port %d which supports random ip\n", IP4(key.ip), key.port); struct rte_ring *ring = task->internal_port_table[port].ring; create_mac(arp, &mac); - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); build_arp_reply(ether_hdr, &mac, arp); tx_ring(tbase, ring, SEND_ARP_REPLY_FROM_MASTER, mbuf); return; @@ -276,7 +276,7 @@ static inline void handle_arp_request(struct task_base *tbase, struct rte_mbuf * tx_drop(mbuf); } else { struct rte_ring *ring = task->internal_ip_table[ret].ring; - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); build_arp_reply(ether_hdr, &task->internal_ip_table[ret].mac, arp); tx_ring(tbase, ring, SEND_ARP_REPLY_FROM_MASTER, mbuf); } @@ -341,7 +341,7 @@ static inline void handle_unknown_ip(struct task_base *tbase, struct rte_mbuf *m return; } // We send an ARP request even if one was just sent (and not yet answered) by another task - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); build_arp_request(mbuf, &task->internal_port_table[port].mac, ip_dst, ip_src, vlan); tx_ring(tbase, ring, SEND_ARP_REQUEST_FROM_MASTER, mbuf); } @@ -370,7 +370,7 @@ static inline void build_icmp_reply_message(struct task_base *tbase, struct rte_ tx_drop(mbuf); } else { struct rte_ring *ring = task->internal_ip_table[ret].ring; - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); tx_ring(tbase, ring, SEND_ICMP_FROM_MASTER, mbuf); } } diff --git a/VNFs/DPPD-PROX/handle_nat.c b/VNFs/DPPD-PROX/handle_nat.c index 83c9ebc5..93559143 100644 --- a/VNFs/DPPD-PROX/handle_nat.c +++ b/VNFs/DPPD-PROX/handle_nat.c @@ -171,7 +171,7 @@ static void init_task_nat(struct task_base *tbase, struct task_args *targ) PROX_PANIC(ret != 0, "Failed to load NAT table from lua:\n%s\n", get_lua_to_errors()); struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - task->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } } diff --git a/VNFs/DPPD-PROX/handle_qinq_decap4.c b/VNFs/DPPD-PROX/handle_qinq_decap4.c index d74e622e..2a5bfc7f 100644 --- a/VNFs/DPPD-PROX/handle_qinq_decap4.c +++ b/VNFs/DPPD-PROX/handle_qinq_decap4.c @@ -148,7 +148,7 @@ static void init_task_qinq_decap4(struct task_base *tbase, struct task_args *tar struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - task->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } // By default, calling this function 1K times per second => 64K ARP per second max diff --git a/VNFs/DPPD-PROX/handle_qinq_encap4.c b/VNFs/DPPD-PROX/handle_qinq_encap4.c index ffd9356a..0b707b7a 100644 --- a/VNFs/DPPD-PROX/handle_qinq_encap4.c +++ b/VNFs/DPPD-PROX/handle_qinq_encap4.c @@ -152,7 +152,7 @@ static void init_task_qinq_encap4(struct task_base *tbase, struct task_args *tar struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - task->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } /* TODO: check if it is not necessary to limit reverse mapping diff --git a/VNFs/DPPD-PROX/handle_swap.c b/VNFs/DPPD-PROX/handle_swap.c index b7a82d03..503af598 100644 --- a/VNFs/DPPD-PROX/handle_swap.c +++ b/VNFs/DPPD-PROX/handle_swap.c @@ -572,7 +572,7 @@ static void init_task_swap(struct task_base *tbase, struct task_args *targ) struct prox_port_cfg *port = find_reachable_port(targ); if (port) { - task->offload_crc = port->requested_tx_offload & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + task->offload_crc = port->requested_tx_offload & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } task->store_pkt_id = 0; if (targ->store_max) { diff --git a/VNFs/DPPD-PROX/main.c b/VNFs/DPPD-PROX/main.c index ebb861c0..66fe63ef 100644 --- a/VNFs/DPPD-PROX/main.c +++ b/VNFs/DPPD-PROX/main.c @@ -307,7 +307,7 @@ static void configure_if_tx_queues(struct task_args *targ, uint8_t socket) } #else if (chain_flag_always_set(targ, TASK_FEATURE_TXQ_FLAGS_NOOFFLOADS)) { - prox_port_cfg[if_port].requested_tx_offload &= ~(DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM); + prox_port_cfg[if_port].requested_tx_offload &= ~(RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM); } #endif } @@ -425,12 +425,12 @@ static void configure_tx_queue_flags(void) prox_port_cfg[if_port].tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOREFCOUNT; } #else - /* Set the DEV_TX_OFFLOAD_MBUF_FAST_FREE flag if none of + /* Set the RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE flag if none of the tasks up to the task transmitting to the port use refcnt and per-queue all mbufs comes from the same mempool. */ if (chain_flag_never_set(targ, TASK_FEATURE_TXQ_FLAGS_REFCOUNT)) { if (chain_flag_never_set(targ, TASK_FEATURE_TXQ_FLAGS_MULTIPLE_MEMPOOL)) - prox_port_cfg[if_port].requested_tx_offload |= DEV_TX_OFFLOAD_MBUF_FAST_FREE; + prox_port_cfg[if_port].requested_tx_offload |= RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; } #endif } @@ -455,7 +455,7 @@ static void configure_multi_segments(void) #else // We enable "multi segment" if at least one task requires it in the chain of tasks. if (chain_flag_sometimes_set(targ, TASK_FEATURE_TXQ_FLAGS_MULTSEGS)) { - prox_port_cfg[if_port].requested_tx_offload |= DEV_TX_OFFLOAD_MULTI_SEGS; + prox_port_cfg[if_port].requested_tx_offload |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS; } #endif } diff --git a/VNFs/DPPD-PROX/prox_args.c b/VNFs/DPPD-PROX/prox_args.c index 09e903b5..3d5bcf79 100644 --- a/VNFs/DPPD-PROX/prox_args.c +++ b/VNFs/DPPD-PROX/prox_args.c @@ -610,18 +610,18 @@ static int get_port_cfg(unsigned sindex, char *str, void *data) if (parse_bool(&val, pkey)) { return -1; } -#if defined(DEV_RX_OFFLOAD_CRC_STRIP) +#if defined(RTE_ETH_RX_OFFLOAD_CRC_STRIP) if (val) - cfg->requested_rx_offload |= DEV_RX_OFFLOAD_CRC_STRIP; + cfg->requested_rx_offload |= RTE_ETH_RX_OFFLOAD_CRC_STRIP; else - cfg->requested_rx_offload &= ~DEV_RX_OFFLOAD_CRC_STRIP; + cfg->requested_rx_offload &= ~RTE_ETH_RX_OFFLOAD_CRC_STRIP; #else -#if defined (DEV_RX_OFFLOAD_KEEP_CRC) +#if defined (RTE_ETH_RX_OFFLOAD_KEEP_CRC) if (val) - cfg->requested_rx_offload &= ~DEV_RX_OFFLOAD_KEEP_CRC; + cfg->requested_rx_offload &= ~RTE_ETH_RX_OFFLOAD_KEEP_CRC; else + cfg->requested_rx_offload |= RTE_ETH_RX_OFFLOAD_KEEP_CRC; #endif - cfg->requested_rx_offload |= DEV_RX_OFFLOAD_KEEP_CRC; #endif } @@ -635,11 +635,11 @@ static int get_port_cfg(unsigned sindex, char *str, void *data) return -1; } if (val) { - cfg->requested_rx_offload |= DEV_RX_OFFLOAD_VLAN_STRIP; - cfg->requested_tx_offload |= DEV_TX_OFFLOAD_VLAN_INSERT; + cfg->requested_rx_offload |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP; + cfg->requested_tx_offload |= RTE_ETH_TX_OFFLOAD_VLAN_INSERT; } else { - cfg->requested_rx_offload &= ~DEV_RX_OFFLOAD_VLAN_STRIP; - cfg->requested_tx_offload &= ~DEV_TX_OFFLOAD_VLAN_INSERT; + cfg->requested_rx_offload &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP; + cfg->requested_tx_offload &= ~RTE_ETH_TX_OFFLOAD_VLAN_INSERT; } #else plog_warn("vlan option not supported : update DPDK at least to 18.08 to support this option\n"); @@ -662,7 +662,7 @@ static int get_port_cfg(unsigned sindex, char *str, void *data) cfg->port_conf.rxmode.mtu = cfg->mtu; if (cfg->port_conf.rxmode.mtu > PROX_RTE_ETHER_MAX_LEN - PROX_RTE_ETHER_HDR_LEN - PROX_RTE_ETHER_CRC_LEN) #endif - cfg->requested_rx_offload |= DEV_RX_OFFLOAD_JUMBO_FRAME; + cfg->requested_rx_offload |= RTE_ETH_RX_OFFLOAD_JUMBO_FRAME; } } @@ -672,8 +672,8 @@ static int get_port_cfg(unsigned sindex, char *str, void *data) return -1; } if (val) { - cfg->port_conf.rxmode.mq_mode = ETH_MQ_RX_RSS; - cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IPV4; + cfg->port_conf.rxmode.mq_mode = RTE_ETH_MQ_RX_RSS; + cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IPV4; } } else if (STR_EQ(str, "rx_ring")) { diff --git a/VNFs/DPPD-PROX/prox_cksum.c b/VNFs/DPPD-PROX/prox_cksum.c index 11d37a6c..401191f6 100644 --- a/VNFs/DPPD-PROX/prox_cksum.c +++ b/VNFs/DPPD-PROX/prox_cksum.c @@ -91,14 +91,14 @@ static inline void prox_write_tcp_pseudo_hdr(prox_rte_tcp_hdr *tcp, uint16_t len inline void prox_ip_udp_cksum(struct rte_mbuf *mbuf, prox_rte_ipv4_hdr *pip, uint16_t l2_len, uint16_t l3_len, int cksum_offload) { - prox_ip_cksum(mbuf, pip, l2_len, l3_len, cksum_offload & DEV_TX_OFFLOAD_IPV4_CKSUM); + prox_ip_cksum(mbuf, pip, l2_len, l3_len, cksum_offload & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM); uint32_t l4_len = rte_bswap16(pip->total_length) - l3_len; if (pip->next_proto_id == IPPROTO_UDP) { prox_rte_udp_hdr *udp = (prox_rte_udp_hdr *)(((uint8_t*)pip) + l3_len); #ifndef SOFT_CRC - if (cksum_offload & DEV_TX_OFFLOAD_UDP_CKSUM) { - mbuf->ol_flags |= PKT_TX_UDP_CKSUM; + if (cksum_offload & RTE_ETH_TX_OFFLOAD_UDP_CKSUM) { + mbuf->ol_flags |= RTE_MBUF_F_TX_UDP_CKSUM; prox_write_udp_pseudo_hdr(udp, l4_len, pip->src_addr, pip->dst_addr); } else #endif @@ -106,9 +106,9 @@ inline void prox_ip_udp_cksum(struct rte_mbuf *mbuf, prox_rte_ipv4_hdr *pip, uin } else if (pip->next_proto_id == IPPROTO_TCP) { prox_rte_tcp_hdr *tcp = (prox_rte_tcp_hdr *)(((uint8_t*)pip) + l3_len); #ifndef SOFT_CRC - if (cksum_offload & DEV_TX_OFFLOAD_TCP_CKSUM) { + if (cksum_offload & RTE_ETH_TX_OFFLOAD_TCP_CKSUM) { prox_write_tcp_pseudo_hdr(tcp, l4_len, pip->src_addr, pip->dst_addr); - mbuf->ol_flags |= PKT_TX_UDP_CKSUM; + mbuf->ol_flags |= RTE_MBUF_F_TX_UDP_CKSUM; } else #endif prox_tcp_cksum_sw(tcp, l4_len, pip->src_addr, pip->dst_addr); diff --git a/VNFs/DPPD-PROX/prox_cksum.h b/VNFs/DPPD-PROX/prox_cksum.h index 03be595a..d4ac5a6b 100644 --- a/VNFs/DPPD-PROX/prox_cksum.h +++ b/VNFs/DPPD-PROX/prox_cksum.h @@ -42,7 +42,7 @@ static void prox_ip_cksum_hw(struct rte_mbuf *mbuf, uint16_t l2_len, uint16_t l3 #else mbuf->tx_offload = CALC_TX_OL(l2_len, l3_len); #endif - mbuf->ol_flags |= PKT_TX_IP_CKSUM; + mbuf->ol_flags |= RTE_MBUF_F_TX_IP_CKSUM; } void prox_ip_cksum_sw(prox_rte_ipv4_hdr *buf); diff --git a/VNFs/DPPD-PROX/prox_compat.h b/VNFs/DPPD-PROX/prox_compat.h index 4f5fa321..d4b7f247 100644 --- a/VNFs/DPPD-PROX/prox_compat.h +++ b/VNFs/DPPD-PROX/prox_compat.h @@ -153,16 +153,6 @@ static void *prox_rte_table_create(struct prox_rte_table_params *params, int soc #define rte_cryptodev_sym_get_private_session_size rte_cryptodev_get_private_session_size #endif -#ifndef DEV_RX_OFFLOAD_JUMBO_FRAME -#define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800 -#endif - -#ifndef DEV_RX_OFFLOAD_KEEP_CRC -#ifndef DEV_RX_OFFLOAD_CRC_STRIP -#define DEV_RX_OFFLOAD_CRC_STRIP 0x00001000 -#endif -#endif - #if RTE_VERSION < RTE_VERSION_NUM(19,2,0,0) #define RTE_COLOR_GREEN e_RTE_METER_GREEN #define RTE_COLOR_YELLOW e_RTE_METER_YELLOW @@ -295,4 +285,378 @@ static int prox_rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pa #define prox_rte_eth_dev_count_avail() rte_eth_dev_count_avail() #endif +// deal with RTE_DEPRECATED symbols + +#if RTE_VERSION < RTE_VERSION_NUM(20,11,0,0) +#define SKIP_MAIN SKIP_MASTER +#define CALL_MAIN CALL_MASTER +#define RTE_DEVTYPE_ALLOWED RTE_DEVTYPE_WHITELISTED_PCI +#define RTE_DEVTYPE_BLOCKED RTE_DEVTYPE_BLACKLISTED_PCI +#define RTE_LCORE_FOREACH_WORKER RTE_LCORE_FOREACH_SLAVE +#if RTE_VERSION >= RTE_VERSION_NUM(17,8,0,0) +#define RTE_DEV_ALLOWED RTE_DEV_WHITELISTED +#define RTE_DEV_BLOCKED RTE_DEV_BLACKLISTED +#define RTE_BUS_SCAN_ALLOWLIST RTE_BUS_SCAN_WHITELIST +#define RTE_BUS_SCAN_BLOCKLIST RTE_BUS_SCAN_BLACKLIST +#endif +#endif + +#if RTE_VERSION < RTE_VERSION_NUM(21,5,0,0) +#define RTE_PCI_ANY_ID PCI_ANY_ID +#define PKT_RX_OUTER_IP_CKSUM_BAD PKT_RX_EIP_CKSUM_BAD +#endif + +#if RTE_VERSION < RTE_VERSION_NUM(21,11,0,0) +#define RTE_MEMPOOL_HEADER_SIZE MEMPOOL_HEADER_SIZE +#define RTE_MBUF_F_RX_RSS_HASH PKT_RX_RSS_HASH +#define RTE_MBUF_F_RX_FDIR PKT_RX_FDIR +#define RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD PKT_RX_OUTER_IP_CKSUM_BAD +#define RTE_MBUF_F_RX_IP_CKSUM_BAD PKT_RX_IP_CKSUM_BAD +#define RTE_MBUF_F_RX_L4_CKSUM_BAD PKT_RX_L4_CKSUM_BAD +#define RTE_MBUF_F_RX_IEEE1588_PTP PKT_RX_IEEE1588_PTP +#define RTE_MBUF_F_RX_IEEE1588_TMST PKT_RX_IEEE1588_TMST +#define RTE_MBUF_F_RX_FDIR_ID PKT_RX_FDIR_ID +#define RTE_MBUF_F_RX_FDIR_FLX PKT_RX_FDIR_FLX +#define RTE_MBUF_F_TX_QINQ PKT_TX_QINQ_PKT +#define RTE_MBUF_F_TX_TCP_SEG PKT_TX_TCP_SEG +#define RTE_MBUF_F_TX_IEEE1588_TMST PKT_TX_IEEE1588_TMST +#define RTE_MBUF_F_TX_L4_NO_CKSUM PKT_TX_L4_NO_CKSUM +#define RTE_MBUF_F_TX_TCP_CKSUM PKT_TX_TCP_CKSUM +#define RTE_MBUF_F_TX_SCTP_CKSUM PKT_TX_SCTP_CKSUM +#define RTE_MBUF_F_TX_UDP_CKSUM PKT_TX_UDP_CKSUM +#define RTE_MBUF_F_TX_L4_MASK PKT_TX_L4_MASK +#define RTE_MBUF_F_TX_IP_CKSUM PKT_TX_IP_CKSUM +#define RTE_MBUF_F_TX_IPV4 PKT_TX_IPV4 +#define RTE_MBUF_F_TX_IPV6 PKT_TX_IPV6 +#define RTE_MBUF_F_TX_VLAN PKT_TX_VLAN_PKT +#define RTE_MBUF_F_TX_OUTER_IP_CKSUM PKT_TX_OUTER_IP_CKSUM +#define RTE_MBUF_F_TX_OUTER_IPV4 PKT_TX_OUTER_IPV4 +#define RTE_MBUF_F_TX_OUTER_IPV6 PKT_TX_OUTER_IPV6 +#define RTE_MBUF_F_INDIRECT IND_ATTACHED_MBUF +#define RTE_ETH_LINK_SPEED_AUTONEG ETH_LINK_SPEED_AUTONEG +#define RTE_ETH_LINK_SPEED_FIXED ETH_LINK_SPEED_FIXED +#define RTE_ETH_LINK_SPEED_10M_HD ETH_LINK_SPEED_10M_HD +#define RTE_ETH_LINK_SPEED_10M ETH_LINK_SPEED_10M +#define RTE_ETH_LINK_SPEED_100M_HD ETH_LINK_SPEED_100M_HD +#define RTE_ETH_LINK_SPEED_100M ETH_LINK_SPEED_100M +#define RTE_ETH_LINK_SPEED_1G ETH_LINK_SPEED_1G +#define RTE_ETH_LINK_SPEED_2_5G ETH_LINK_SPEED_2_5G +#define RTE_ETH_LINK_SPEED_5G ETH_LINK_SPEED_5G +#define RTE_ETH_LINK_SPEED_10G ETH_LINK_SPEED_10G +#define RTE_ETH_LINK_SPEED_20G ETH_LINK_SPEED_20G +#define RTE_ETH_LINK_SPEED_25G ETH_LINK_SPEED_25G +#define RTE_ETH_LINK_SPEED_40G ETH_LINK_SPEED_40G +#define RTE_ETH_LINK_SPEED_50G ETH_LINK_SPEED_50G +#define RTE_ETH_LINK_SPEED_56G ETH_LINK_SPEED_56G +#define RTE_ETH_LINK_SPEED_100G ETH_LINK_SPEED_100G +#define RTE_ETH_SPEED_NUM_NONE ETH_SPEED_NUM_NONE +#define RTE_ETH_SPEED_NUM_10M ETH_SPEED_NUM_10M +#define RTE_ETH_SPEED_NUM_100M ETH_SPEED_NUM_100M +#define RTE_ETH_SPEED_NUM_1G ETH_SPEED_NUM_1G +#define RTE_ETH_SPEED_NUM_2_5G ETH_SPEED_NUM_2_5G +#define RTE_ETH_SPEED_NUM_5G ETH_SPEED_NUM_5G +#define RTE_ETH_SPEED_NUM_10G ETH_SPEED_NUM_10G +#define RTE_ETH_SPEED_NUM_20G ETH_SPEED_NUM_20G +#define RTE_ETH_SPEED_NUM_25G ETH_SPEED_NUM_25G +#define RTE_ETH_SPEED_NUM_40G ETH_SPEED_NUM_40G +#define RTE_ETH_SPEED_NUM_50G ETH_SPEED_NUM_50G +#define RTE_ETH_SPEED_NUM_56G ETH_SPEED_NUM_56G +#define RTE_ETH_SPEED_NUM_100G ETH_SPEED_NUM_100G +#define RTE_ETH_LINK_HALF_DUPLEX ETH_LINK_HALF_DUPLEX +#define RTE_ETH_LINK_FULL_DUPLEX ETH_LINK_FULL_DUPLEX +#define RTE_ETH_LINK_DOWN ETH_LINK_DOWN +#define RTE_ETH_LINK_UP ETH_LINK_UP +#define RTE_ETH_LINK_FIXED ETH_LINK_FIXED +#define RTE_ETH_LINK_AUTONEG ETH_LINK_AUTONEG +#define RTE_ETH_MQ_RX_RSS_FLAG ETH_MQ_RX_RSS_FLAG +#define RTE_ETH_MQ_RX_DCB_FLAG ETH_MQ_RX_DCB_FLAG +#define RTE_ETH_MQ_RX_VMDQ_FLAG ETH_MQ_RX_VMDQ_FLAG +#define RTE_ETH_MQ_RX_NONE ETH_MQ_RX_NONE +#define RTE_ETH_MQ_RX_RSS ETH_MQ_RX_RSS +#define RTE_ETH_MQ_RX_DCB ETH_MQ_RX_DCB +#define RTE_ETH_MQ_RX_DCB_RSS ETH_MQ_RX_DCB_RSS +#define RTE_ETH_MQ_RX_VMDQ_ONLY ETH_MQ_RX_VMDQ_ONLY +#define RTE_ETH_MQ_RX_VMDQ_RSS ETH_MQ_RX_VMDQ_RSS +#define RTE_ETH_MQ_RX_VMDQ_DCB ETH_MQ_RX_VMDQ_DCB +#define RTE_ETH_MQ_RX_VMDQ_DCB_RSS ETH_MQ_RX_VMDQ_DCB_RSS +#define RTE_ETH_MQ_TX_NONE ETH_MQ_TX_NONE +#define RTE_ETH_MQ_TX_DCB ETH_MQ_TX_DCB +#define RTE_ETH_MQ_TX_VMDQ_DCB ETH_MQ_TX_VMDQ_DCB +#define RTE_ETH_MQ_TX_VMDQ_ONLY ETH_MQ_TX_VMDQ_ONLY +#define RTE_ETH_VLAN_TYPE_UNKNOWN ETH_VLAN_TYPE_UNKNOWN +#define RTE_ETH_VLAN_TYPE_INNER ETH_VLAN_TYPE_INNER +#define RTE_ETH_VLAN_TYPE_OUTER ETH_VLAN_TYPE_OUTER +#define RTE_ETH_VLAN_TYPE_MAX ETH_VLAN_TYPE_MAX +#define RTE_ETH_RSS_IPV4 ETH_RSS_IPV4 +#define RTE_ETH_RSS_FRAG_IPV4 ETH_RSS_FRAG_IPV4 +#define RTE_ETH_RSS_NONFRAG_IPV4_TCP ETH_RSS_NONFRAG_IPV4_TCP +#define RTE_ETH_RSS_NONFRAG_IPV4_UDP ETH_RSS_NONFRAG_IPV4_UDP +#define RTE_ETH_RSS_NONFRAG_IPV4_SCTP ETH_RSS_NONFRAG_IPV4_SCTP +#define RTE_ETH_RSS_NONFRAG_IPV4_OTHER ETH_RSS_NONFRAG_IPV4_OTHER +#define RTE_ETH_RSS_IPV6 ETH_RSS_IPV6 +#define RTE_ETH_RSS_FRAG_IPV6 ETH_RSS_FRAG_IPV6 +#define RTE_ETH_RSS_NONFRAG_IPV6_TCP ETH_RSS_NONFRAG_IPV6_TCP +#define RTE_ETH_RSS_NONFRAG_IPV6_UDP ETH_RSS_NONFRAG_IPV6_UDP +#define RTE_ETH_RSS_NONFRAG_IPV6_SCTP ETH_RSS_NONFRAG_IPV6_SCTP +#define RTE_ETH_RSS_NONFRAG_IPV6_OTHER ETH_RSS_NONFRAG_IPV6_OTHER +#define RTE_ETH_RSS_L2_PAYLOAD ETH_RSS_L2_PAYLOAD +#define RTE_ETH_RSS_IPV6_EX ETH_RSS_IPV6_EX +#define RTE_ETH_RSS_IPV6_TCP_EX ETH_RSS_IPV6_TCP_EX +#define RTE_ETH_RSS_IPV6_UDP_EX ETH_RSS_IPV6_UDP_EX +#define RTE_ETH_RSS_IP ETH_RSS_IP +#define RTE_ETH_RSS_UDP ETH_RSS_UDP +#define RTE_ETH_RSS_TCP ETH_RSS_TCP +#define RTE_ETH_RSS_SCTP ETH_RSS_SCTP +#define RTE_ETH_RSS_PROTO_MASK ETH_RSS_PROTO_MASK +#define RTE_ETH_RSS_RETA_SIZE_64 ETH_RSS_RETA_SIZE_64 +#define RTE_ETH_RSS_RETA_SIZE_128 ETH_RSS_RETA_SIZE_128 +#define RTE_ETH_RSS_RETA_SIZE_512 ETH_RSS_RETA_SIZE_512 +#define RTE_ETH_RETA_GROUP_SIZE RTE_RETA_GROUP_SIZE +#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS ETH_VMDQ_MAX_VLAN_FILTERS +#define RTE_ETH_DCB_NUM_USER_PRIORITIES ETH_DCB_NUM_USER_PRIORITIES +#define RTE_ETH_VMDQ_DCB_NUM_QUEUES ETH_VMDQ_DCB_NUM_QUEUES +#define RTE_ETH_DCB_NUM_QUEUES ETH_DCB_NUM_QUEUES +#define RTE_ETH_DCB_PG_SUPPORT ETH_DCB_PG_SUPPORT +#define RTE_ETH_DCB_PFC_SUPPORT ETH_DCB_PFC_SUPPORT +#define RTE_ETH_VLAN_STRIP_OFFLOAD ETH_VLAN_STRIP_OFFLOAD +#define RTE_ETH_VLAN_FILTER_OFFLOAD ETH_VLAN_FILTER_OFFLOAD +#define RTE_ETH_VLAN_EXTEND_OFFLOAD ETH_VLAN_EXTEND_OFFLOAD +#define RTE_ETH_VLAN_STRIP_MASK ETH_VLAN_STRIP_MASK +#define RTE_ETH_VLAN_FILTER_MASK ETH_VLAN_FILTER_MASK +#define RTE_ETH_VLAN_EXTEND_MASK ETH_VLAN_EXTEND_MASK +#define RTE_ETH_VLAN_ID_MAX ETH_VLAN_ID_MAX +#define RTE_ETH_NUM_RECEIVE_MAC_ADDR ETH_NUM_RECEIVE_MAC_ADDR +#define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY ETH_VMDQ_NUM_UC_HASH_ARRAY +#define RTE_ETH_VMDQ_ACCEPT_UNTAG ETH_VMDQ_ACCEPT_UNTAG +#define RTE_ETH_VMDQ_ACCEPT_HASH_MC ETH_VMDQ_ACCEPT_HASH_MC +#define RTE_ETH_VMDQ_ACCEPT_HASH_UC ETH_VMDQ_ACCEPT_HASH_UC +#define RTE_ETH_VMDQ_ACCEPT_BROADCAST ETH_VMDQ_ACCEPT_BROADCAST +#define RTE_ETH_VMDQ_ACCEPT_MULTICAST ETH_VMDQ_ACCEPT_MULTICAST +#define RTE_ETH_4_TCS ETH_4_TCS +#define RTE_ETH_8_TCS ETH_8_TCS +#define RTE_ETH_8_POOLS ETH_8_POOLS +#define RTE_ETH_16_POOLS ETH_16_POOLS +#define RTE_ETH_32_POOLS ETH_32_POOLS +#define RTE_ETH_64_POOLS ETH_64_POOLS +#define RTE_ETH_FC_NONE RTE_FC_NONE +#define RTE_ETH_FC_RX_PAUSE RTE_FC_RX_PAUSE +#define RTE_ETH_FC_TX_PAUSE RTE_FC_TX_PAUSE +#define RTE_ETH_FC_FULL RTE_FC_FULL +#define RTE_ETH_TUNNEL_TYPE_NONE RTE_TUNNEL_TYPE_NONE +#define RTE_ETH_TUNNEL_TYPE_VXLAN RTE_TUNNEL_TYPE_VXLAN +#define RTE_ETH_TUNNEL_TYPE_GENEVE RTE_TUNNEL_TYPE_GENEVE +#define RTE_ETH_TUNNEL_TYPE_TEREDO RTE_TUNNEL_TYPE_TEREDO +#define RTE_ETH_TUNNEL_TYPE_NVGRE RTE_TUNNEL_TYPE_NVGRE +#define RTE_ETH_TUNNEL_TYPE_IP_IN_GRE RTE_TUNNEL_TYPE_IP_IN_GRE +#define RTE_ETH_L2_TUNNEL_TYPE_E_TAG RTE_L2_TUNNEL_TYPE_E_TAG +#define RTE_ETH_TUNNEL_TYPE_MAX RTE_TUNNEL_TYPE_MAX +#define RTE_ETH_FDIR_PBALLOC_64K RTE_FDIR_PBALLOC_64K +#define RTE_ETH_FDIR_PBALLOC_128K RTE_FDIR_PBALLOC_128K +#define RTE_ETH_FDIR_PBALLOC_256K RTE_FDIR_PBALLOC_256K +#define RTE_ETH_RX_OFFLOAD_VLAN_STRIP DEV_RX_OFFLOAD_VLAN_STRIP +#define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM DEV_RX_OFFLOAD_IPV4_CKSUM +#define RTE_ETH_RX_OFFLOAD_UDP_CKSUM DEV_RX_OFFLOAD_UDP_CKSUM +#define RTE_ETH_RX_OFFLOAD_TCP_CKSUM DEV_RX_OFFLOAD_TCP_CKSUM +#define RTE_ETH_RX_OFFLOAD_TCP_LRO DEV_RX_OFFLOAD_TCP_LRO +#define RTE_ETH_RX_OFFLOAD_QINQ_STRIP DEV_RX_OFFLOAD_QINQ_STRIP +#define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM +#define RTE_ETH_TX_OFFLOAD_VLAN_INSERT DEV_TX_OFFLOAD_VLAN_INSERT +#define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM DEV_TX_OFFLOAD_IPV4_CKSUM +#define RTE_ETH_TX_OFFLOAD_UDP_CKSUM DEV_TX_OFFLOAD_UDP_CKSUM +#define RTE_ETH_TX_OFFLOAD_TCP_CKSUM DEV_TX_OFFLOAD_TCP_CKSUM +#define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM DEV_TX_OFFLOAD_SCTP_CKSUM +#define RTE_ETH_TX_OFFLOAD_TCP_TSO DEV_TX_OFFLOAD_TCP_TSO +#define RTE_ETH_TX_OFFLOAD_UDP_TSO DEV_TX_OFFLOAD_UDP_TSO +#define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM +#define RTE_ETH_TX_OFFLOAD_QINQ_INSERT DEV_TX_OFFLOAD_QINQ_INSERT +#define RTE_ETH_DCB_NUM_TCS ETH_DCB_NUM_TCS +#define RTE_ETH_MAX_VMDQ_POOL ETH_MAX_VMDQ_POOL +#if RTE_VERSION >= RTE_VERSION_NUM(16,7,0,0) +#define RTE_MEMPOOL_REGISTER_OPS MEMPOOL_REGISTER_OPS +#define RTE_MBUF_F_RX_VLAN_STRIPPED PKT_RX_VLAN_STRIPPED +#define RTE_MBUF_F_RX_QINQ_STRIPPED PKT_RX_QINQ_STRIPPED +#define RTE_ETH_RSS_PORT ETH_RSS_PORT +#define RTE_ETH_RSS_VXLAN ETH_RSS_VXLAN +#define RTE_ETH_RSS_GENEVE ETH_RSS_GENEVE +#define RTE_ETH_RSS_NVGRE ETH_RSS_NVGRE +#define RTE_ETH_RSS_TUNNEL ETH_RSS_TUNNEL +#define RTE_ETH_RSS_RETA_SIZE_256 ETH_RSS_RETA_SIZE_256 +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(16,11,0,0) +#define RTE_MBUF_F_RX_IP_CKSUM_MASK PKT_RX_IP_CKSUM_MASK +#define RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN PKT_RX_IP_CKSUM_UNKNOWN +#define RTE_MBUF_F_RX_IP_CKSUM_GOOD PKT_RX_IP_CKSUM_GOOD +#define RTE_MBUF_F_RX_IP_CKSUM_NONE PKT_RX_IP_CKSUM_NONE +#define RTE_MBUF_F_RX_L4_CKSUM_MASK PKT_RX_L4_CKSUM_MASK +#define RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN PKT_RX_L4_CKSUM_UNKNOWN +#define RTE_MBUF_F_RX_L4_CKSUM_GOOD PKT_RX_L4_CKSUM_GOOD +#define RTE_MBUF_F_RX_L4_CKSUM_NONE PKT_RX_L4_CKSUM_NONE +#define RTE_MBUF_F_RX_LRO PKT_RX_LRO +#define RTE_MBUF_F_TX_TUNNEL_VXLAN PKT_TX_TUNNEL_VXLAN +#define RTE_MBUF_F_TX_TUNNEL_GRE PKT_TX_TUNNEL_GRE +#define RTE_MBUF_F_TX_TUNNEL_IPIP PKT_TX_TUNNEL_IPIP +#define RTE_MBUF_F_TX_TUNNEL_GENEVE PKT_TX_TUNNEL_GENEVE +#define RTE_MBUF_F_TX_TUNNEL_MASK PKT_TX_TUNNEL_MASK +#define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO DEV_TX_OFFLOAD_VXLAN_TNL_TSO +#define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO DEV_TX_OFFLOAD_GRE_TNL_TSO +#define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO DEV_TX_OFFLOAD_IPIP_TNL_TSO +#define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO DEV_TX_OFFLOAD_GENEVE_TNL_TSO +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(17,2,0,0) +#define RTE_MBUF_F_TX_MACSEC PKT_TX_MACSEC +#define RTE_MBUF_F_TX_OFFLOAD_MASK PKT_TX_OFFLOAD_MASK +#define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP DEV_RX_OFFLOAD_MACSEC_STRIP +#define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT DEV_TX_OFFLOAD_MACSEC_INSERT +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(17,8,0,0) +#define RTE_MBUF_F_TX_TUNNEL_MPLSINUDP PKT_TX_TUNNEL_MPLSINUDP +#define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE DEV_TX_OFFLOAD_MT_LOCKFREE +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(17,11,0,0) +#define RTE_MBUF_F_RX_VLAN PKT_RX_VLAN +#define RTE_MBUF_F_RX_SEC_OFFLOAD PKT_RX_SEC_OFFLOAD +#define RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED PKT_RX_SEC_OFFLOAD_FAILED +#define RTE_MBUF_F_RX_QINQ PKT_RX_QINQ +#define RTE_MBUF_F_TX_SEC_OFFLOAD PKT_TX_SEC_OFFLOAD +#define RTE_ETH_RX_OFFLOAD_HEADER_SPLIT DEV_RX_OFFLOAD_HEADER_SPLIT +#define RTE_ETH_RX_OFFLOAD_VLAN_FILTER DEV_RX_OFFLOAD_VLAN_FILTER +#define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND DEV_RX_OFFLOAD_VLAN_EXTEND +#define RTE_ETH_RX_OFFLOAD_SCATTER DEV_RX_OFFLOAD_SCATTER +#define RTE_ETH_RX_OFFLOAD_TIMESTAMP DEV_RX_OFFLOAD_TIMESTAMP +#define RTE_ETH_RX_OFFLOAD_SECURITY DEV_RX_OFFLOAD_SECURITY +#define RTE_ETH_RX_OFFLOAD_CHECKSUM DEV_RX_OFFLOAD_CHECKSUM +#define RTE_ETH_RX_OFFLOAD_VLAN DEV_RX_OFFLOAD_VLAN +#define RTE_ETH_TX_OFFLOAD_MULTI_SEGS DEV_TX_OFFLOAD_MULTI_SEGS +#define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE DEV_TX_OFFLOAD_MBUF_FAST_FREE +#define RTE_ETH_TX_OFFLOAD_SECURITY DEV_TX_OFFLOAD_SECURITY +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(18,2,0,0) +#define RTE_MBUF_F_TX_UDP_SEG PKT_TX_UDP_SEG +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(18,5,0,0) +#define RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE PKT_TX_TUNNEL_VXLAN_GPE +#define RTE_MBUF_F_TX_TUNNEL_IP PKT_TX_TUNNEL_IP +#define RTE_MBUF_F_TX_TUNNEL_UDP PKT_TX_TUNNEL_UDP +#define RTE_MBUF_F_EXTERNAL EXT_ATTACHED_MBUF +#define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO DEV_TX_OFFLOAD_UDP_TNL_TSO +#define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO DEV_TX_OFFLOAD_IP_TNL_TSO +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(18,11,0,0) +#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_MASK PKT_RX_OUTER_L4_CKSUM_MASK +#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_UNKNOWN PKT_RX_OUTER_L4_CKSUM_UNKNOWN +#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD PKT_RX_OUTER_L4_CKSUM_BAD +#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD PKT_RX_OUTER_L4_CKSUM_GOOD +#define RTE_MBUF_F_RX_OUTER_L4_CKSUM_INVALID PKT_RX_OUTER_L4_CKSUM_INVALID +#define RTE_MBUF_F_TX_OUTER_UDP_CKSUM PKT_TX_OUTER_UDP_CKSUM +#define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM DEV_RX_OFFLOAD_SCTP_CKSUM +#define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM DEV_RX_OFFLOAD_OUTER_UDP_CKSUM +#define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM DEV_TX_OFFLOAD_OUTER_UDP_CKSUM +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(19,5,0,0) +#define RTE_ETH_TUNNEL_TYPE_VXLAN_GPE RTE_TUNNEL_TYPE_VXLAN_GPE +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(19,8,0,0) +#define RTE_ETH_QINQ_STRIP_OFFLOAD ETH_QINQ_STRIP_OFFLOAD +#define RTE_ETH_QINQ_STRIP_MASK ETH_QINQ_STRIP_MASK +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(19,11,0,0) +#define RTE_MBUF_DYNFLAG_RX_METADATA PKT_RX_DYNF_METADATA +#define RTE_MBUF_DYNFLAG_TX_METADATA PKT_TX_DYNF_METADATA +#define RTE_MBUF_F_FIRST_FREE PKT_FIRST_FREE +#define RTE_MBUF_F_LAST_FREE PKT_LAST_FREE +#define RTE_MBUF_F_TX_TUNNEL_GTP PKT_TX_TUNNEL_GTP +#define RTE_ETH_RSS_GTPU ETH_RSS_GTPU +#define RTE_ETH_RSS_L3_SRC_ONLY ETH_RSS_L3_SRC_ONLY +#define RTE_ETH_RSS_L3_DST_ONLY ETH_RSS_L3_DST_ONLY +#define RTE_ETH_RSS_L4_SRC_ONLY ETH_RSS_L4_SRC_ONLY +#define RTE_ETH_RSS_L4_DST_ONLY ETH_RSS_L4_DST_ONLY +#define RTE_ETH_RX_OFFLOAD_RSS_HASH DEV_RX_OFFLOAD_RSS_HASH +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(20,5,0,0) +#define RTE_ETH_LINK_SPEED_200G ETH_LINK_SPEED_200G +#define RTE_ETH_SPEED_NUM_200G ETH_SPEED_NUM_200G +#define RTE_ETH_RSS_ETH ETH_RSS_ETH +#define RTE_ETH_RSS_S_VLAN ETH_RSS_S_VLAN +#define RTE_ETH_RSS_C_VLAN ETH_RSS_C_VLAN +#define RTE_ETH_RSS_ESP ETH_RSS_ESP +#define RTE_ETH_RSS_AH ETH_RSS_AH +#define RTE_ETH_RSS_L2TPV3 ETH_RSS_L2TPV3 +#define RTE_ETH_RSS_PFCP ETH_RSS_PFCP +#define RTE_ETH_RSS_L2_SRC_ONLY ETH_RSS_L2_SRC_ONLY +#define RTE_ETH_RSS_L2_DST_ONLY ETH_RSS_L2_DST_ONLY +#define RTE_ETH_RSS_VLAN ETH_RSS_VLAN +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(20,8,0,0) +#define RTE_ETH_RSS_PPPOE ETH_RSS_PPPOE +#define RTE_ETH_RSS_IPV6_PRE32 ETH_RSS_IPV6_PRE32 +#define RTE_ETH_RSS_IPV6_PRE40 ETH_RSS_IPV6_PRE40 +#define RTE_ETH_RSS_IPV6_PRE48 ETH_RSS_IPV6_PRE48 +#define RTE_ETH_RSS_IPV6_PRE56 ETH_RSS_IPV6_PRE56 +#define RTE_ETH_RSS_IPV6_PRE64 ETH_RSS_IPV6_PRE64 +#define RTE_ETH_RSS_IPV6_PRE96 ETH_RSS_IPV6_PRE96 +#define RTE_ETH_RSS_IPV6_PRE32_UDP ETH_RSS_IPV6_PRE32_UDP +#define RTE_ETH_RSS_IPV6_PRE40_UDP ETH_RSS_IPV6_PRE40_UDP +#define RTE_ETH_RSS_IPV6_PRE48_UDP ETH_RSS_IPV6_PRE48_UDP +#define RTE_ETH_RSS_IPV6_PRE56_UDP ETH_RSS_IPV6_PRE56_UDP +#define RTE_ETH_RSS_IPV6_PRE64_UDP ETH_RSS_IPV6_PRE64_UDP +#define RTE_ETH_RSS_IPV6_PRE96_UDP ETH_RSS_IPV6_PRE96_UDP +#define RTE_ETH_RSS_IPV6_PRE32_TCP ETH_RSS_IPV6_PRE32_TCP +#define RTE_ETH_RSS_IPV6_PRE40_TCP ETH_RSS_IPV6_PRE40_TCP +#define RTE_ETH_RSS_IPV6_PRE48_TCP ETH_RSS_IPV6_PRE48_TCP +#define RTE_ETH_RSS_IPV6_PRE56_TCP ETH_RSS_IPV6_PRE56_TCP +#define RTE_ETH_RSS_IPV6_PRE64_TCP ETH_RSS_IPV6_PRE64_TCP +#define RTE_ETH_RSS_IPV6_PRE96_TCP ETH_RSS_IPV6_PRE96_TCP +#define RTE_ETH_RSS_IPV6_PRE32_SCTP ETH_RSS_IPV6_PRE32_SCTP +#define RTE_ETH_RSS_IPV6_PRE40_SCTP ETH_RSS_IPV6_PRE40_SCTP +#define RTE_ETH_RSS_IPV6_PRE48_SCTP ETH_RSS_IPV6_PRE48_SCTP +#define RTE_ETH_RSS_IPV6_PRE56_SCTP ETH_RSS_IPV6_PRE56_SCTP +#define RTE_ETH_RSS_IPV6_PRE64_SCTP ETH_RSS_IPV6_PRE64_SCTP +#define RTE_ETH_RSS_IPV6_PRE96_SCTP ETH_RSS_IPV6_PRE96_SCTP +#define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(20,11,0,0) +#define RTE_ETH_SPEED_NUM_UNKNOWN ETH_SPEED_NUM_UNKNOWN +#define RTE_ETH_RSS_ECPRI ETH_RSS_ECPRI +#define RTE_ETH_RSS_LEVEL_PMD_DEFAULT ETH_RSS_LEVEL_PMD_DEFAULT +#define RTE_ETH_RSS_LEVEL_OUTERMOST ETH_RSS_LEVEL_OUTERMOST +#define RTE_ETH_RSS_LEVEL_INNERMOST ETH_RSS_LEVEL_INNERMOST +#define RTE_ETH_RSS_LEVEL_MASK ETH_RSS_LEVEL_MASK +#define RTE_ETH_RSS_LEVEL ETH_RSS_LEVEL +#endif +#if RTE_VERSION >= RTE_VERSION_NUM(21,2,0,0) +#define RTE_ETH_RSS_MPLS ETH_RSS_MPLS +#define RTE_ETH_TUNNEL_TYPE_ECPRI RTE_TUNNEL_TYPE_ECPRI +#endif + +#ifndef DEV_RX_OFFLOAD_JUMBO_FRAME +#define RTE_ETH_RX_OFFLOAD_JUMBO_FRAME 0x00000800 +#else +#define RTE_ETH_RX_OFFLOAD_JUMBO_FRAME DEV_RX_OFFLOAD_JUMBO_FRAME +#endif + +#ifndef DEV_RX_OFFLOAD_KEEP_CRC +#ifndef DEV_RX_OFFLOAD_CRC_STRIP +#define RTE_ETH_RX_OFFLOAD_CRC_STRIP 0x00001000 +#else +#define RTE_ETH_RX_OFFLOAD_CRC_STRIP DEV_RX_OFFLOAD_CRC_STRIP +#endif +#define RTE_ETH_RX_OFFLOAD_KEEP_CRC _force_error_if_defined_ +#undef RTE_ETH_RX_OFFLOAD_KEEP_CRC + +#else +#ifndef DEV_RX_OFFLOAD_CRC_STRIP +#define RTE_ETH_RX_OFFLOAD_CRC_STRIP _force_error_if_defined_ +#undef RTE_ETH_RX_OFFLOAD_CRC_STRIP +#else +#define RTE_ETH_RX_OFFLOAD_CRC_STRIP DEV_RX_OFFLOAD_CRC_STRIP +#endif +#define RTE_ETH_RX_OFFLOAD_KEEP_CRC DEV_RX_OFFLOAD_KEEP_CRC +#endif + +#else // >= 21.11 +#define RTE_ETH_RX_OFFLOAD_JUMBO_FRAME RTE_BIT64(11) +#define RTE_ETH_RX_OFFLOAD_CRC_STRIP _force_error_if_defined_ +#undef RTE_ETH_RX_OFFLOAD_CRC_STRIP +#endif + #endif // _PROX_COMPAT_H diff --git a/VNFs/DPPD-PROX/prox_ipv6.c b/VNFs/DPPD-PROX/prox_ipv6.c index 90538230..f8ec147f 100644 --- a/VNFs/DPPD-PROX/prox_ipv6.c +++ b/VNFs/DPPD-PROX/prox_ipv6.c @@ -141,7 +141,7 @@ void build_router_advertisement(struct rte_mbuf *mbuf, prox_rte_ether_addr *s_ad { prox_rte_ether_hdr *peth = rte_pktmbuf_mtod(mbuf, prox_rte_ether_hdr *); init_mbuf_seg(mbuf); - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); // Software calculates the checksum + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); // Software calculates the checksum memcpy(peth->d_addr.addr_bytes, &prox_cfg.all_nodes_mac_addr, sizeof(prox_rte_ether_addr)); memcpy(peth->s_addr.addr_bytes, s_addr, sizeof(prox_rte_ether_addr)); @@ -191,7 +191,7 @@ void build_router_sollicitation(struct rte_mbuf *mbuf, prox_rte_ether_addr *s_ad prox_rte_ether_hdr *peth = rte_pktmbuf_mtod(mbuf, prox_rte_ether_hdr *); init_mbuf_seg(mbuf); - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); // Software calculates the checksum + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); // Software calculates the checksum memcpy(peth->d_addr.addr_bytes, &prox_cfg.all_routers_mac_addr, sizeof(prox_rte_ether_addr)); memcpy(peth->s_addr.addr_bytes, s_addr, sizeof(prox_rte_ether_addr)); @@ -225,7 +225,7 @@ void build_neighbour_sollicitation(struct rte_mbuf *mbuf, prox_rte_ether_addr *s set_mcast_mac_from_ipv6(&mac_dst, dst); init_mbuf_seg(mbuf); - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); // Software calculates the checksum + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); // Software calculates the checksum memcpy(peth->d_addr.addr_bytes, &mac_dst, sizeof(prox_rte_ether_addr)); memcpy(peth->s_addr.addr_bytes, s_addr, sizeof(prox_rte_ether_addr)); @@ -263,7 +263,7 @@ void build_neighbour_advertisement(struct task_base *tbase, struct rte_mbuf *mbu uint8_t port_id = get_port(mbuf); init_mbuf_seg(mbuf); - mbuf->ol_flags &= ~(PKT_TX_IP_CKSUM|PKT_TX_UDP_CKSUM); // Software calculates the checksum + mbuf->ol_flags &= ~(RTE_MBUF_F_TX_IP_CKSUM|RTE_MBUF_F_TX_UDP_CKSUM); // Software calculates the checksum prox_rte_ipv6_hdr *ipv6_hdr = prox_set_vlan_ipv6(peth, vlan); diff --git a/VNFs/DPPD-PROX/prox_port_cfg.c b/VNFs/DPPD-PROX/prox_port_cfg.c index b93198df..7285a80a 100644 --- a/VNFs/DPPD-PROX/prox_port_cfg.c +++ b/VNFs/DPPD-PROX/prox_port_cfg.c @@ -414,20 +414,20 @@ void init_rte_dev(int use_dummy_devices) } // In DPDK 18.08 vmxnet3 reports it supports IPV4 checksum, but packets does not go through when IPv4 cksum is enabled - if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM)) { + if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)) { plog_info("\t\tDisabling IPV4 cksum on vmxnet3\n"); - port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_IPV4_CKSUM; + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; } - if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM)) { + if ((!strcmp(port_cfg->short_name, "vmxnet3")) && (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) { plog_info("\t\tDisabling UDP cksum on vmxnet3\n"); - port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_UDP_CKSUM; + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM; } // Some OVS versions reports that they support UDP offload and no IPv4 offload, but fails when UDP offload is enabled if ((!strcmp(port_cfg->short_name, "virtio")) && - ((port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM) == 0) && - (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM)) { + ((port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) == 0) && + (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) { plog_info("\t\tDisabling UDP cksum on virtio\n"); - port_cfg->disabled_tx_offload |= DEV_TX_OFFLOAD_UDP_CKSUM; + port_cfg->disabled_tx_offload |= RTE_ETH_TX_OFFLOAD_UDP_CKSUM; } } } @@ -481,84 +481,84 @@ static void print_port_capa(struct prox_port_cfg *port_cfg) #if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) plog_info("\t\tRX offload capa = 0x%lx = ", port_cfg->dev_info.rx_offload_capa); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_STRIP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) plog_info("VLAN STRIP | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_IPV4_CKSUM) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM) plog_info("IPV4 CKSUM | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_UDP_CKSUM) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_UDP_CKSUM) plog_info("UDP CKSUM | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_CKSUM) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_CKSUM) plog_info("TCP CKSUM | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_LRO) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TCP_LRO) plog_info("TCP LRO | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_QINQ_STRIP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_QINQ_STRIP) plog_info("QINQ STRIP | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM) plog_info("OUTER_IPV4_CKSUM | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_MACSEC_STRIP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_MACSEC_STRIP) plog_info("MACSEC STRIP | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_HEADER_SPLIT) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT) plog_info("HEADER SPLIT | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_FILTER) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) plog_info("VLAN FILTER | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_VLAN_EXTEND) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) plog_info("VLAN EXTEND | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME) plog_info("JUMBO FRAME | "); -#if defined(DEV_RX_OFFLOAD_CRC_STRIP) - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_CRC_STRIP) +#if defined(RTE_ETH_RX_OFFLOAD_CRC_STRIP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_CRC_STRIP) plog_info("CRC STRIP | "); #endif -#if defined(DEV_RX_OFFLOAD_KEEP_CRC) - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_KEEP_CRC) +#if defined(RTE_ETH_RX_OFFLOAD_KEEP_CRC) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_KEEP_CRC) plog_info("KEEP CRC | "); #endif - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SCATTER) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SCATTER) plog_info("SCATTER | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TIMESTAMP) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TIMESTAMP) plog_info("TIMESTAMP | "); - if (port_cfg->dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SECURITY) + if (port_cfg->dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_SECURITY) plog_info("SECURITY "); plog_info("\n"); plog_info("\t\tTX offload capa = 0x%lx = ", port_cfg->dev_info.tx_offload_capa); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VLAN_INSERT) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VLAN_INSERT) plog_info("VLAN INSERT | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPV4_CKSUM) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) plog_info("IPV4 CKSUM | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_CKSUM) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_CKSUM) plog_info("UDP CKSUM | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_TCP_CKSUM) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_CKSUM) plog_info("TCP CKSUM | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_SCTP_CKSUM) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM) plog_info("SCTP CKSUM | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_TCP_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_TCP_TSO) plog_info("TCP TS0 | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TSO) plog_info("UDP TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM) plog_info("OUTER IPV4 CKSUM | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_QINQ_INSERT) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_QINQ_INSERT) plog_info("QINQ INSERT | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VXLAN_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO) plog_info("VLAN TNL TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_GRE_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO) plog_info("GRE TNL TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IPIP_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO) plog_info("IPIP TNL TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_GENEVE_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO) plog_info("GENEVE TNL TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MACSEC_INSERT) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MACSEC_INSERT) plog_info("MACSEC INSERT | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MT_LOCKFREE) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE) plog_info("MT LOCKFREE | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MULTI_SEGS) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MULTI_SEGS) plog_info("MULTI SEG | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_SECURITY) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_SECURITY) plog_info("SECURITY | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_UDP_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO) plog_info("UDP TNL TSO | "); - if (port_cfg->dev_info.tx_offload_capa & DEV_TX_OFFLOAD_IP_TNL_TSO) + if (port_cfg->dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IP_TNL_TSO) plog_info("IP TNL TSO | "); plog_info("\n"); @@ -583,30 +583,30 @@ static void get_max_link_speed(struct prox_port_cfg *port_cfg) // or rte_eth_link_get_nowait) might be reported too late // and might result in wrong exrapolation, and hence should not be used // for extrapolation purposes - if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_100G) - port_cfg->max_link_speed = ETH_SPEED_NUM_100G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_56G) - port_cfg->max_link_speed = ETH_SPEED_NUM_56G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_50G) - port_cfg->max_link_speed = ETH_SPEED_NUM_50G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_40G) - port_cfg->max_link_speed = ETH_SPEED_NUM_40G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_25G) - port_cfg->max_link_speed = ETH_SPEED_NUM_25G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_20G) - port_cfg->max_link_speed = ETH_SPEED_NUM_20G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_10G) - port_cfg->max_link_speed = ETH_SPEED_NUM_10G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_5G) - port_cfg->max_link_speed = ETH_SPEED_NUM_5G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_2_5G) - port_cfg->max_link_speed = ETH_SPEED_NUM_2_5G; - else if (port_cfg->dev_info.speed_capa & ETH_LINK_SPEED_1G) - port_cfg->max_link_speed = ETH_SPEED_NUM_1G; - else if (port_cfg->dev_info.speed_capa & (ETH_LINK_SPEED_100M_HD | ETH_LINK_SPEED_100M)) - port_cfg->max_link_speed = ETH_SPEED_NUM_100M; - else if (port_cfg->dev_info.speed_capa & (ETH_LINK_SPEED_10M_HD | ETH_LINK_SPEED_10M)) - port_cfg->max_link_speed = ETH_SPEED_NUM_10M; + if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_100G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_56G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_56G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_50G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_50G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_40G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_40G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_25G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_25G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_20G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_20G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_10G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_5G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_5G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_2_5G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_2_5G; + else if (port_cfg->dev_info.speed_capa & RTE_ETH_LINK_SPEED_1G) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_1G; + else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_100M_HD | RTE_ETH_LINK_SPEED_100M)) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_100M; + else if (port_cfg->dev_info.speed_capa & (RTE_ETH_LINK_SPEED_10M_HD | RTE_ETH_LINK_SPEED_10M)) + port_cfg->max_link_speed = RTE_ETH_SPEED_NUM_10M; } #endif @@ -665,13 +665,13 @@ static void init_port(struct prox_port_cfg *port_cfg) if (port_cfg->n_rxq > 1) { // Enable RSS if multiple receive queues if (strcmp(port_cfg->short_name, "virtio")) { - port_cfg->port_conf.rxmode.mq_mode |= ETH_MQ_RX_RSS; + port_cfg->port_conf.rxmode.mq_mode |= RTE_ETH_MQ_RX_RSS; port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key = toeplitz_init_key; port_cfg->port_conf.rx_adv_conf.rss_conf.rss_key_len = TOEPLITZ_KEY_LEN; #if RTE_VERSION >= RTE_VERSION_NUM(2,0,0,0) - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IP|ETH_RSS_UDP; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP; #else - port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP; + port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf = RTE_ETH_RSS_IPV4|ETH_RSS_NONF_IPV4_UDP; #endif } } @@ -681,37 +681,37 @@ static void init_port(struct prox_port_cfg *port_cfg) port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf &= port_cfg->dev_info.flow_type_rss_offloads; #endif if (strcmp(port_cfg->short_name, "virtio")) { - plog_info("\t\t Enabling RSS rss_hf = 0x%lx (requested 0x%llx, supported 0x%lx)\n", port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf, ETH_RSS_IP|ETH_RSS_UDP, port_cfg->dev_info.flow_type_rss_offloads); + plog_info("\t\t Enabling RSS rss_hf = 0x%lx (requested 0x%llx, supported 0x%lx)\n", port_cfg->port_conf.rx_adv_conf.rss_conf.rss_hf, RTE_ETH_RSS_IP|RTE_ETH_RSS_UDP, port_cfg->dev_info.flow_type_rss_offloads); } else { plog_info("\t\t Not enabling RSS on virtio port"); } // rxmode such as hw src strip #if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) -#if defined (DEV_RX_OFFLOAD_CRC_STRIP) - CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_CRC_STRIP); +#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP) + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_CRC_STRIP); #endif -#if defined (DEV_RX_OFFLOAD_KEEP_CRC) - CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_KEEP_CRC); +#if defined (RTE_ETH_RX_OFFLOAD_KEEP_CRC) + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_KEEP_CRC); #endif - CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_JUMBO_FRAME); - CONFIGURE_RX_OFFLOAD(DEV_RX_OFFLOAD_VLAN_STRIP); + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_JUMBO_FRAME); + CONFIGURE_RX_OFFLOAD(RTE_ETH_RX_OFFLOAD_VLAN_STRIP); #else - if (port_cfg->requested_rx_offload & DEV_RX_OFFLOAD_CRC_STRIP) { + if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) { port_cfg->port_conf.rxmode.hw_strip_crc = 1; } - if (port_cfg->requested_rx_offload & DEV_RX_OFFLOAD_JUMBO_FRAME) { + if (port_cfg->requested_rx_offload & RTE_ETH_RX_OFFLOAD_JUMBO_FRAME) { port_cfg->port_conf.rxmode.jumbo_frame = 1; } #endif // IPV4, UDP, SCTP Checksums #if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) - CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_IPV4_CKSUM); - CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_UDP_CKSUM); - CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_VLAN_INSERT); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_IPV4_CKSUM); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_UDP_CKSUM); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_VLAN_INSERT); #else - if ((port_cfg->dev_info.tx_offload_capa & (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM)) == 0) { + if ((port_cfg->dev_info.tx_offload_capa & (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM)) == 0) { port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOOFFLOADS; plog_info("\t\tDisabling TX offloads as pmd reports that it does not support them)\n"); } @@ -722,7 +722,7 @@ static void init_port(struct prox_port_cfg *port_cfg) #endif // Multi Segments #if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) - CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_MULTI_SEGS); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MULTI_SEGS); #else if (!strcmp(port_cfg->short_name, "vmxnet3")) { port_cfg->tx_conf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS; @@ -740,7 +740,7 @@ static void init_port(struct prox_port_cfg *port_cfg) // Refcount #if RTE_VERSION >= RTE_VERSION_NUM(18,8,0,1) - CONFIGURE_TX_OFFLOAD(DEV_TX_OFFLOAD_MBUF_FAST_FREE); + CONFIGURE_TX_OFFLOAD(RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE); #else if (port_cfg->tx_conf.txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) plog_info("\t\tEnabling No refcnt on port %d\n", port_id); @@ -848,7 +848,7 @@ static void init_port(struct prox_port_cfg *port_cfg) if (link.link_status) { plog_info("Link Up - speed %'u Mbps - %s\n", link.link_speed, - (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? + (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ? "full-duplex" : "half-duplex"); } else { diff --git a/VNFs/DPPD-PROX/stats_port.c b/VNFs/DPPD-PROX/stats_port.c index 124c849e..3580602c 100644 --- a/VNFs/DPPD-PROX/stats_port.c +++ b/VNFs/DPPD-PROX/stats_port.c @@ -289,16 +289,16 @@ static void nic_read_stats(uint8_t port_id) dropped by the nic". Note that in case CRC is stripped on ixgbe, the CRC bytes are not counted. */ -#if defined (DEV_RX_OFFLOAD_CRC_STRIP) - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_CRC_STRIP) +#if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP) + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_CRC_STRIP) stats->rx_bytes = eth_stat.ibytes + (24 * eth_stat.ipackets - 20 * (eth_stat.ierrors + eth_stat.imissed)); else stats->rx_bytes = eth_stat.ibytes + (20 * eth_stat.ipackets - 20 * (eth_stat.ierrors + eth_stat.imissed)); #else -#if defined (DEV_RX_OFFLOAD_KEEP_CRC) - if (prox_port_cfg[port_id].requested_rx_offload & DEV_RX_OFFLOAD_KEEP_CRC) +#if defined (RTE_ETH_RX_OFFLOAD_KEEP_CRC) + if (prox_port_cfg[port_id].requested_rx_offload & RTE_ETH_RX_OFFLOAD_KEEP_CRC) stats->rx_bytes = eth_stat.ibytes + (20 * eth_stat.ipackets - 20 * (eth_stat.ierrors + eth_stat.imissed)); else |