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# Copyright (c) 2016-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
[PIPELINE0]
type = MASTER
core = 0
[PIPELINE1]
type = ARPICMP
core = 1
pktq_in = SWQ4
pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0
pktq_in_prv = RXQ0.0
prv_to_pub_map = (0,1)
[PIPELINE2]
type = TXRX
core = 2
pipeline_txrx_type = RXRX
dest_if_offset = 176
pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0
pktq_out = SWQ0 SWQ1 SWQ2 SWQ3 SWQ4
[PIPELINE3]
type = LOADB
core = 3
pktq_in = SWQ0 SWQ1 SWQ2 SWQ3
pktq_out = SWQ4 SWQ5 SWQ6 SWQ7 SWQ8 SWQ9 SWQ10 SWQ11
outport_offset = 136; 8
n_vnf_threads = 2
[PIPELINE4]
type = ACL
core = 4
pktq_in = SWQ2 SWQ3
pktq_out = SWQ8 SWQ9
traffic_type = 4
pkt_type = ipv4
n_flows = 2000000
[PIPELINE5]
type = TXRX
core = 5
pipeline_txrx_type = TXTX
dest_if_offset = 176
pktq_in = SWQ8 SWQ9 SWQ10 SWQ11 SWQ12 SWQ13
pktq_out = TXQ0.0 TXQ1.0 TXQ0.1 TXQ1.1 TXQ0.2 TXQ1.2
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