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-rw-r--r--samples/vnf_samples/nsut/vpe/vpe_config/vpe_config_2_ports100
1 files changed, 100 insertions, 0 deletions
diff --git a/samples/vnf_samples/nsut/vpe/vpe_config/vpe_config_2_ports b/samples/vnf_samples/nsut/vpe/vpe_config/vpe_config_2_ports
new file mode 100644
index 000000000..44aa9854e
--- /dev/null
+++ b/samples/vnf_samples/nsut/vpe/vpe_config/vpe_config_2_ports
@@ -0,0 +1,100 @@
+# Copyright (c) 2016-2018 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+[PIPELINE0]
+type = MASTER
+core = 0
+
+[TM0]
+burst_read = 24
+burst_write = 32
+cfg = /tmp/full_tm_profile_10G.cfg
+
+[PIPELINE1]
+type = FIREWALL
+core = s0c1
+pktq_in = RXQ0.0
+pktq_out = SWQ0 SINK0
+n_rules = 4096
+pkt_type = qinq_ipv4
+
+[PIPELINE2]
+type = FLOW_CLASSIFICATION
+core = s0c2
+pktq_in = SWQ0
+pktq_out = SWQ1 SINK1
+n_flows = 65536
+key_size = 8
+key_offset = 268
+key_mask = 00000FFF00000FFF
+flowid_offset = 172
+
+[PIPELINE3]
+type = FLOW_ACTIONS
+core = s0c2
+pktq_in = SWQ1
+pktq_out = SWQ2
+n_flows = 65536
+n_meters_per_flow = 1
+flow_id_offset = 172
+ip_hdr_offset = 278
+color_offset = 176
+
+[PIPELINE4]
+type = FLOW_ACTIONS
+core = s0c1
+pktq_in = SWQ2
+pktq_out = SWQ3
+n_flows = 65536
+n_meters_per_flow = 4
+flow_id_offset = 172
+ip_hdr_offset = 278
+color_offset = 176
+
+[PIPELINE5]
+type = ROUTING
+core = s0c3
+pktq_in = SWQ3
+pktq_out = TXQ1.0 SINK2
+encap = ethernet_mpls
+mpls_color_mark = yes
+ip_hdr_offset = 278
+color_offset = 176
+
+[PIPELINE6]
+type = ROUTING
+core = s0c4
+pktq_in = RXQ1.0
+pktq_out = SWQ4 SINK3
+encap = ethernet_qinq
+qinq_sched = yes
+ip_hdr_offset = 270
+
+[PIPELINE7]
+type = PASS-THROUGH
+core = s0c5
+pktq_in = SWQ4
+pktq_out = SWQ5
+
+[PIPELINE8]
+type = PASS-THROUGH
+core = s0c5
+pktq_in = SWQ5 TM0
+pktq_out = TM0 SWQ6
+
+[PIPELINE9]
+type = PASS-THROUGH
+core = s0c5
+pktq_in = SWQ6
+pktq_out = TXQ0.0