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authorRex Lee <limingjiang@huawei.com>2017-01-23 02:52:24 +0000
committerGerrit Code Review <gerrit@opnfv.org>2017-01-23 02:52:24 +0000
commit5babed1aa6b2f867e639193841b231c3a0200b87 (patch)
tree0157186e4e3c94762bc80c3372a9b94254854d7d /tests/unit/orchestrator
parent75f55c05789beb4fbe2391d33349058bba4ea5c0 (diff)
parent0d95404dcdbda326a3fffa344a8295bf696f9626 (diff)
Merge "Record task status if running via CLI"
Diffstat (limited to 'tests/unit/orchestrator')
0 files changed, 0 insertions, 0 deletions
or: #008800; font-weight: bold } /* Keyword.Declaration */ .highlight .kn { color: #008800; font-weight: bold } /* Keyword.Namespace */ .highlight .kp { color: #008800 } /* Keyword.Pseudo */ .highlight .kr { color: #008800; font-weight: bold } /* Keyword.Reserved */ .highlight .kt { color: #888888; font-weight: bold } /* Keyword.Type */ .highlight .m { color: #0000DD; font-weight: bold } /* Literal.Number */ .highlight .s { color: #dd2200; background-color: #fff0f0 } /* Literal.String */ .highlight .na { color: #336699 } /* Name.Attribute */ .highlight .nb { color: #003388 } /* Name.Builtin */ .highlight .nc { color: #bb0066; font-weight: bold } /* Name.Class */ .highlight .no { color: #003366; font-weight: bold } /* Name.Constant */ .highlight .nd { color: #555555 } /* Name.Decorator */ .highlight .ne { color: #bb0066; font-weight: bold } /* Name.Exception */ .highlight .nf { color: #0066bb; font-weight: bold } /* Name.Function */ .highlight .nl { color: #336699; font-style: italic } /* Name.Label */ .highlight .nn { color: #bb0066; font-weight: bold } /* Name.Namespace */ .highlight .py { color: #336699; font-weight: bold } /* Name.Property */ .highlight .nt { color: #bb0066; font-weight: bold } /* Name.Tag */ .highlight .nv { color: #336699 } /* Name.Variable */ .highlight .ow { color: #008800 } /* Operator.Word */ .highlight .w { color: #bbbbbb } /* Text.Whitespace */ .highlight .mb { color: #0000DD; font-weight: bold } /* Literal.Number.Bin */ .highlight .mf { color: #0000DD; font-weight: bold } /* Literal.Number.Float */ .highlight .mh { color: #0000DD; font-weight: bold } /* Literal.Number.Hex */ .highlight .mi { color: #0000DD; font-weight: bold } /* Literal.Number.Integer */ .highlight .mo { color: #0000DD; font-weight: bold } /* Literal.Number.Oct */ .highlight .sa { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Affix */ .highlight .sb { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Backtick */ .highlight .sc { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Char */ .highlight .dl { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Delimiter */ .highlight .sd { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Doc */ .highlight .s2 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Double */ .highlight .se { color: #0044dd; background-color: #fff0f0 } /* Literal.String.Escape */ .highlight .sh { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Heredoc */ .highlight .si { color: #3333bb; background-color: #fff0f0 } /* Literal.String.Interpol */ .highlight .sx { color: #22bb22; background-color: #f0fff0 } /* Literal.String.Other */ .highlight .sr { color: #008800; background-color: #fff0ff } /* Literal.String.Regex */ .highlight .s1 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Single */ .highlight .ss { color: #aa6600; background-color: #fff0f0 } /* Literal.String.Symbol */ .highlight .bp { color: #003388 } /* Name.Builtin.Pseudo */ .highlight .fm { color: #0066bb; font-weight: bold } /* Name.Function.Magic */ .highlight .vc { color: #336699 } /* Name.Variable.Class */ .highlight .vg { color: #dd7700 } /* Name.Variable.Global */ .highlight .vi { color: #3333bb } /* Name.Variable.Instance */ .highlight .vm { color: #336699 } /* Name.Variable.Magic */ .highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */
#define CS4245_CHIP_ID		0x01
#define CS4245_POWER_CTRL	0x02
#define CS4245_DAC_CTRL_1	0x03
#define CS4245_ADC_CTRL		0x04
#define CS4245_MCLK_FREQ	0x05
#define CS4245_SIGNAL_SEL	0x06
#define CS4245_PGA_B_CTRL	0x07
#define CS4245_PGA_A_CTRL	0x08
#define CS4245_ANALOG_IN	0x09
#define CS4245_DAC_A_CTRL	0x0a
#define CS4245_DAC_B_CTRL	0x0b
#define CS4245_DAC_CTRL_2	0x0c
#define CS4245_INT_STATUS	0x0d
#define CS4245_INT_MASK		0x0e
#define CS4245_INT_MODE_MSB	0x0f
#define CS4245_INT_MODE_LSB	0x10

/* Chip ID */
#define CS4245_CHIP_PART_MASK	0xf0
#define CS4245_CHIP_REV_MASK	0x0f

/* Power Control */
#define CS4245_FREEZE		0x80
#define CS4245_PDN_MIC		0x08
#define CS4245_PDN_ADC		0x04
#define CS4245_PDN_DAC		0x02
#define CS4245_PDN		0x01

/* DAC Control */
#define CS4245_DAC_FM_MASK	0xc0
#define CS4245_DAC_FM_SINGLE	0x00
#define CS4245_DAC_FM_DOUBLE	0x40
#define CS4245_DAC_FM_QUAD	0x80
#define CS4245_DAC_DIF_MASK	0x30
#define CS4245_DAC_DIF_LJUST	0x00
#define CS4245_DAC_DIF_I2S	0x10
#define CS4245_DAC_DIF_RJUST_16	0x20
#define CS4245_DAC_DIF_RJUST_24	0x30
#define CS4245_RESERVED_1	0x08
#define CS4245_MUTE_DAC		0x04
#define CS4245_DEEMPH		0x02
#define CS4245_DAC_MASTER	0x01

/* ADC Control */
#define CS4245_ADC_FM_MASK	0xc0
#define CS4245_ADC_FM_SINGLE	0x00
#define CS4245_ADC_FM_DOUBLE	0x40
#define CS4245_ADC_FM_QUAD	0x80
#define CS4245_ADC_DIF_MASK	0x10
#define CS4245_ADC_DIF_LJUST	0x00
#define CS4245_ADC_DIF_I2S	0x10
#define CS4245_MUTE_ADC		0x04
#define CS4245_HPF_FREEZE	0x02
#define CS4245_ADC_MASTER	0x01

/* MCLK Frequency */
#define CS4245_MCLK1_MASK	0x70
#define CS4245_MCLK1_SHIFT	4
#define CS4245_MCLK2_MASK	0x07
#define CS4245_MCLK2_SHIFT	0
#define CS4245_MCLK_1		0
#define CS4245_MCLK_1_5		1
#define CS4245_MCLK_2		2
#define CS4245_MCLK_3		3
#define CS4245_MCLK_4		4

/* Signal Selection */
#define CS4245_A_OUT_SEL_MASK	0x60
#define CS4245_A_OUT_SEL_HIZ	0x00
#define CS4245_A_OUT_SEL_DAC	0x20
#define CS4245_A_OUT_SEL_PGA	0x40
#define CS4245_LOOP		0x02
#define CS4245_ASYNCH		0x01

/* Channel B/A PGA Control */
#define CS4245_PGA_GAIN_MASK	0x3f

/* ADC Input Control */
#define CS4245_PGA_SOFT		0x10
#define CS4245_PGA_ZERO		0x08
#define CS4245_SEL_MASK		0x07
#define CS4245_SEL_MIC		0x00
#define CS4245_SEL_INPUT_1	0x01
#define CS4245_SEL_INPUT_2	0x02
#define CS4245_SEL_INPUT_3	0x03
#define CS4245_SEL_INPUT_4	0x04
#define CS4245_SEL_INPUT_5	0x05
#define CS4245_SEL_INPUT_6	0x06

/* DAC Channel A/B Volume Control */
#define CS4245_VOL_MASK		0xff

/* DAC Control 2 */
#define CS4245_DAC_SOFT		0x80
#define CS4245_DAC_ZERO		0x40
#define CS4245_INVERT_DAC	0x20
#define CS4245_INT_ACTIVE_HIGH	0x01

/* Interrupt Status/Mask/Mode */
#define CS4245_ADC_CLK_ERR	0x08
#define CS4245_DAC_CLK_ERR	0x04
#define CS4245_ADC_OVFL		0x02
#define CS4245_ADC_UNDRFL	0x01

#define CS4245_SPI_ADDRESS_S	(0x9e << 16)
#define CS4245_SPI_WRITE_S	(0 << 16)

#define CS4245_SPI_ADDRESS	0x9e
#define CS4245_SPI_WRITE	0
#define CS4245_SPI_READ		1