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authorAbhijit Sinha <abhijit.sinha@intel.com>2019-01-03 17:27:11 +0000
committerGerrit Code Review <gerrit@opnfv.org>2019-01-03 17:27:11 +0000
commit62fda8b9ec846747a6132c980f8e892b74de6d25 (patch)
tree801c70e1f295fe6c50f7cd68943af49f6351be33 /ansible/roles/vcpu_pin_set_setup
parent0ef21e67f84dfbb48230ad164041e867537ed331 (diff)
parent92d0631ed6dd48d7c323c4bf76350be6e920176f (diff)
Merge "NSB support for [core x-y] NSB PROX NFVI configuration"
Diffstat (limited to 'ansible/roles/vcpu_pin_set_setup')
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