summaryrefslogtreecommitdiffstats
path: root/VNFs/DPPD-PROX/flow_gen/flow_gen_4ports.cfg
blob: ccac3eb77e7072203e08c8f443abcc8cb8b1baf6 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
;;
;; Copyright (c) 2010-2017 Intel Corporation
;;
;; Licensed under the Apache License, Version 2.0 (the "License");
;; you may not use this file except in compliance with the License.
;; You may obtain a copy of the License at
;;
;;     http://www.apache.org/licenses/LICENSE-2.0
;;
;; Unless required by applicable law or agreed to in writing, software
;; distributed under the License is distributed on an "AS IS" BASIS,
;; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;; See the License for the specific language governing permissions and
;; limitations under the License.
;;

[eal options]
-n=4 ; force number of memory channels
no-output=no ; disable DPDK debug output

[port 2]
name=port_a
mac=00:00:00:00:00:03
rx desc=512
tx desc=1024
[port 3]
name=port_b
mac=00:00:00:00:00:04
rx desc=512
tx desc=1024

[port 4]
name=port_c
mac=00:00:00:00:00:01
rx desc=512
tx desc=1024
[port 5]
name=port_d
mac=00:00:00:00:00:02
rx desc=512
tx desc=1024

[lua]
dofile("flow_gen_4ports.lua")
[variables]
$drop=no

[defaults]
mempool size=$mempool_size

[global]
start time=5
name=L4 Gen

[core 0s0]
mode=master

[core 1s0]
task=0
mode=lbpos
tx cores=$port_a_clients
rx port=port_a
mempool size=32K
mbuf size=2560
byte offset=26
drop=$drop
ring size=16384

[core 1s0h]
task=0
mode=lbpos
tx cores=$port_b_servers
rx port=port_b
mbuf size=2560
byte offset=26
drop=$drop
ring size=16384

;;;------------------------------

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
[core $port_a_clients]
name=p0
task=0
mode=genl4
tx port=port_a
rx ring=yes
bps=$bps
streams=c_${self}
concur conn=$conn
max setup rate=$msr

[core $port_b_servers]
name=p0
task=0
mode=genl4
sub mode=server
rx ring=yes
tx port=port_b
bps=$bps
streams=s_${self}
concur conn=$conn

;;;;;;; socket 1 ;;;;;;;;;;;;;;;;;;;;;;;

[core 1s1]
name=ld
task=0
mode=lbpos
tx cores=$port_c_clients
rx port=port_c
mempool size=32K
mbuf size=2560
byte offset=26
drop=$drop
ring size=16384

[core 1s1h]
name=ld
task=0
mode=lbpos
tx cores=$port_d_servers
rx port=port_d
mbuf size=2560
byte offset=26
drop=$drop
ring size=16384

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
[core $port_c_clients]
name=p0
task=0
mode=genl4
tx port=port_c
rx ring=yes
bps=$bps
streams=c_${self}
concur conn=$conn
max setup rate=$msr

[core $port_d_servers]
name=p0
task=0
mode=genl4
sub mode=server
rx ring=yes
tx port=port_d
bps=$bps
streams=s_${self}
concur conn=$conn
">key; }; /** * A structure defining the ACL pipeline table. */ struct acl_table_entry { struct rte_pipeline_table_entry head; uint32_t action_id; }; /* Define ACL actions for bitmap */ #define acl_action_packet_drop 1 #define acl_action_packet_accept 2 #define acl_action_nat 4 #define acl_action_fwd 8 #define acl_action_count 16 #define acl_action_dscp 32 #define acl_action_conntrack 64 #define acl_action_connexist 128 #define acl_private_public 0 #define acl_public_private 1 #define action_array_max 10000 /** * A structure defining the key to store an ACL action. */ struct pipeline_action_key { uint32_t action_id; uint32_t action_bitmap; uint32_t nat_port; uint32_t fwd_port; uint8_t dscp_priority; uint8_t private_public; } __rte_cache_aligned; /** * A structure defining the Action counters. * One Action Counter Block per ACL thread. */ struct action_counter_block { uint64_t byteCount; uint64_t packetCount; } __rte_cache_aligned; extern struct pipeline_action_key *action_array_a; extern struct pipeline_action_key *action_array_b; extern struct pipeline_action_key *action_array_active; extern struct pipeline_action_key *action_array_standby; extern uint32_t action_array_size; extern struct action_counter_block action_counter_table[MAX_ACL_INSTANCES][action_array_max] __rte_cache_aligned; enum pipeline_acl_msg_req_type { PIPELINE_ACL_MSG_REQ_DBG = 0, PIPELINE_ACL_MSG_REQS }; /** * A structure defining the add ACL rule command response message. */ struct pipeline_acl_add_msg_rsp { int status; int key_found; void *entry_ptr; }; /** * A structure defining the debug command request message. */ struct pipeline_acl_dbg_msg_req { enum pipeline_msg_req_type type; enum pipeline_acl_msg_req_type subtype; /* data */ uint8_t dbg; }; /** * A structure defining the debug command response message. */ struct pipeline_acl_dbg_msg_rsp { int status; void *entry_ptr; }; extern struct pipeline_be_ops pipeline_acl_be_ops; extern int rte_ct_initialize_default_timeouts(struct rte_ct_cnxn_tracker *new_cnxn_tracker); #endif