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author | Anand B Jyoti <anand.b.jyoti@intel.com> | 2017-06-02 10:37:48 +0530 |
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committer | Anand B Jyoti <anand.b.jyoti@intel.com> | 2017-06-27 08:59:14 +0530 |
commit | 56400cedab3a066b10401f676a8ee86c2463ff53 (patch) | |
tree | f74746192d89478337bc94ce0fbfbe10a177dc53 /common/VIL/pipeline_loadb/pipeline_loadb_be.h | |
parent | a25ebbda95517a2eddb1c8291c258e8e4f167af7 (diff) |
vCGNAPT: correcting to use default rte_ring_dequeue
JIRA: SAMPLEVNF-19
The rte_ring_sc_dequeue returns ENOENT in DPDK16.04 while ENOBUFS in
DPDK17.05. This leads to error in return value checking and mis behaviour.
Using of rte_ring_sc_dequeue() to be avoided to use the default
configuration as set during the creation of the queue as per the
DPDK API documentation. Similarly corrected for mp_dequeue as well.
Change-Id: Iacee1349b26d6ab432be891fad12313a6d68ca4d
Signed-off-by: Anand B Jyoti <anand.b.jyoti@intel.com>
Diffstat (limited to 'common/VIL/pipeline_loadb/pipeline_loadb_be.h')
0 files changed, 0 insertions, 0 deletions