summaryrefslogtreecommitdiffstats
path: root/qemu/roms/openbios/include/arch/x86/pci.h
blob: 49247d97cdf6227ace6805f5b89b83c9252d5871 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
#ifndef i386_PCI_H
#define i386_PCI_H

#include "asm/io.h"

#if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2))
#define PCI_CONFIG_1 1 /* default */
#endif

#ifdef PCI_CONFIG_1

/* PCI Configuration Mechanism #1 */

/* Have pci_addr in the same format as the values written to 0xcf8
 * so register accesses can be made easy. */
#define PCI_ADDR(bus, dev, fn) \
    ((pci_addr) (0x80000000u \
		| (uint32_t) (bus) << 16 \
		| (uint32_t) (dev) << 11 \
		| (uint32_t) (fn) << 8))

#define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16))
#define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f)
#define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7)

static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
{
    outl(dev | (reg & ~3), 0xcf8);
    return inb(0xcfc | (reg & 3));
}

static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
{
    outl(dev | (reg & ~3), 0xcf8);
    return inw(0xcfc | (reg & 2));
}

static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
{
    outl(dev | reg, 0xcf8);
    return inl(0xcfc | reg);
}

static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
{
    outl(dev | (reg & ~3), 0xcf8);
    outb(val, 0xcfc | (reg & 3));
}

static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
{
    outl(dev | (reg & ~3), 0xcf8);
    outw(val, 0xcfc | (reg & 2));
}

static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
{
    outl(dev | reg, 0xcf8);
    outl(val, 0xcfc);
}

#else /* !PCI_CONFIG_1 */
#error PCI Configuration Mechanism is not specified or implemented
#endif

#endif /* i386_PCI_H */