blob: 9bd2243bece0d91bbe143bac6143f6835e30e4b9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
|
/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
/**
* @file drv_pcie_rc_intf.h
* Interface definitions for the PCIE Root Complex.
*/
#ifndef _SYS_HV_DRV_PCIE_RC_INTF_H
#define _SYS_HV_DRV_PCIE_RC_INTF_H
/** File offset for reading the interrupt base number used for PCIE legacy
interrupts and PLX Gen 1 requirement flag */
#define PCIE_RC_CONFIG_MASK_OFF 0
/**
* Structure used for obtaining PCIe config information, read from the PCIE
* subsystem /ctl file at initialization
*/
typedef struct pcie_rc_config
{
int intr; /**< interrupt number used for downcall */
int plx_gen1; /**< flag for PLX Gen 1 configuration */
} pcie_rc_config_t;
#endif /* _SYS_HV_DRV_PCIE_RC_INTF_H */
|