summaryrefslogtreecommitdiffstats
path: root/kernel/arch/arm/boot/dts/axm5516-cpus.dtsi
blob: b85f360cb12561da823a45fe26bb5ec7566d78c6 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
/*
 * arch/arm/boot/dts/axm5516-cpus.dtsi
 *
 * Copyright (C) 2013 LSI
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&CPU0>;
				};
				core1 {
					cpu = <&CPU1>;
				};
				core2 {
					cpu = <&CPU2>;
				};
				core3 {
					cpu = <&CPU3>;
				};
			};
			cluster1 {
				core0 {
					cpu = <&CPU4>;
				};
				core1 {
					cpu = <&CPU5>;
				};
				core2 {
					cpu = <&CPU6>;
				};
				core3 {
					cpu = <&CPU7>;
				};
			};
			cluster2 {
				core0 {
					cpu = <&CPU8>;
				};
				core1 {
					cpu = <&CPU9>;
				};
				core2 {
					cpu = <&CPU10>;
				};
				core3 {
					cpu = <&CPU11>;
				};
			};
			cluster3 {
				core0 {
					cpu = <&CPU12>;
				};
				core1 {
					cpu = <&CPU13>;
				};
				core2 {
					cpu = <&CPU14>;
				};
				core3 {
					cpu = <&CPU15>;
				};
			};
		};

		CPU0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x00>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x01>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x02>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x03>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU4: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x100>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU5: cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x101>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU6: cpu@102 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x102>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU7: cpu@103 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x103>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU8: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x200>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU9: cpu@201 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x201>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU10: cpu@202 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x202>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU11: cpu@203 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x203>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU12: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x300>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU13: cpu@301 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x301>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU14: cpu@302 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x302>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};

		CPU15: cpu@303 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x303>;
			clock-frequency= <1400000000>;
			cpu-release-addr = <0>; // Fixed by the boot loader
		};
	};
};
ass="n">tps65912 *tps65912 = tps65912_gpio->tps65912; return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, GPIO_CFG_MASK); } static struct gpio_chip template_chip = { .label = "tps65912", .owner = THIS_MODULE, .direction_input = tps65912_gpio_input, .direction_output = tps65912_gpio_output, .get = tps65912_gpio_get, .set = tps65912_gpio_set, .can_sleep = true, .ngpio = 5, .base = -1, }; static int tps65912_gpio_probe(struct platform_device *pdev) { struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent); struct tps65912_board *pdata = dev_get_platdata(tps65912->dev); struct tps65912_gpio_data *tps65912_gpio; int ret; tps65912_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65912_gpio), GFP_KERNEL); if (tps65912_gpio == NULL) return -ENOMEM; tps65912_gpio->tps65912 = tps65912; tps65912_gpio->gpio_chip = template_chip; tps65912_gpio->gpio_chip.dev = &pdev->dev; if (pdata && pdata->gpio_base) tps65912_gpio->gpio_chip.base = pdata->gpio_base; ret = gpiochip_add(&tps65912_gpio->gpio_chip); if (ret < 0) { dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret); return ret; } platform_set_drvdata(pdev, tps65912_gpio); return ret; } static int tps65912_gpio_remove(struct platform_device *pdev) { struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev); gpiochip_remove(&tps65912_gpio->gpio_chip); return 0; } static struct platform_driver tps65912_gpio_driver = { .driver = { .name = "tps65912-gpio", }, .probe = tps65912_gpio_probe, .remove = tps65912_gpio_remove, }; static int __init tps65912_gpio_init(void) { return platform_driver_register(&tps65912_gpio_driver); } subsys_initcall(tps65912_gpio_init); static void __exit tps65912_gpio_exit(void) { platform_driver_unregister(&tps65912_gpio_driver); } module_exit(tps65912_gpio_exit); MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>"); MODULE_DESCRIPTION("GPIO interface for TPS65912 PMICs"); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:tps65912-gpio");