diff options
Diffstat (limited to 'qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds')
| -rw-r--r-- | qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile | 91 | ||||
| -rw-r--r-- | qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c | 67 |
2 files changed, 158 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile new file mode 100644 index 000000000..9f338024e --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile @@ -0,0 +1,91 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c new file mode 100644 index 000000000..71178e4b9 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c @@ -0,0 +1,67 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/io.h> +#include <nand.h> + +u32 sysclk_tbl[] = { + 33333000, 39999600, 49999500, 66666000, + 83332500, 99999000, 133332000, 166665000 +}; + +void board_init_f(ulong bootflag) +{ + int px_spd; + u32 plat_ratio, bus_clk, sys_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + +#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) + /* for FPGA */ + set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); + set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); +#else +#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined +#endif + + /* initialize selected port with appropriate baud rate */ + px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); + sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK]; + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + bus_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} |