diff options
Diffstat (limited to 'qemu/roms/u-boot/board/davinci/sonata')
| -rw-r--r-- | qemu/roms/u-boot/board/davinci/sonata/Makefile | 11 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/davinci/sonata/board_init.S | 87 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/davinci/sonata/config.mk | 39 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/davinci/sonata/sonata.c | 87 |
4 files changed, 224 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/davinci/sonata/Makefile b/qemu/roms/u-boot/board/davinci/sonata/Makefile new file mode 100644 index 000000000..92e1a180c --- /dev/null +++ b/qemu/roms/u-boot/board/davinci/sonata/Makefile @@ -0,0 +1,11 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := sonata.o +obj-y += board_init.o diff --git a/qemu/roms/u-boot/board/davinci/sonata/board_init.S b/qemu/roms/u-boot/board/davinci/sonata/board_init.S new file mode 100644 index 000000000..0a47ad5eb --- /dev/null +++ b/qemu/roms/u-boot/board/davinci/sonata/board_init.S @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer + * Sonata boards, AFAIK, don't use this so it's just return by default. Ask + * Visioneering if they reinvented the wheel once again to make sure :) + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: +#ifdef SONATA_BOARD_GPIOWP + /* Set PINMUX0 to enable GPIO4 */ + ldr r0, _PINMUX0 + ldr r1, GPIO4_EN_MASK + ldr r2, [r0] + and r2, r2, r1 + str r2, [r0] + + /* Enable GPIO LPSC module */ + ldr r0, PTSTAT + +gpio_ptstat_loop1: + ldr r2, [r0] + tst r2, $0x00000001 + bne gpio_ptstat_loop1 + + ldr r1, MDCTL_GPIO + ldr r2, [r1] + and r2, r2, $0xfffffff8 + orr r2, r2, $0x00000003 + str r2, [r1] + + orr r2, r2, $0x00000200 + str r2, [r1] + + ldr r1, PTCMD + mov r2, $0x00000001 + str r2, [r1] + +gpio_ptstat_loop2: + ldr r2, [r0] + tst r2, $0x00000001 + bne gpio_ptstat_loop2 + + ldr r0, MDSTAT_GPIO +gpio_mdstat_loop: + ldr r2, [r0] + and r2, r2, $0x0000001f + teq r2, $0x00000003 + bne gpio_mdstat_loop + + /* GPIO4 -> output */ + ldr r0, GPIO_DIR01 + mov r1, $0x10 + ldr r2, [r0] + bic r2, r2, r0 + str r2, [r0] + + /* Set it to 0 (Write Protect) */ + ldr r0, GPIO_CLR_DATA01 + str r1, [r0] +#endif + + mov pc, lr + +#ifdef SONATA_BOARD_GPIOWP +.ltorg + +GPIO4_EN_MASK: + .word 0xf77fffff +MDCTL_GPIO: + .word 0x01c41a68 +MDSTAT_GPIO: + .word 0x01c41868 +GPIO_DIR01: + .word 0x01c67010 +GPIO_CLR_DATA01: + .word 0x01c6701c +#endif diff --git a/qemu/roms/u-boot/board/davinci/sonata/config.mk b/qemu/roms/u-boot/board/davinci/sonata/config.mk new file mode 100644 index 000000000..ed8070723 --- /dev/null +++ b/qemu/roms/u-boot/board/davinci/sonata/config.mk @@ -0,0 +1,39 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> +# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> +# +# (C) Copyright 2003 +# Texas Instruments, <www.ti.com> +# Swaminathan <swami.iyer@ti.com> +# +# Davinci EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# Davinci EVM has 1 bank of 256 MB DDR RAM +# Physical Address: +# 8000'0000 to 9000'0000 +# +# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> +# +# Visioneering Corp. Sonata board (ARM926EJS) cpu +# +# Sonata board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu +# +# Schmoogie board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# we load ourself to 8108 '0000 +# +# + +#Provide at least 16MB spacing between us and the Linux Kernel image +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/qemu/roms/u-boot/board/davinci/sonata/sonata.c b/qemu/roms/u-boot/board/davinci/sonata/sonata.c new file mode 100644 index 000000000..aa0404124 --- /dev/null +++ b/qemu/roms/u-boot/board/davinci/sonata/sonata.c @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * SPDX-License-Identifier: GPL-2.0+ + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <nand.h> +#include <asm/arch/nand_defs.h> +#include <asm/arch/hardware.h> +#include <asm/arch/davinci_misc.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Configure AEMIF pins (although this should be configured at boot time + * with pull-up/pull-down resistors) */ + REG(PINMUX0) = 0x00000c1f; + + davinci_errata_workarounds(); + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_GPIO); + +#if !defined(CONFIG_SYS_USE_DSPLINK) + /* Powerup the DSP */ + dsp_on(); +#endif /* CONFIG_SYS_USE_DSPLINK */ + + davinci_enable_uart0(); + davinci_enable_emac(); + davinci_enable_i2c(); + + lpsc_on(DAVINCI_LPSC_TIMER1); + timer_init(); + + return(0); +} + +int misc_init_r(void) +{ + uint8_t eeprom_enetaddr[6]; + + /* Read Ethernet MAC address from EEPROM if available. */ + if (dvevm_read_mac_address(eeprom_enetaddr)) + davinci_sync_env_enetaddr(eeprom_enetaddr); + + return(0); +} + +#ifdef CONFIG_NAND_DAVINCI + +/* Set WP on deselect, write enable on select */ +static void nand_sonata_select_chip(struct mtd_info *mtd, int chip) +{ +#define GPIO_SET_DATA01 0x01c67018 +#define GPIO_CLR_DATA01 0x01c6701c +#define GPIO_NAND_WP (1 << 4) +#ifdef SONATA_BOARD_GPIOWP + if (chip < 0) { + REG(GPIO_CLR_DATA01) |= GPIO_NAND_WP; + } else { + REG(GPIO_SET_DATA01) |= GPIO_NAND_WP; + } +#endif +} + +int board_nand_init(struct nand_chip *nand) +{ + davinci_nand_init(nand); + nand->select_chip = nand_sonata_select_chip; + return 0; +} + +#endif /* CONFIG_NAND_DAVINCI */ |