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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/tests/tcg/lm32/test_lhu.S | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/tests/tcg/lm32/test_lhu.S')
| -rw-r--r-- | qemu/tests/tcg/lm32/test_lhu.S | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/qemu/tests/tcg/lm32/test_lhu.S b/qemu/tests/tcg/lm32/test_lhu.S new file mode 100644 index 000000000..8de7c5256 --- /dev/null +++ b/qemu/tests/tcg/lm32/test_lhu.S @@ -0,0 +1,49 @@ +.include "macros.inc" + +start + +test_name LHU_1 +load r1 data +lhu r3, (r1+0) +check_r3 0x7e7f + +test_name LHU_2 +load r1 data +lhu r3, (r1+2) +check_r3 0x7071 + +test_name LHU_3 +load r1 data +lhu r3, (r1+-2) +check_r3 0x7c7d + +test_name LHU_4 +load r1 data_msb +lhu r3, (r1+0) +check_r3 0xfeff + +test_name LHU_5 +load r1 data_msb +lhu r3, (r1+2) +check_r3 0xf0f1 + +test_name LHU_6 +load r1 data_msb +lhu r3, (r1+-2) +check_r3 0xfcfd + +test_name LHU_7 +load r3 data +lhu r3, (r3+0) +check_r3 0x7e7f + +end + +.data + .align 4 + .byte 0x7a, 0x7b, 0x7c, 0x7d +data: + .byte 0x7e, 0x7f, 0x70, 0x71 + .byte 0xfa, 0xfb, 0xfc, 0xfd +data_msb: + .byte 0xfe, 0xff, 0xf0, 0xf1 |