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authorRajithaY <rajithax.yerrumsetty@intel.com>2017-04-25 03:31:15 -0700
committerRajitha Yerrumchetty <rajithax.yerrumsetty@intel.com>2017-05-22 06:48:08 +0000
commitbb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch)
treeca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/drivers/pci/pci_sh4.c
parenta14b48d18a9ed03ec191cf16b162206998a895ce (diff)
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/drivers/pci/pci_sh4.c')
-rw-r--r--qemu/roms/u-boot/drivers/pci/pci_sh4.c82
1 files changed, 0 insertions, 82 deletions
diff --git a/qemu/roms/u-boot/drivers/pci/pci_sh4.c b/qemu/roms/u-boot/drivers/pci/pci_sh4.c
deleted file mode 100644
index d7f43c2bd..000000000
--- a/qemu/roms/u-boot/drivers/pci/pci_sh4.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * SH4 PCI Controller (PCIC) for U-Boot.
- * (C) Dustin McIntire (dustin@sensoria.com)
- * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
- *
- * u-boot/arch/sh/cpu/sh4/pci-sh4.c
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <pci.h>
-
-int pci_sh4_init(struct pci_controller *hose)
-{
- hose->first_busno = 0;
- hose->region_count = 0;
- hose->last_busno = 0xff;
-
- /* PCI memory space */
- pci_set_region(hose->regions + 0,
- CONFIG_PCI_MEM_BUS,
- CONFIG_PCI_MEM_PHYS,
- CONFIG_PCI_MEM_SIZE,
- PCI_REGION_MEM);
- hose->region_count++;
-
- /* PCI IO space */
- pci_set_region(hose->regions + 1,
- CONFIG_PCI_IO_BUS,
- CONFIG_PCI_IO_PHYS,
- CONFIG_PCI_IO_SIZE,
- PCI_REGION_IO);
- hose->region_count++;
-
-#if defined(CONFIG_PCI_SYS_BUS)
- /* PCI System Memory space */
- pci_set_region(hose->regions + 2,
- CONFIG_PCI_SYS_BUS,
- CONFIG_PCI_SYS_PHYS,
- CONFIG_PCI_SYS_SIZE,
- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
- hose->region_count++;
-#endif
-
- udelay(1000);
-
- pci_set_ops(hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- pci_sh4_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- pci_sh4_write_config_dword);
-
- pci_register_hose(hose);
-
- udelay(1000);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- hose->last_busno = pci_hose_scan(hose);
- return 0;
-}
-
-int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
-{
- return 0;
-}
-
-#ifdef CONFIG_PCI_SCAN_SHOW
-int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
-{
- return 1;
-}
-#endif /* CONFIG_PCI_SCAN_SHOW */