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authorRajithaY <rajithax.yerrumsetty@intel.com>2017-04-25 03:31:15 -0700
committerRajitha Yerrumchetty <rajithax.yerrumsetty@intel.com>2017-05-22 06:48:08 +0000
commitbb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch)
treeca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/doc/README.mxc_ocotp
parenta14b48d18a9ed03ec191cf16b162206998a895ce (diff)
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
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-Driver implementing the fuse API for Freescale's On-Chip OTP Controller (OCOTP)
-on MXC
-
-This IP can be found on the following SoCs:
- - Vybrid VF610,
- - i.MX6.
-
-Note that this IP is different from albeit similar to the IPs of the same name
-that can be found on the following SoCs:
- - i.MX23,
- - i.MX28,
- - i.MX50.
-
-The section numbers in this file refer to the i.MX6 Reference Manual.
-
-A fuse word contains 32 fuse bit slots, as explained in 46.2.1.
-
-A bank contains 8 fuse word slots, as explained in 46.2.1 and shown by the
-memory map in 46.4.
-
-Some fuse bit or word slots may not have the corresponding fuses actually
-implemented in the fusebox.
-
-See the README files of the SoCs using this driver in order to know the
-conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
-addresses.
-
-Fuse operations:
-
- Read
- Read operations are implemented as read accesses to the shadow registers,
- using "Bankx Wordy" from the memory map in 46.4. This is explained in
- detail by the first two paragraphs in 46.2.1.2.
-
- Sense
- Sense operations are implemented as the direct fusebox read explained by
- the steps in 46.2.1.2.
-
- Program
- Program operations are implemented as explained by the steps in 46.2.1.3.
- Following this operation, the shadow registers are not reloaded by the
- hardware.
-
- Override
- Override operations are implemented as write accesses to the shadow
- registers, as explained by the first paragraph in 46.2.1.3.
-
-Configuration:
-
- CONFIG_MXC_OCOTP
- Define this to enable the mxc_ocotp driver.