diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/doc/README.mips | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/doc/README.mips')
| -rw-r--r-- | qemu/roms/u-boot/doc/README.mips | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/qemu/roms/u-boot/doc/README.mips b/qemu/roms/u-boot/doc/README.mips deleted file mode 100644 index b28f6285c..000000000 --- a/qemu/roms/u-boot/doc/README.mips +++ /dev/null @@ -1,54 +0,0 @@ - -Notes for the MIPS architecture port of U-Boot - -Toolchains ----------- - - http://www.denx.de/wiki/DULG/ELDK - ELDK < DULG < DENX - - http://www.emdebian.org/crosstools.html - Embedded Debian -- Cross-development toolchains - - http://buildroot.uclibc.org/ - Buildroot - -Known Issues ------------- - - * Cache incoherency issue caused by do_bootelf_exec() at cmd_elf.c - - Cache will be disabled before entering the loaded ELF image without - writing back and invalidating cache lines. This leads to cache - incoherency in most cases, unless the code gets loaded after U-Boot - re-initializes the cache. The more common uImage 'bootm' command does - not suffer this problem. - - [workaround] To avoid this cache incoherency, - 1) insert flush_cache(all) before calling dcache_disable(), or - 2) fix dcache_disable() to do both flushing and disabling cache. - - * Note that Linux users need to kill dcache_disable() in do_bootelf_exec() - or override do_bootelf_exec() not to disable I-/D-caches, because most - Linux/MIPS ports don't re-enable caches after entering kernel_entry. - -TODOs ------ - - * Probe CPU types, I-/D-cache and TLB size etc. automatically - - * Secondary cache support missing - - * Initialize TLB entries redardless of their use - - * R2000/R3000 class parts are not supported - - * Limited testing across different MIPS variants - - * Due to cache initialization issues, the DRAM on board must be - initialized in board specific assembler language before the cache init - code is run -- that is, initialize the DRAM in lowlevel_init(). - - * centralize/share more CPU code of MIPS32, MIPS64 and XBurst - - * support Qemu Malta |