Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

3 files changed, 0 insertions, 258 deletions

diff --git a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/Makefile b/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/Makefile
deleted file mode 100644
index df72fc9f5..000000000
--- a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# (C) Copyright 2000-2012
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-ifndef	CONFIG_SPL_BUILD
-obj-y	:= sc_sps_1.o
-else
-obj-y	:= spl_boot.o
-endif
diff --git a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/sc_sps_1.c b/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/sc_sps_1.c
deleted file mode 100644
index 7f0b591b6..000000000
--- a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/sc_sps_1.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * SchulerControl GmbH, SC_SPS_1 module
- *
- * Copyright (C) 2012 Marek Vasut <marex@denx.de>
- * on behalf of DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux-mx28.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <linux/mii.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Functions
- */
-int board_early_init_f(void)
-{
-	/* IO0 clock at 480MHz */
-	mxs_set_ioclk(MXC_IOCLK0, 480000);
-	/* IO1 clock at 480MHz */
-	mxs_set_ioclk(MXC_IOCLK1, 480000);
-
-	/* SSP0 clock at 96MHz */
-	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
-	/* SSP2 clock at 96MHz */
-	mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
-
-#ifdef	CONFIG_CMD_USB
-	mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT);
-	mxs_iomux_setup_pad(MX28_PAD_AUART2_TX__GPIO_3_9 |
-			MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
-	gpio_direction_output(MX28_PAD_AUART2_TX__GPIO_3_9, 1);
-#endif
-
-	return 0;
-}
-
-int board_init(void)
-{
-	/* Adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
-	return 0;
-}
-
-int dram_init(void)
-{
-	return mxs_dram_init();
-}
-
-#ifdef	CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
-{
-	return mxsmmc_initialize(bis, 0, NULL, NULL);
-}
-#endif
-
-#ifdef	CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
-	struct mxs_clkctrl_regs *clkctrl_regs =
-		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
-	int ret;
-
-	ret = cpu_eth_init(bis);
-
-	clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet,
-		CLKCTRL_ENET_TIME_SEL_MASK,
-		CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN);
-
-	ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
-	if (ret) {
-		printf("FEC MXS: Unable to init FEC0\n");
-		return ret;
-	}
-
-	ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
-	if (ret) {
-		printf("FEC MXS: Unable to init FEC1\n");
-		return ret;
-	}
-
-	return ret;
-}
-
-#endif
diff --git a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/spl_boot.c b/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/spl_boot.c
deleted file mode 100644
index 60195c3a7..000000000
--- a/qemu/roms/u-boot/board/schulercontrol/sc_sps_1/spl_boot.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * SchulerControl GmbH, SC_SPS_1 module setup
- *
- * Copyright (C) 2012 Marek Vasut <marex@denx.de>
- * on behalf of DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/io.h>
-#include <asm/arch/iomux-mx28.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/sys_proto.h>
-
-#define	MUX_CONFIG_LED	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
-#define	MUX_CONFIG_SSP2	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
-#define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
-#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
-
-const iomux_cfg_t iomux_setup[] = {
-	/* -- Strick 3 -- */
-
-	/* FEC Ethernet */
-	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
-
-	MX28_PAD_ENET0_TX_CLK__GPIO_4_5,	/* ENET INT */
-
-	MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
-	MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
-	MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
-
-	/* -- Strick 4 -- */
-
-	/* EMI */
-	MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
-
-	MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
-
-	MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
-
-	MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
-
-	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
-	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
-
-	/* -- Strick 5 -- */
-
-	/* MMC0 */
-	MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
-	MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
-	MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
-	MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
-	MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
-	MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
-		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
-	MX28_PAD_SSP0_SCK__SSP0_SCK |
-		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
-
-	/* SPI2 (for flash) */
-	MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
-	MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
-	MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
-	MX28_PAD_SSP2_SS0__SSP2_D3 |
-		(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
-
-	/* -- Strick 6 -- */
-
-	/* I2C */
-	MX28_PAD_I2C0_SCL__I2C0_SCL,
-	MX28_PAD_I2C0_SDA__I2C0_SDA,
-
-	/* AUART0 */
-	MX28_PAD_AUART0_TX__AUART0_TX,
-	MX28_PAD_AUART0_RX__AUART0_RX,
-
-	/* MEGA interface */
-
-	/* Debug UART */
-	MX28_PAD_PWM0__DUART_RX,
-	MX28_PAD_PWM1__DUART_TX,
-
-	/* LED */
-	MX28_PAD_GPMI_D00__GPIO_0_0 | MUX_CONFIG_LED,
-	MX28_PAD_GPMI_D03__GPIO_0_3 | MUX_CONFIG_LED,
-	MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED,
-};
-
-void board_init_ll(const uint32_t arg, const uint32_t *resptr)
-{
-	mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
-}
-
-void mxs_adjust_memory_params(uint32_t *dram_vals)
-{
-	dram_vals[0x74 >> 2] = 0x0f02010a;
-}