summaryrefslogtreecommitdiffstats
path: root/qemu/roms/u-boot/board/freescale/mx6slevk
diff options
context:
space:
mode:
authorRajithaY <rajithax.yerrumsetty@intel.com>2017-04-25 03:31:15 -0700
committerRajitha Yerrumchetty <rajithax.yerrumsetty@intel.com>2017-05-22 06:48:08 +0000
commitbb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch)
treeca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/board/freescale/mx6slevk
parenta14b48d18a9ed03ec191cf16b162206998a895ce (diff)
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/freescale/mx6slevk')
-rw-r--r--qemu/roms/u-boot/board/freescale/mx6slevk/Makefile6
-rw-r--r--qemu/roms/u-boot/board/freescale/mx6slevk/imximage.cfg115
-rw-r--r--qemu/roms/u-boot/board/freescale/mx6slevk/mx6slevk.c159
3 files changed, 0 insertions, 280 deletions
diff --git a/qemu/roms/u-boot/board/freescale/mx6slevk/Makefile b/qemu/roms/u-boot/board/freescale/mx6slevk/Makefile
deleted file mode 100644
index 6e1971ee2..000000000
--- a/qemu/roms/u-boot/board/freescale/mx6slevk/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# (C) Copyright 2013 Freescale Semiconductor, Inc.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := mx6slevk.o
diff --git a/qemu/roms/u-boot/board/freescale/mx6slevk/imximage.cfg b/qemu/roms/u-boot/board/freescale/mx6slevk/imximage.cfg
deleted file mode 100644
index 16ea59762..000000000
--- a/qemu/roms/u-boot/board/freescale/mx6slevk/imximage.cfg
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- * Refer docs/README.imxmage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-
-BOOT_FROM sd
-
-/*
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type Address Value
- *
- * where:
- * Addr-type register length (1,2 or 4 bytes)
- * Address absolute address of the register
- * value value to be stored in the register
- */
-DATA 4 0x020c4018 0x00260324
-
-DATA 4 0x020c4068 0xffffffff
-DATA 4 0x020c406c 0xffffffff
-DATA 4 0x020c4070 0xffffffff
-DATA 4 0x020c4074 0xffffffff
-DATA 4 0x020c4078 0xffffffff
-DATA 4 0x020c407c 0xffffffff
-DATA 4 0x020c4080 0xffffffff
-
-DATA 4 0x020e0344 0x00003030
-DATA 4 0x020e0348 0x00003030
-DATA 4 0x020e034c 0x00003030
-DATA 4 0x020e0350 0x00003030
-DATA 4 0x020e030c 0x00000030
-DATA 4 0x020e0310 0x00000030
-DATA 4 0x020e0314 0x00000030
-DATA 4 0x020e0318 0x00000030
-DATA 4 0x020e0300 0x00000030
-DATA 4 0x020e031c 0x00000030
-DATA 4 0x020e0338 0x00000028
-DATA 4 0x020e0320 0x00000030
-DATA 4 0x020e032c 0x00000000
-DATA 4 0x020e033c 0x00000008
-DATA 4 0x020e0340 0x00000008
-DATA 4 0x020e05c4 0x00000030
-DATA 4 0x020e05cc 0x00000030
-DATA 4 0x020e05d4 0x00000030
-DATA 4 0x020e05d8 0x00000030
-DATA 4 0x020e05ac 0x00000030
-DATA 4 0x020e05c8 0x00000030
-DATA 4 0x020e05b0 0x00020000
-DATA 4 0x020e05b4 0x00000000
-DATA 4 0x020e05c0 0x00020000
-DATA 4 0x020e05d0 0x00080000
-
-DATA 4 0x021b001c 0x00008000
-DATA 4 0x021b085c 0x1b4700c7
-DATA 4 0x021b0800 0xa1390003
-DATA 4 0x021b0890 0x00300000
-DATA 4 0x021b08b8 0x00000800
-DATA 4 0x021b081c 0x33333333
-DATA 4 0x021b0820 0x33333333
-DATA 4 0x021b0824 0x33333333
-DATA 4 0x021b0828 0x33333333
-DATA 4 0x021b082c 0xf3333333
-DATA 4 0x021b0830 0xf3333333
-DATA 4 0x021b0834 0xf3333333
-DATA 4 0x021b0838 0xf3333333
-DATA 4 0x021b0848 0x4241444a
-DATA 4 0x021b0850 0x3030312b
-DATA 4 0x021b083c 0x20000000
-DATA 4 0x021b0840 0x00000000
-DATA 4 0x021b08c0 0x24911492
-DATA 4 0x021b08b8 0x00000800
-DATA 4 0x021b000c 0x33374133
-DATA 4 0x021b0004 0x00020024
-DATA 4 0x021b0010 0x00100A82
-DATA 4 0x021b0014 0x00000093
-DATA 4 0x021b0018 0x00001688
-DATA 4 0x021b002c 0x0f9f26d2
-DATA 4 0x021b0030 0x0000020e
-DATA 4 0x021b0038 0x00190778
-DATA 4 0x021b0008 0x00000000
-DATA 4 0x021b0040 0x0000004f
-DATA 4 0x021b0000 0xc3110000
-DATA 4 0x021b001c 0x003f8030
-DATA 4 0x021b001c 0xff0a8030
-DATA 4 0x021b001c 0x82018030
-DATA 4 0x021b001c 0x04028030
-DATA 4 0x021b001c 0x02038030
-DATA 4 0x021b001c 0xff0a8038
-DATA 4 0x021b001c 0x82018038
-DATA 4 0x021b001c 0x04028038
-DATA 4 0x021b001c 0x02038038
-DATA 4 0x021b0800 0xa1310003
-DATA 4 0x021b0020 0x00001800
-DATA 4 0x021b0818 0x00000000
-DATA 4 0x021b08b8 0x00000800
-DATA 4 0x021b0004 0x00025564
-DATA 4 0x021b0404 0x00011006
-DATA 4 0x021b001c 0x00000000
diff --git a/qemu/roms/u-boot/board/freescale/mx6slevk/mx6slevk.c b/qemu/roms/u-boot/board/freescale/mx6slevk/mx6slevk.c
deleted file mode 100644
index aadad3266..000000000
--- a/qemu/roms/u-boot/board/freescale/mx6slevk/mx6slevk.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * Author: Fabio Estevam <fabio.estevam@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm/arch/clock.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/io.h>
-#include <linux/sizes.h>
-#include <common.h>
-#include <fsl_esdhc.h>
-#include <mmc.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
-
- return 0;
-}
-
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const fec_pads[] = {
- MX6_PAD_FEC_MDC__FEC_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_MDIO__FEC_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_CRS_DV__FEC_RX_DV | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_RXD0__FEC_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_RXD1__FEC_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_TX_EN__FEC_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_TXD0__FEC_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_TXD1__FEC_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_REF_CLK__FEC_REF_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_FEC_RX_ER__GPIO_4_19 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
-static void setup_iomux_fec(void)
-{
- imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-
- /* Reset LAN8720 PHY */
- gpio_direction_output(ETH_PHY_RESET , 0);
- udelay(1000);
- gpio_set_value(ETH_PHY_RESET, 1);
-}
-
-static struct fsl_esdhc_cfg usdhc_cfg[1] = {
- {USDHC2_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- return 1; /* Assume boot SD always present */
-}
-
-int board_mmc_init(bd_t *bis)
-{
- imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-}
-
-#ifdef CONFIG_FEC_MXC
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_fec();
-
- return cpu_eth_init(bis);
-}
-
-static int setup_fec(void)
-{
- struct iomuxc_base_regs *iomuxc_regs =
- (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
- int ret;
-
- /* clear gpr1[14], gpr1[18:17] to select anatop clock */
- clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0);
-
- ret = enable_fec_anatop_clock(ENET_50MHz);
- if (ret)
- return ret;
-
- return 0;
-}
-#endif
-
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_FEC_MXC
- setup_fec();
-#endif
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- return get_cpu_rev();
-}
-
-int checkboard(void)
-{
- puts("Board: MX6SLEVK\n");
-
- return 0;
-}