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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/eukrea
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/eukrea')
-rw-r--r--qemu/roms/u-boot/board/eukrea/cpu9260/Makefile17
-rw-r--r--qemu/roms/u-boot/board/eukrea/cpu9260/cpu9260.c158
-rw-r--r--qemu/roms/u-boot/board/eukrea/cpu9260/led.c139
-rw-r--r--qemu/roms/u-boot/board/eukrea/cpuat91/Makefile8
-rw-r--r--qemu/roms/u-boot/board/eukrea/cpuat91/cpuat91.c75
5 files changed, 397 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/eukrea/cpu9260/Makefile b/qemu/roms/u-boot/board/eukrea/cpu9260/Makefile
new file mode 100644
index 000000000..e34792ac4
--- /dev/null
+++ b/qemu/roms/u-boot/board/eukrea/cpu9260/Makefile
@@ -0,0 +1,17 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian@popies.net
+# Lead Tech Design <www.leadtechdesign.com>
+# Ilko Iliev <www.ronetix.at>
+#
+# (C) Copyright 2009
+# Eric Benard <eric@eukrea.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += cpu9260.o
+obj-y += led.o
diff --git a/qemu/roms/u-boot/board/eukrea/cpu9260/cpu9260.c b/qemu/roms/u-boot/board/eukrea/cpu9260/cpu9260.c
new file mode 100644
index 000000000..01ecccb8c
--- /dev/null
+++ b/qemu/roms/u-boot/board/eukrea/cpu9260/cpu9260.c
@@ -0,0 +1,158 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ * Ilko Iliev <www.ronetix.at>
+ *
+ * (C) Copyright 2009-2011
+ * Eric Benard <eric@eukrea.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_matrix.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_pio.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/hardware.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+#ifdef CONFIG_CMD_NAND
+static void cpu9260_nand_hw_init(void)
+{
+ unsigned long csa;
+ at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC;
+ at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ /* Enable CS3 */
+ csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
+ writel(csa, &matrix->csa);
+
+ /* Configure SMC CS3 for NAND/SmartMedia */
+#if defined(CONFIG_CPU9G20)
+ writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
+ AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+#elif defined(CONFIG_CPU9260)
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(2),
+ &smc->cs[3].mode);
+#endif
+
+ writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+
+ /* Configure RDY/BSY */
+ gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
+
+ /* Enable NandFlash */
+ gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void cpu9260_macb_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ /* Enable clock */
+ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+
+ at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
+
+ at91_phy_reset();
+
+ at91_macb_hw_init();
+}
+#endif
+
+int board_early_init_f(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ writel((1 << ATMEL_ID_PIOA) |
+ (1 << ATMEL_ID_PIOB) |
+ (1 << ATMEL_ID_PIOC),
+ &pmc->pcer);
+
+ at91_seriald_hw_init();
+
+ return 0;
+}
+
+
+int board_init(void)
+{
+ /* arch number of the board */
+#if defined(CONFIG_CPU9G20)
+ gd->bd->bi_arch_number = MACH_TYPE_CPUAT9G20;
+#elif defined(CONFIG_CPU9260)
+ gd->bd->bi_arch_number = MACH_TYPE_CPUAT9260;
+#endif
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_CMD_NAND
+ cpu9260_nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+ cpu9260_macb_hw_init();
+#endif
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_MACB
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0);
+#endif
+ return rc;
+}
diff --git a/qemu/roms/u-boot/board/eukrea/cpu9260/led.c b/qemu/roms/u-boot/board/eukrea/cpu9260/led.c
new file mode 100644
index 000000000..0cfe0a69f
--- /dev/null
+++ b/qemu/roms/u-boot/board/eukrea/cpu9260/led.c
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2009 Wind River Systems, Inc.
+ * Tom Rix <Tom.Rix@windriver.com>
+ * (C) Copyright 2009
+ * Eric Benard <eric@eukrea.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <status_led.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/io.h>
+
+static unsigned int saved_state[4] = {STATUS_LED_OFF, STATUS_LED_OFF,
+ STATUS_LED_OFF, STATUS_LED_OFF};
+
+void coloured_LED_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ /* Enable clock */
+ writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+
+ at91_set_pio_output(CONFIG_RED_LED, 1);
+ at91_set_pio_output(CONFIG_GREEN_LED, 1);
+ at91_set_pio_output(CONFIG_YELLOW_LED, 1);
+ at91_set_pio_output(CONFIG_BLUE_LED, 1);
+
+ at91_set_pio_value(CONFIG_RED_LED, 1);
+ at91_set_pio_value(CONFIG_GREEN_LED, 1);
+ at91_set_pio_value(CONFIG_YELLOW_LED, 1);
+ at91_set_pio_value(CONFIG_BLUE_LED, 1);
+}
+
+void red_led_off(void)
+{
+ at91_set_pio_value(CONFIG_RED_LED, 1);
+ saved_state[STATUS_LED_RED] = STATUS_LED_OFF;
+}
+
+void green_led_off(void)
+{
+ at91_set_pio_value(CONFIG_GREEN_LED, 1);
+ saved_state[STATUS_LED_GREEN] = STATUS_LED_OFF;
+}
+
+void yellow_led_off(void)
+{
+ at91_set_pio_value(CONFIG_YELLOW_LED, 1);
+ saved_state[STATUS_LED_YELLOW] = STATUS_LED_OFF;
+}
+
+void blue_led_off(void)
+{
+ at91_set_pio_value(CONFIG_BLUE_LED, 1);
+ saved_state[STATUS_LED_BLUE] = STATUS_LED_OFF;
+}
+
+void red_led_on(void)
+{
+ at91_set_pio_value(CONFIG_RED_LED, 0);
+ saved_state[STATUS_LED_RED] = STATUS_LED_ON;
+}
+
+void green_led_on(void)
+{
+ at91_set_pio_value(CONFIG_GREEN_LED, 0);
+ saved_state[STATUS_LED_GREEN] = STATUS_LED_ON;
+}
+
+void yellow_led_on(void)
+{
+ at91_set_pio_value(CONFIG_YELLOW_LED, 0);
+ saved_state[STATUS_LED_YELLOW] = STATUS_LED_ON;
+}
+
+void blue_led_on(void)
+{
+ at91_set_pio_value(CONFIG_BLUE_LED, 0);
+ saved_state[STATUS_LED_BLUE] = STATUS_LED_ON;
+}
+
+void __led_init(led_id_t mask, int state)
+{
+ __led_set(mask, state);
+}
+
+void __led_toggle(led_id_t mask)
+{
+ if (STATUS_LED_BLUE == mask) {
+ if (STATUS_LED_ON == saved_state[STATUS_LED_BLUE])
+ blue_led_off();
+ else
+ blue_led_on();
+ } else if (STATUS_LED_RED == mask) {
+ if (STATUS_LED_ON == saved_state[STATUS_LED_RED])
+ red_led_off();
+ else
+ red_led_on();
+ } else if (STATUS_LED_GREEN == mask) {
+ if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN])
+ green_led_off();
+ else
+ green_led_on();
+ } else if (STATUS_LED_YELLOW == mask) {
+ if (STATUS_LED_ON == saved_state[STATUS_LED_YELLOW])
+ yellow_led_off();
+ else
+ yellow_led_on();
+ }
+}
+
+void __led_set(led_id_t mask, int state)
+{
+ if (STATUS_LED_BLUE == mask) {
+ if (STATUS_LED_ON == state)
+ blue_led_on();
+ else
+ blue_led_off();
+ } else if (STATUS_LED_RED == mask) {
+ if (STATUS_LED_ON == state)
+ red_led_on();
+ else
+ red_led_off();
+ } else if (STATUS_LED_GREEN == mask) {
+ if (STATUS_LED_ON == state)
+ green_led_on();
+ else
+ green_led_off();
+ } else if (STATUS_LED_YELLOW == mask) {
+ if (STATUS_LED_ON == state)
+ yellow_led_on();
+ else
+ yellow_led_off();
+ }
+}
diff --git a/qemu/roms/u-boot/board/eukrea/cpuat91/Makefile b/qemu/roms/u-boot/board/eukrea/cpuat91/Makefile
new file mode 100644
index 000000000..59b80c267
--- /dev/null
+++ b/qemu/roms/u-boot/board/eukrea/cpuat91/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de. <http://lists.denx.de/mailman/listinfo/u-boot>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := cpuat91.o
diff --git a/qemu/roms/u-boot/board/eukrea/cpuat91/cpuat91.c b/qemu/roms/u-boot/board/eukrea/cpuat91/cpuat91.c
new file mode 100644
index 000000000..ec0ce0b20
--- /dev/null
+++ b/qemu/roms/u-boot/board/eukrea/cpuat91/cpuat91.c
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2006-2010 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <eric@eukrea.com>
+ * based on at91rm9200dk.c which is :
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_pio.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init(void)
+{
+ /* arch number of CPUAT91-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_CPUAT91;
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ at91_seriald_hw_init();
+ return 0;
+}
+
+
+int dram_init(void)
+{
+ /* dram_init must store complete ramsize in gd->ram_size */
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+#ifdef CONFIG_DRIVER_AT91EMAC
+int board_eth_init(bd_t *bis)
+{
+ return at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
+}
+#endif
+
+#ifdef CONFIG_SYS_I2C_SOFT
+void i2c_init_board(void)
+{
+ u32 pin;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
+
+ writel(1 << AT91_ID_PIOA, &pmc->pcer);
+ pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
+ writel(pin, &pio->pioa.idr);
+ writel(pin, &pio->pioa.pudr);
+ writel(pin, &pio->pioa.per);
+ writel(pin, &pio->pioa.oer);
+ writel(pin, &pio->pioa.sodr);
+}
+#endif