Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

6 files changed, 0 insertions, 590 deletions

diff --git a/qemu/roms/u-boot/board/esd/vme8349/Makefile b/qemu/roms/u-boot/board/esd/vme8349/Makefile
deleted file mode 100644
index fa11d5d10..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Copyright (c) 2009 esd gmbh hannover germany.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y += vme8349.o caddy.o
-obj-$(CONFIG_PCI) += pci.o
diff --git a/qemu/roms/u-boot/board/esd/vme8349/caddy.c b/qemu/roms/u-boot/board/esd/vme8349/caddy.c
deleted file mode 100644
index cd56bed99..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/caddy.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
- * Copyright (c) 2009 esd gmbh.
- *
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#include <pci.h>
-#include <asm/mmu.h>
-#include <asm/io.h>
-
-#include "caddy.h"
-
-static struct caddy_interface *caddy_interface;
-
-void generate_answer(struct caddy_cmd *cmd, uint32_t status, uint32_t *result)
-{
-	struct caddy_answer *answer;
-	uint32_t ptr;
-
-	answer = &caddy_interface->answer[caddy_interface->answer_in];
-	memset((void *)answer, 0, sizeof(struct caddy_answer));
-	answer->answer = cmd->cmd;
-	answer->issue = cmd->issue;
-	answer->status = status;
-	memcpy(answer->par, result, 5 * sizeof(result[0]));
-	ptr = caddy_interface->answer_in + 1;
-	ptr = ptr & (ANSWER_SIZE - 1);
-	if (ptr != caddy_interface->answer_out)
-		caddy_interface->answer_in = ptr;
-}
-
-int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	unsigned long base_addr;
-	uint32_t ptr;
-	struct caddy_cmd *caddy_cmd;
-	uint32_t result[5];
-	uint16_t data16;
-	uint8_t data8;
-	uint32_t status;
-	pci_dev_t dev;
-	void *pci_ptr;
-
-	if (argc < 2) {
-		puts("Missing parameter\n");
-		return 1;
-	}
-
-	base_addr = simple_strtoul(argv[1], NULL, 16);
-	caddy_interface = (struct caddy_interface *) base_addr;
-
-	memset((void *)caddy_interface, 0, sizeof(struct caddy_interface));
-	memcpy((void *)&caddy_interface->magic[0], &CADDY_MAGIC, 16);
-
-	while (ctrlc() == 0) {
-		if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
-			memset(result, 0, 5 * sizeof(result[0]));
-			status = 0;
-			caddy_cmd = &caddy_interface->cmd[caddy_interface->cmd_out];
-			pci_ptr = (void *)CONFIG_SYS_PCI1_IO_PHYS +
-				(caddy_cmd->addr & 0x001fffff);
-
-			switch (caddy_cmd->cmd) {
-			case CADDY_CMD_IO_READ_8:
-				result[0] = in_8(pci_ptr);
-				break;
-
-			case CADDY_CMD_IO_READ_16:
-				result[0] = in_be16(pci_ptr);
-				break;
-
-			case CADDY_CMD_IO_READ_32:
-				result[0] = in_be32(pci_ptr);
-				break;
-
-			case CADDY_CMD_IO_WRITE_8:
-				data8 = caddy_cmd->par[0] & 0x000000ff;
-				out_8(pci_ptr, data8);
-				break;
-
-			case CADDY_CMD_IO_WRITE_16:
-				data16 = caddy_cmd->par[0] & 0x0000ffff;
-				out_be16(pci_ptr, data16);
-				break;
-
-			case CADDY_CMD_IO_WRITE_32:
-				out_be32(pci_ptr, caddy_cmd->par[0]);
-				break;
-
-			case CADDY_CMD_CONFIG_READ_8:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				status = pci_read_config_byte(dev,
-							      caddy_cmd->addr,
-							      &data8);
-				result[0] = data8;
-				break;
-
-			case CADDY_CMD_CONFIG_READ_16:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				status = pci_read_config_word(dev,
-							      caddy_cmd->addr,
-							      &data16);
-				result[0] = data16;
-				break;
-
-			case CADDY_CMD_CONFIG_READ_32:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				status = pci_read_config_dword(dev,
-							       caddy_cmd->addr,
-							       &result[0]);
-				break;
-
-			case CADDY_CMD_CONFIG_WRITE_8:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				data8 = caddy_cmd->par[3] & 0x000000ff;
-				status = pci_write_config_byte(dev,
-							       caddy_cmd->addr,
-							       data8);
-				break;
-
-			case CADDY_CMD_CONFIG_WRITE_16:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				data16 = caddy_cmd->par[3] & 0x0000ffff;
-				status = pci_write_config_word(dev,
-							       caddy_cmd->addr,
-							       data16);
-				break;
-
-			case CADDY_CMD_CONFIG_WRITE_32:
-				dev = PCI_BDF(caddy_cmd->par[0],
-					      caddy_cmd->par[1],
-					      caddy_cmd->par[2]);
-				status = pci_write_config_dword(dev,
-								caddy_cmd->addr,
-								caddy_cmd->par[3]);
-				break;
-
-			default:
-				status = 0xffffffff;
-				break;
-			}
-
-			generate_answer(caddy_cmd, status, &result[0]);
-
-			ptr = caddy_interface->cmd_out + 1;
-			ptr = ptr & (CMD_SIZE - 1);
-			caddy_interface->cmd_out = ptr;
-		}
-
-		caddy_interface->heartbeat++;
-	}
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	caddy,	2,	0,	do_caddy,
-	"Start Caddy server.",
-	"Start Caddy server with Data structure a given addr\n"
-	);
diff --git a/qemu/roms/u-boot/board/esd/vme8349/caddy.h b/qemu/roms/u-boot/board/esd/vme8349/caddy.h
deleted file mode 100644
index 989f3c72a..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/caddy.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
- * Copyright (c) 2009 esd gmbh.
- *
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CADDY_H__
-#define __CADDY_H__
-
-#define CMD_SIZE	1024
-#define ANSWER_SIZE	1024
-#define CADDY_MAGIC	"esd vme8349 V1.0"
-
-enum caddy_cmds {
-	CADDY_CMD_IO_READ_8,
-	CADDY_CMD_IO_READ_16,
-	CADDY_CMD_IO_READ_32,
-	CADDY_CMD_IO_WRITE_8,
-	CADDY_CMD_IO_WRITE_16,
-	CADDY_CMD_IO_WRITE_32,
-	CADDY_CMD_CONFIG_READ_8,
-	CADDY_CMD_CONFIG_READ_16,
-	CADDY_CMD_CONFIG_READ_32,
-	CADDY_CMD_CONFIG_WRITE_8,
-	CADDY_CMD_CONFIG_WRITE_16,
-	CADDY_CMD_CONFIG_WRITE_32,
-};
-
-struct caddy_cmd {
-	uint32_t cmd;
-	uint32_t issue;
-	uint32_t addr;
-	uint32_t par[5];
-};
-
-struct caddy_answer {
-	uint32_t answer;
-	uint32_t issue;
-	uint32_t status;
-	uint32_t par[5];
-};
-
-struct caddy_interface {
-	uint8_t  magic[16];
-	uint32_t cmd_in;
-	uint32_t cmd_out;
-	uint32_t heartbeat;
-	uint32_t reserved1;
-	struct caddy_cmd cmd[CMD_SIZE];
-	uint32_t answer_in;
-	uint32_t answer_out;
-	uint32_t reserved2;
-	uint32_t reserved3;
-	struct caddy_answer answer[CMD_SIZE];
-};
-
-#endif /* of __CADDY_H__ */
diff --git a/qemu/roms/u-boot/board/esd/vme8349/pci.c b/qemu/roms/u-boot/board/esd/vme8349/pci.c
deleted file mode 100644
index 4d3b21ddf..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/pci.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * pci.c -- esd VME8349 PCI board support.
- * Copyright (c) 2006 Wind River Systems, Inc.
- * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 esd gmbh.
- *
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- *
- * Based on MPC8349 PCI support but w/o PIB related code.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <common.h>
-#include <mpc83xx.h>
-#include <pci.h>
-#include <i2c.h>
-#include <asm/fsl_i2c.h>
-#include "vme8349pin.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct pci_region pci1_regions[] = {
-	{
-		bus_start: CONFIG_SYS_PCI1_MEM_BASE,
-		phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
-		size: CONFIG_SYS_PCI1_MEM_SIZE,
-		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_IO_BASE,
-		phys_start: CONFIG_SYS_PCI1_IO_PHYS,
-		size: CONFIG_SYS_PCI1_IO_SIZE,
-		flags: PCI_REGION_IO
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
-		phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
-		size: CONFIG_SYS_PCI1_MMIO_SIZE,
-		flags: PCI_REGION_MEM
-	},
-};
-
-/*
- * pci_init_board()
- *
- * NOTICE: PCI2 is not supported. There is only one
- * physical PCI slot on the board.
- *
- */
-void
-pci_init_board(void)
-{
-	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
-	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
-	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
-	struct pci_region *reg[] = { pci1_regions };
-	u8 reg8;
-	int monarch = 0;
-
-	i2c_set_bus_num(1);
-	/* Read the PCI_M66EN jumper setting */
-	if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, &reg8, 1) == 0) ||
-	    (i2c_read(0x38                     , 0, 0, &reg8, 1) == 0)) {
-		if (reg8 & 0x40) {
-			clk->occr = 0xff000000;	/* 66 MHz PCI */
-			printf("PCI:   66MHz\n");
-		} else {
-			clk->occr = 0xffff0003;	/* 33 MHz PCI */
-			printf("PCI:   33MHz\n");
-		}
-		if (((reg8 & 0x01) == 0) || ((reg8 & 0x02) == 0))
-			monarch = 1;
-	} else {
-		clk->occr = 0xffff0003;	/* 33 MHz PCI */
-		printf("PCI:   33MHz (I2C read failed)\n");
-	}
-	udelay(2000);
-
-	/*
-	 * Assert/deassert VME reset
-	 */
-	clrsetbits_be32(&immr->gpio[1].dat,
-			GPIO2_TSI_POWERUP_RESET_N | GPIO2_TSI_PLL_RESET_N,
-			GPIO2_VME_RESET_N  | GPIO2_L_RESET_EN_N);
-	setbits_be32(&immr->gpio[1].dir, GPIO2_TSI_PLL_RESET_N |
-		     GPIO2_TSI_POWERUP_RESET_N |
-		     GPIO2_VME_RESET_N |
-		     GPIO2_L_RESET_EN_N);
-	clrbits_be32(&immr->gpio[1].dir, GPIO2_V_SCON);
-	udelay(200);
-	setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_PLL_RESET_N);
-	udelay(200);
-	setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_POWERUP_RESET_N);
-	udelay(600000);
-	clrbits_be32(&immr->gpio[1].dat, GPIO2_L_RESET_EN_N);
-
-	/* Configure PCI Local Access Windows */
-	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
-	pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
-
-	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
-
-	udelay(2000);
-
-	if (monarch == 0) {
-		mpc83xx_pci_init(1, reg);
-	} else {
-		/*
-		 * Release PCI RST Output signal
-		 */
-		out_be32(&immr->pci_ctrl[0].gcr, 0);
-		udelay(2000);
-		out_be32(&immr->pci_ctrl[0].gcr, 1);
-	}
-}
diff --git a/qemu/roms/u-boot/board/esd/vme8349/vme8349.c b/qemu/roms/u-boot/board/esd/vme8349/vme8349.c
deleted file mode 100644
index 01365dcbd..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/vme8349.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * vme8349.c -- esd VME8349 board support
- *
- * Copyright (c) 2008-2009 esd gmbh.
- *
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- * Based on board/mpc8349emds/mpc8349emds.c (and previous 834x releases.)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
-#endif
-#include <asm/io.h>
-#include <asm/mmu.h>
-#include <spd.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-#include <netdev.h>
-
-void ddr_enable_ecc(unsigned int dram_size);
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	u32 msize = 0;
-
-	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
-		return -1;
-
-	/* DDR SDRAM - Main memory */
-	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
-
-	msize = spd_sdram();
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-	/*
-	 * Initialize and enable DDR ECC.
-	 */
-	ddr_enable_ecc(msize * 1024 * 1024);
-#endif
-
-	/* Now check memory size (after ECC is initialized) */
-	msize = get_ram_size(0, msize);
-
-	/* return total bus SDRAM size(bytes)  -- DDR */
-	return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
-#ifdef VME_CADDY2
-	puts("Board: esd VME-CADDY/2\n");
-#else
-	puts("Board: esd VME-CPU/8349\n");
-#endif
-
-	return 0;
-}
-
-#ifdef VME_CADDY2
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
-#endif
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-#ifdef CONFIG_PCI
-	ft_pci_setup(blob, bd);
-#endif
-}
-#endif
-
-int misc_init_r()
-{
-	immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-
-	clrsetbits_be32(&im->im_lbc.lcrr, LBCR_LDIS, 0);
-
-	return 0;
-}
-
-/*
- * Provide SPD values for spd_sdram(). Both boards (VME-CADDY/2
- * and VME-CADDY/2) have different SDRAM configurations.
- */
-#ifdef VME_CADDY2
-#define SMALL_RAM	0xff
-#define LARGE_RAM	0x00
-#else
-#define SMALL_RAM	0x00
-#define LARGE_RAM	0xff
-#endif
-
-#define SPD_VAL(a, b)	(((a) & SMALL_RAM) | ((b) & LARGE_RAM))
-
-static spd_eeprom_t default_spd_eeprom = {
-	SPD_VAL(0x80, 0x80),	/* 00 use 128 Bytes */
-	SPD_VAL(0x07, 0x07),	/* 01 use 128 Bytes */
-	SPD_MEMTYPE_DDR2,	/* 02 type is DDR2 */
-	SPD_VAL(0x0d, 0x0d),	/* 03 rows: 13 */
-	SPD_VAL(0x09, 0x0a),	/* 04 cols:  9 / 10 */
-	SPD_VAL(0x00, 0x00),	/* 05 */
-	SPD_VAL(0x40, 0x40),	/* 06 */
-	SPD_VAL(0x00, 0x00),	/* 07 */
-	SPD_VAL(0x05, 0x05),	/* 08 */
-	SPD_VAL(0x30, 0x30),	/* 09 */
-	SPD_VAL(0x45, 0x45),	/* 10 */
-	SPD_VAL(0x02, 0x02),	/* 11 ecc used */
-	SPD_VAL(0x82, 0x82),	/* 12 */
-	SPD_VAL(0x10, 0x10),	/* 13 */
-	SPD_VAL(0x08, 0x08),	/* 14 */
-	SPD_VAL(0x00, 0x00),	/* 15 */
-	SPD_VAL(0x0c, 0x0c),	/* 16 */
-	SPD_VAL(0x04, 0x08),	/* 17 banks: 4 / 8 */
-	SPD_VAL(0x38, 0x38),	/* 18 */
-	SPD_VAL(0x00, 0x00),	/* 19 */
-	SPD_VAL(0x02, 0x02),	/* 20 */
-	SPD_VAL(0x00, 0x00),	/* 21 */
-	SPD_VAL(0x03, 0x03),	/* 22 */
-	SPD_VAL(0x3d, 0x3d),	/* 23 */
-	SPD_VAL(0x45, 0x45),	/* 24 */
-	SPD_VAL(0x50, 0x50),	/* 25 */
-	SPD_VAL(0x45, 0x45),	/* 26 */
-	SPD_VAL(0x3c, 0x3c),	/* 27 */
-	SPD_VAL(0x28, 0x28),	/* 28 */
-	SPD_VAL(0x3c, 0x3c),	/* 29 */
-	SPD_VAL(0x2d, 0x2d),	/* 30 */
-	SPD_VAL(0x20, 0x80),	/* 31 */
-	SPD_VAL(0x20, 0x20),	/* 32 */
-	SPD_VAL(0x27, 0x27),	/* 33 */
-	SPD_VAL(0x10, 0x10),	/* 34 */
-	SPD_VAL(0x17, 0x17),	/* 35 */
-	SPD_VAL(0x3c, 0x3c),	/* 36 */
-	SPD_VAL(0x1e, 0x1e),	/* 37 */
-	SPD_VAL(0x1e, 0x1e),	/* 38 */
-	SPD_VAL(0x00, 0x00),	/* 39 */
-	SPD_VAL(0x00, 0x06),	/* 40 */
-	SPD_VAL(0x37, 0x37),	/* 41 */
-	SPD_VAL(0x4b, 0x7f),	/* 42 */
-	SPD_VAL(0x80, 0x80),	/* 43 */
-	SPD_VAL(0x18, 0x18),	/* 44 */
-	SPD_VAL(0x22, 0x22),	/* 45 */
-	SPD_VAL(0x00, 0x00),	/* 46 */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
-	SPD_VAL(0x10, 0x10),	/* 62 */
-	SPD_VAL(0x7e, 0x1d),	/* 63 */
-	{ 'e', 's', 'd', '-', 'g', 'm', 'b', 'h' },
-	SPD_VAL(0x00, 0x00),	/* 72 */
-#ifdef VME_CADDY2
-	{ "vme-caddy/2 ram   " }
-#else
-	{ "vme-cpu/2 ram     " }
-#endif
-};
-
-int vme8349_read_spd(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-	int old_bus = i2c_get_bus_num();
-	unsigned int l, sum;
-	int valid = 0;
-
-	i2c_set_bus_num(0);
-
-	if (i2c_read(chip, addr, alen, buffer, len) == 0)
-		if (memcmp(&buffer[64], &default_spd_eeprom.mid[0], 8) == 0) {
-			sum = 0;
-			for (l = 0; l < 63; l++)
-				sum = (sum + buffer[l]) & 0xff;
-			if (sum == buffer[63])
-				valid = 1;
-			else
-				printf("Invalid checksum in EEPROM %02x %02x\n",
-				       sum, buffer[63]);
-		}
-
-	if (valid == 0) {
-		memcpy(buffer, (void *)&default_spd_eeprom, len);
-		sum = 0;
-		for (l = 0; l < 63; l++)
-			sum = (sum + buffer[l]) & 0xff;
-		if (sum != buffer[63])
-			printf("Invalid checksum in FLASH %02x %02x\n",
-			       sum, buffer[63]);
-		buffer[63] = sum;
-	}
-
-	i2c_set_bus_num(old_bus);
-
-	return 0;
-}
diff --git a/qemu/roms/u-boot/board/esd/vme8349/vme8349pin.h b/qemu/roms/u-boot/board/esd/vme8349/vme8349pin.h
deleted file mode 100644
index fcf6c59bd..000000000
--- a/qemu/roms/u-boot/board/esd/vme8349/vme8349pin.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * vme8349pin.h -- esd VME8349 MPC8349 I/O pin definition.
- * Copyright (c) 2009 esd gmbh.
- *
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __VME8349PIN_H__
-#define __VME8349PIN_H__
-
-#define GPIO2_V_SCON		0x80000000 /* In:  from tsi148 1: is syscon */
-#define GPIO2_VME_RESET_N	0x20000000 /* Out: to tsi148                */
-#define GPIO2_TSI_PLL_RESET_N	0x08000000 /* Out: to tsi148                */
-#define GPIO2_TSI_POWERUP_RESET_N 0x00800000 /* Out: to tsi148              */
-#define GPIO2_L_RESET_EN_N	0x00100000 /* Out: 0:vme can assert cpu lrst*/
-
-#endif /* of ifndef __VME8349PIN_H__ */