diff options
author | RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
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committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/board/esd/common/esd405ep_nand.c | |
parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/esd/common/esd405ep_nand.c')
-rw-r--r-- | qemu/roms/u-boot/board/esd/common/esd405ep_nand.c | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/qemu/roms/u-boot/board/esd/common/esd405ep_nand.c b/qemu/roms/u-boot/board/esd/common/esd405ep_nand.c deleted file mode 100644 index f46936ca3..000000000 --- a/qemu/roms/u-boot/board/esd/common/esd405ep_nand.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * (C) Copyright 2007 - * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> - -#if defined(CONFIG_CMD_NAND) -#include <asm/io.h> -#include <nand.h> - -/* - * hardware specific access to control-lines - */ -static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *this = mtd->priv; - if (ctrl & NAND_CTRL_CHANGE) { - if ( ctrl & NAND_CLE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CLE); - else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CLE); - if ( ctrl & NAND_ALE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_ALE); - else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_ALE); - if ( ctrl & NAND_NCE ) - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CE); - else - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE); - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->IO_ADDR_W); -} - - -/* - * read device ready pin - */ -static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo) -{ - if (in_be32((void *)GPIO0_IR) & CONFIG_SYS_NAND_RDY) - return 1; - return 0; -} - - -int board_nand_init(struct nand_chip *nand) -{ - /* - * Set NAND-FLASH GPIO signals to defaults - */ - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE)); - out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE); - - /* - * Initialize nand_chip structure - */ - nand->cmd_ctrl = esd405ep_nand_hwcontrol; - nand->dev_ready = esd405ep_nand_device_ready; - nand->ecc.mode = NAND_ECC_SOFT; - nand->chip_delay = NAND_BIG_DELAY_US; - nand->options = NAND_SAMSUNG_LP_OPTIONS; - return 0; -} -#endif |