diff options
author | RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
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committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/board/congatec | |
parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/congatec')
-rw-r--r-- | qemu/roms/u-boot/board/congatec/cgtqmx6eval/Makefile | 10 | ||||
-rw-r--r-- | qemu/roms/u-boot/board/congatec/cgtqmx6eval/README | 28 | ||||
-rw-r--r-- | qemu/roms/u-boot/board/congatec/cgtqmx6eval/cgtqmx6eval.c | 154 |
3 files changed, 0 insertions, 192 deletions
diff --git a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/Makefile b/qemu/roms/u-boot/board/congatec/cgtqmx6eval/Makefile deleted file mode 100644 index 1bce4737f..000000000 --- a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> -# -# (C) Copyright 2011 Freescale Semiconductor, Inc. -# (C) Copyright 2013 Adeneo Embedded <www.adeneo-embedded.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cgtqmx6eval.o diff --git a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/README b/qemu/roms/u-boot/board/congatec/cgtqmx6eval/README deleted file mode 100644 index 5e76d2ac5..000000000 --- a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/README +++ /dev/null @@ -1,28 +0,0 @@ -U-Boot for the Congatec Conga-QEVAl Evaluation Carrier board with -qmx6 quad module. - -This file contains information for the port of U-Boot to the Congatec -Conga-QEVAl Evaluation Carrier board with qmx6 quad module. - -1. Boot source, boot from SD card ---------------------------------- - -By default, the Congatec board can boot only from the SPI-NOR. -But, with the u-boot version provided with the board you can write boot -registers to force the board to reboot and boot from the SD slot. If -"bmode" command is not available from your pre-installed u-boot, these -instruction will produce the same effect: - -conga-QMX6 U-Boot > mw.l 0x20d8040 0x3850 -conga-QMX6 U-Boot > mw.l 0x020d8044 0x10000000 -conga-QMX6 U-Boot > reset -resetting ... - -The the board will reboot and, if you have written your SD correctly -the board will use u-boot that live into the SD - -To copy the resulting u-boot.imx to the SD card: - - dd if=u-boot.imx of=/dev/xxx bs=512 seek=2 - -Note: Replace xxx with the device representing the SD card in your system. diff --git a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/qemu/roms/u-boot/board/congatec/cgtqmx6eval/cgtqmx6eval.c deleted file mode 100644 index 749253429..000000000 --- a/qemu/roms/u-boot/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. - * Based on mx6qsabrelite.c file - * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> - * Leo Sartre, <lsartre@adeneo-embedded.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> -#include <asm/gpio.h> -#include <asm/imx-common/iomux-v3.h> -#include <asm/imx-common/boot_mode.h> -#include <mmc.h> -#include <fsl_esdhc.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |\ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -int dram_init(void) -{ - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); - - return 0; -} - -iomux_v3_cfg_t const uart2_pads[] = { - MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); -} - -#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[] = { - {USDHC2_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - gpio_direction_input(IMX_GPIO_NR(1, 4)); - ret = !gpio_get_value(IMX_GPIO_NR(1, 4)); - break; - case USDHC4_BASE_ADDR: - gpio_direction_input(IMX_GPIO_NR(2, 6)); - ret = !gpio_get_value(IMX_GPIO_NR(2, 6)); - break; - default: - printf("Bad USDHC interface\n"); - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - s32 status = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - - status = fsl_esdhc_initialize(bis, &usdhc_cfg[0]) | - fsl_esdhc_initialize(bis, &usdhc_cfg[1]); - - return status; -} -#endif - -int board_early_init_f(void) -{ - setup_iomux_uart(); - - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - - return 0; -} - -int checkboard(void) -{ - puts("Board: Conga-QEVAL QMX6 Quad\n"); - - return 0; -} - -#ifdef CONFIG_CMD_BMODE -static const struct boot_mode board_boot_modes[] = { - /* 4 bit bus width */ - {"mmc0", MAKE_CFGVAL(0x50, 0x20, 0x00, 0x00)}, - {"mmc1", MAKE_CFGVAL(0x50, 0x38, 0x00, 0x00)}, - {NULL, 0}, -}; -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_CMD_BMODE - add_board_boot_modes(board_boot_modes); -#endif - return 0; -} |