Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

22 files changed, 0 insertions, 1818 deletions

diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg
deleted file mode 100644
index 6c68146f9..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
deleted file mode 100644
index bb5716e88..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
-DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43040319
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03040279
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43040321
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03030251
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4d434248
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c4d
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x34424543
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x49324933
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001a0017
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00170027
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000a001f
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript.txt b/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript.txt
deleted file mode 100644
index 061b3a44b..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-setenv bootargs enable_wait_mode=off
-setenv nextcon 0;
-
-if hdmidet ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24
-	setenv fbmem "fbmem=28M";
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no HDMI monitor";
-fi
-
-i2c dev 2
-if i2c probe 0x04 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbmem "fbmem=10M";
-	else
-		setenv fbmem ${fbmem},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no Freescale display";
-fi
-
-if i2c probe 0x38 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbmem "fbmem=10M";
-	else
-		setenv fbmem ${fbmem},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 1024x600 display";
-fi
-
-if i2c probe 0x48 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbmem "fbmem=10M";
-	else
-		setenv fbmem ${fbmem},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 800x480 display";
-fi
-
-while test "3" -ne $nextcon ; do
-	setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
-	setexpr nextcon $nextcon + 1 ;
-done
-
-setenv bootargs $bootargs $fbmem
-setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait"
-
-if test "sata" = "${dtype}" ; then
-	setenv bootargs "$bootargs root=/dev/sda1" ;
-else
-	setenv "bootargs $bootargs root=/dev/mmcblk0p1" ;
-fi
-${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage && bootm 10800000 ;
-echo "Error loading kernel image"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android.txt b/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android.txt
deleted file mode 100644
index 0982cf805..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-${dtype} dev ${disk}
-
-setenv bootargs enable_wait_mode=off
-setenv nextcon 0;
-setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 ;
-
-i2c dev 2
-
-if i2c probe 0x04 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no Freescale display";
-fi
-
-if i2c probe 0x38 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 1024x600 display";
-fi
-
-if i2c probe 0x48 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 800x480 display";
-fi
-
-if hdmidet ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=28M";
-	else
-		setenv fbcon ${fbcon},28M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no HDMI monitor";
-fi
-
-while test "3" -ne $nextcon ; do
-	setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
-	setexpr nextcon $nextcon + 1 ;
-done
-
-setenv bootargs $bootargs fbcon=$fbcon
-${fs}load ${dtype} ${disk}:1 10800000 uImage && ${fs}load ${dtype} ${disk}:1 12800000 uramdisk.img && bootm 10800000 12800000
-echo "Error loading kernel image"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt b/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt
deleted file mode 100644
index 0982cf805..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-${dtype} dev ${disk}
-
-setenv bootargs enable_wait_mode=off
-setenv nextcon 0;
-setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 ;
-
-i2c dev 2
-
-if i2c probe 0x04 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no Freescale display";
-fi
-
-if i2c probe 0x38 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 1024x600 display";
-fi
-
-if i2c probe 0x48 ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=10M";
-	else
-		setenv fbcon ${fbcon},10M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no 800x480 display";
-fi
-
-if hdmidet ; then
-	setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24
-	if test "0" -eq $nextcon; then
-		setenv fbcon "fbcon=28M";
-	else
-		setenv fbcon ${fbcon},28M
-	fi
-	setexpr nextcon $nextcon + 1
-else
-	echo "------ no HDMI monitor";
-fi
-
-while test "3" -ne $nextcon ; do
-	setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
-	setexpr nextcon $nextcon + 1 ;
-done
-
-setenv bootargs $bootargs fbcon=$fbcon
-${fs}load ${dtype} ${disk}:1 10800000 uImage && ${fs}load ${dtype} ${disk}:1 12800000 uramdisk.img && bootm 10800000 12800000
-echo "Error loading kernel image"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_upgrade.txt b/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_upgrade.txt
deleted file mode 100644
index 1a62bbf12..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/6x_upgrade.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-setenv stdout serial,vga
-echo "check U-Boot" ;
-setenv offset 0x400
-if ${fs}load ${dtype} ${disk}:1 12000000 u-boot.imx || ${fs}load ${dtype} ${disk}:1 12000000 u-boot.nopadding ; then
-      echo "read $filesize bytes from SD card" ;
-      if sf probe || sf probe || \
-	 sf probe 1 27000000 || sf probe 1 27000000 ; then
-	   echo "probed SPI ROM" ;
-	   if sf read 0x12400000 $offset $filesize ; then
-	       if cmp.b 0x12000000 0x12400000 $filesize ; then
-		   echo "------- U-Boot versions match" ;
-	       else
-		   echo "Need U-Boot upgrade" ;
-		   echo "Program in 5 seconds" ;
-		   for n in 5 4 3 2 1 ; do
-			echo $n ;
-			sleep 1 ;
-		   done
-		   echo "erasing" ;
-		   sf erase 0 0xC0000 ;
-		   # two steps to prevent bricking
-		   echo "programming" ;
-		   sf write 0x12000000 $offset $filesize ;
-		   echo "verifying" ;
-		   if sf read 0x12400000 $offset $filesize ; then
-		       if cmp.b 0x12000000 0x12400000 $filesize ; then
-			   while echo "---- U-Boot upgraded. reset" ; do
-				sleep 120
-			   done
-		       else
-			   echo "Read verification error" ;
-		       fi
-		   else
-			echo "Error re-reading EEPROM" ;
-		   fi
-	       fi
-	   else
-	       echo "Error reading boot loader from EEPROM" ;
-	   fi
-      else
-	   echo "Error initializing EEPROM" ;
-      fi ;
-else
-     echo "No U-Boot image found on SD card" ;
-fi
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg
deleted file mode 100644
index e005a648f..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
-DATA 4, MX6_MMDC_P0_MDCTL, 0x83190000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
deleted file mode 100644
index 581d44ceb..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x84190000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg
deleted file mode 100644
index 106934227..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x420F020F
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x01760175
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x41640171
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x015E0160
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45464B4A
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x49484A46
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40402E32
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3A3A3231
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x003A003A
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0030002F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x002F0038
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00270039
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
deleted file mode 100644
index 7c7a3d1c4..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023
-DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
-DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
-DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
-DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/Makefile b/qemu/roms/u-boot/board/boundary/nitrogen6x/Makefile
deleted file mode 100644
index f875d6818..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
-# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
-# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y  := nitrogen6x.o
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/README b/qemu/roms/u-boot/board/boundary/nitrogen6x/README
deleted file mode 100644
index 9d8426502..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/README
+++ /dev/null
@@ -1,92 +0,0 @@
-U-Boot for the Boundary Devices Nitrogen6X and
-Freescale i.MX6Q SabreLite boards
-
-This file contains information for the port of
-U-Boot to the Boundary Devices Nitrogen6X and
-Freescale i.MX6Q SabreLite boards.
-
-1. Boot source, boot from SPI NOR
----------------------------------
-The configuration in this directory supports both the
-Nitrogen6X and Freescale SabreLite board, but in a
-different fashion from Freescale's implementation in
-board/freescale/mx6qsabrelite.
-
-In particular, this image supports booting from SPI NOR
-and saving the environment to SPI NOR.
-
-It does not support 'boot from SD' at offset 0x400
-except through the 'bmode' command.
-	http://lists.denx.de/pipermail/u-boot/2012-August/131151.html
-
-2. Boots using 6x_bootscript on SATA or SD card
------------------------------------------------
-The default bootcmd for these boards is configured
-to look for and source a boot script named '6x_bootscript'
-in the root of the first partition of the following
-devices:
-
-	sata 0
-	mmc 0
-	mmc 1
-
-They're searched in the order listed above, trying both the
-ext2 and fat filesystems.
-
-2. Maintaining the SPI NOR
---------------------------
-A couple of convenience commands
-
-	clearenv - clear environment to factory default
-	upgradeu - look and source a boot script named
-		'6x_upgrade' to upgrade the U-Boot version
-		in SPI NOR. The search is the same as for
-		6x_bootscript described above.
-
-3. Display support
-------------------
-U-Boot support for the following displays is configured by
-default:
-
-    HDMI           - 1024 x 768 for maximum compatibility
-    Hannstar-XGA   - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
-    wsvga-lvds     - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
-    wvga-rgb       - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
-
-Since the ipuv3_fb display driver currently supports only a single display,
-this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
-or the I2C touch controller of the LVDS and RGB displays in the priority
-listed above.
-
-Setting 'panel' environment variable to one of the names above will
-override auto-detection and force activation of the specified panel.
-
-4. Building
-------------
-
-To build U-Boot for one of the Nitrogen6x or SabreLite board:
-
-	make nitrogen6x_config
-	make
-
-Note that 'nitrogen6x' is a placeholder. The complete list of supported
-board configurations is shown in the boards.cfg file:
-	nitrogen6q		i.MX6Q/6D	1GB
-	nitrogen6dl		i.MX6DL		1GB
-	nitrogen6s		i.MX6S		512MB
-	nitrogen6q2g    	i.MX6Q/6D	2GB
-	nitrogen6dl2g		i.MX6DL		2GB
-	nitrogen6s1g		i.MX6S		1GB
-
-The -6q variants support either the i.MX6Quad or i.MX6Dual processors
-and are configured for a 64-bit memory bus at 1066 MHz.
-
-The -6dl variants also use a 64-bit memory bus, operated at 800MHz.
-
-The -6s variants use a 32-bit memory bus at 800MHz.
-
-If you place the u-boot.imx into a single-partition SD card
-along with a binary version of the boot script 6x_upgrade.txt,
-you can program it using 'upgradeu':
-
-	U-Boot> run upgradeu
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/README.mx6qsabrelite b/qemu/roms/u-boot/board/boundary/nitrogen6x/README.mx6qsabrelite
deleted file mode 100644
index 12a9c856c..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/README.mx6qsabrelite
+++ /dev/null
@@ -1,72 +0,0 @@
-U-Boot for the Freescale i.MX6q SabreLite board
-
-This file contains information for the port of U-Boot to the Freescale
-i.MX6q SabreLite board.
-
-1. Boot source, boot from SD card
----------------------------------
-
-The recent mainline U-Boot for the Freescale i.MX6q SabreLite board supports
-boot from SD card only. However, by default, the SabreLite
-boards boot from the SPI NOR flash. These boards need to be reflashed with
-a small SD card loader to support boot from SD card. This small SD card loader
-will be flashed into the SPI NOR. The board will still boot from SPI NOR, but
-the loader will in turn request the BootROM to load the U-Boot from SD card.
-
-The SD card loader is available from
-
-https://wiki.linaro.org/Boards/MX6QSabreLite
-
-under a open-source 3-clause BSD license.
-
-To update the SPI-NOR on the SabreLite board without the Freescale
-manufacturing tool use the following procedure:
-
-1. Write this SD card loader onto a large SD card using:
-
- sudo dd if=iMX6DQ_SPI_to_uSDHC3.bin of=/dev/sXx
-
-Note: Replace sXx with the device representing the SD card in your system.
-
-Note: This writes SD card loader at address 0
-
-2. Put this SD card into the slot for the large SD card (SD3 on the bottom of
-the board). Make sure SW1 switch is at position "00", so that it can boot
-from the fuses.
-
-3. Power-up the SabreLite, press 'space' to enter command mode in the U-Boot
-(the default one the board is shipped with, starting from the SPI NOR) and
-enter the following commands:
-
- MX6Q SABRELITE U-Boot > mmc dev 0
- MX6Q SABRELITE U-Boot > mmc read 0x10800000 0 200
- MX6Q SABRELITE U-Boot > sf probe
- MX6Q SABRELITE U-Boot > sf erase 0 0x40000
- MX6Q SABRELITE U-Boot > sf write 0x10800000 0 0x40000
-
-4. done.
-
-In case you somehow do not succeed with this procedure you will have to use
-the Freescale manufacturing tool in order to reflash the SPI-NOR.
-
-Note: The board now boots from full size SD3 on the bottom of the board. NOT
-      the micro SD4/BOOT slot on the top of the board. I.e. you have to use
-      full size SD cards.
-
-This information is taken from
-
-https://wiki.linaro.org/Boards/MX6QSabreLite
-
-2. Build
---------
-
-To build U-Boot for the SabreLite board:
-
- make mx6qsabrelite_config
- make
-
-To copy the resulting u-boot.imx to the SD card:
-
- sudo dd if=u-boot.imx of=/dev/sXx bs=512 seek=2&&sudo sync
-
-Note: Replace sXx with the device representing the SD card in your system.
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/clocks.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/clocks.cfg
deleted file mode 100644
index 8bddb91d7..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/clocks.cfg
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type           Address        Value
- *
- * where:
- *      Addr-type register length (1,2 or 4 bytes)
- *      Address   absolute address of the register
- *      value     value to be stored in the register
- */
-
-/* set the default clock gate to save power */
-DATA 4, CCM_CCGR0, 0x00C03F3F
-DATA 4, CCM_CCGR1, 0x0030FC03
-DATA 4, CCM_CCGR2, 0x0FFFC000
-DATA 4, CCM_CCGR3, 0x3FF00000
-DATA 4, CCM_CCGR4, 0x00FFF300
-DATA 4, CCM_CCGR5, 0x0F0000C3
-DATA 4, CCM_CCGR6, 0x000003FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
-DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
-
-/*
- * Setup CCM_CCOSR register as follows:
- *
- * cko1_en  = 1	   --> CKO1 enabled
- * cko1_div = 111  --> divide by 8
- * cko1_sel = 1011 --> ahb_clk_root
- *
- * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
- */
-DATA 4, CCM_CCOSR, 0x000000fb
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/ddr-setup.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/ddr-setup.cfg
deleted file mode 100644
index 2748d4008..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/ddr-setup.cfg
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type           Address        Value
- *
- * where:
- *      Addr-type register length (1,2 or 4 bytes)
- *      Address   absolute address of the register
- *      value     value to be stored in the register
- */
-
-/*
- * DDR3 settings
- * MX6Q    ddr is limited to 1066 Mhz	currently 1056 MHz(528 MHz clock),
- *	   memory bus width: 64 bits	x16/x32/x64
- * MX6DL   ddr is limited to 800 MHz(400 MHz clock)
- *	   memory bus width: 64 bits	x16/x32/x64
- * MX6SOLO ddr is limited to 800 MHz(400 MHz clock)
- *	   memory bus width: 32 bits	x16/x32
- */
-DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
-
-DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B4DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B5DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B6DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B7DS, 0x00000030
-DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
-DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
-
-DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030
-DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030
-
-DATA 4, MX6_IOM_DRAM_CAS, 0x00020030
-DATA 4, MX6_IOM_DRAM_RAS, 0x00020030
-DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030
-DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030
-
-DATA 4, MX6_IOM_DRAM_RESET, 0x00020030
-DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
-DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000
-
-DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030
-DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030
-
-/* (differential input) */
-DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
-/* (differential input) */
-DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
-/* disable ddr pullups */
-DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
-DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
-/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
-DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
-
-/* Read data DQ Byte0-3 delay */
-DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
-
-/*
- * MDMISC	mirroring	interleaved (row/bank/col)
- */
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740
-
-/*
- * MDSCR	con_req
- */
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl.cfg
deleted file mode 100644
index 1cdccad77..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "800mhz_4x128mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
deleted file mode 100644
index 516d67e4b..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "800mhz_4x256mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q.cfg
deleted file mode 100644
index b6642e690..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "1066mhz_4x128mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q2g.cfg
deleted file mode 100644
index fe6dfc1f4..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6q2g.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "1066mhz_4x256mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s.cfg
deleted file mode 100644
index ca30cd6c4..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "800mhz_2x128mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s1g.cfg
deleted file mode 100644
index b1489fb90..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6s1g.cfg
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2013 Boundary Devices
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Refer doc/README.imximage for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      spi
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "800mhz_2x256mx16.cfg"
-#include "clocks.cfg"
diff --git a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6x.c b/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6x.c
deleted file mode 100644
index d9c05b07b..000000000
--- a/qemu/roms/u-boot/board/boundary/nitrogen6x/nitrogen6x.c
+++ /dev/null
@@ -1,846 +0,0 @@
-/*
- * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/sys_proto.h>
-#include <malloc.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
-#include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/imx-common/mxc_i2c.h>
-#include <asm/imx-common/sata.h>
-#include <asm/imx-common/boot_mode.h>
-#include <mmc.h>
-#include <fsl_esdhc.h>
-#include <micrel.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
-
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
-	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |			\
-	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |			\
-	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
-
-#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define I2C_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
-	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define WEAK_PULLUP	(PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
-	PAD_CTL_SRE_SLOW)
-
-#define WEAK_PULLDOWN	(PAD_CTL_PUS_100K_DOWN |		\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
-	PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
-
-#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
-
-int dram_init(void)
-{
-	gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
-
-	return 0;
-}
-
-iomux_v3_cfg_t const uart1_pads[] = {
-	MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const uart2_pads[] = {
-	MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-/* I2C1, SGTL5000 */
-struct i2c_pads_info i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-
-/* I2C2 Camera, MIPI */
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
-	}
-};
-
-/* I2C3, J15 - RGB connector */
-struct i2c_pads_info i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
-		.gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC,
-		.gp = IMX_GPIO_NR(1, 5)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC,
-		.gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
-		.gp = IMX_GPIO_NR(7, 11)
-	}
-};
-
-iomux_v3_cfg_t const usdhc3_pads[] = {
-	MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD3_DAT5__GPIO7_IO00    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-iomux_v3_cfg_t const usdhc4_pads[] = {
-	MX6_PAD_SD4_CLK__SD4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_CMD__SD4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX6_PAD_NANDF_D6__GPIO2_IO06    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-iomux_v3_cfg_t const enet_pads1[] = {
-	MX6_PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TXC__RGMII_TXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TD0__RGMII_TD0	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TD1__RGMII_TD1	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TD2__RGMII_TD2	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TD3__RGMII_TD3	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_ENET_REF_CLK__ENET_TX_CLK	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	/* pin 35 - 1 (PHY_AD2) on reset */
-	MX6_PAD_RGMII_RXC__GPIO6_IO30		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 32 - 1 - (MODE0) all */
-	MX6_PAD_RGMII_RD0__GPIO6_IO25		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 31 - 1 - (MODE1) all */
-	MX6_PAD_RGMII_RD1__GPIO6_IO27		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 28 - 1 - (MODE2) all */
-	MX6_PAD_RGMII_RD2__GPIO6_IO28		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 27 - 1 - (MODE3) all */
-	MX6_PAD_RGMII_RD3__GPIO6_IO29		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
-	MX6_PAD_RGMII_RX_CTL__GPIO6_IO24	| MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* pin 42 PHY nRST */
-	MX6_PAD_EIM_D23__GPIO3_IO23		| MUX_PAD_CTRL(NO_PAD_CTRL),
-	MX6_PAD_ENET_RXD0__GPIO1_IO27		| MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const enet_pads2[] = {
-	MX6_PAD_RGMII_RXC__RGMII_RXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_RD0__RGMII_RD0	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_RD1__RGMII_RD1	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_RD2__RGMII_RD2	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_RD3__RGMII_RD3	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const misc_pads[] = {
-	MX6_PAD_GPIO_1__USB_OTG_ID		| MUX_PAD_CTRL(WEAK_PULLUP),
-	MX6_PAD_KEY_COL4__USB_OTG_OC		| MUX_PAD_CTRL(WEAK_PULLUP),
-	MX6_PAD_EIM_D30__USB_H1_OC		| MUX_PAD_CTRL(WEAK_PULLUP),
-	/* OTG Power enable */
-	MX6_PAD_EIM_D22__GPIO3_IO22		| MUX_PAD_CTRL(OUTPUT_40OHM),
-};
-
-/* wl1271 pads on nitrogen6x */
-iomux_v3_cfg_t const wl12xx_pads[] = {
-	(MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK)
-		| MUX_PAD_CTRL(WEAK_PULLDOWN),
-	(MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK)
-		| MUX_PAD_CTRL(OUTPUT_40OHM),
-	(MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK)
-		| MUX_PAD_CTRL(OUTPUT_40OHM),
-};
-#define WL12XX_WL_IRQ_GP	IMX_GPIO_NR(6, 14)
-#define WL12XX_WL_ENABLE_GP	IMX_GPIO_NR(6, 15)
-#define WL12XX_BT_ENABLE_GP	IMX_GPIO_NR(6, 16)
-
-/* Button assignments for J14 */
-static iomux_v3_cfg_t const button_pads[] = {
-	/* Menu */
-	MX6_PAD_NANDF_D1__GPIO2_IO01	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-	/* Back */
-	MX6_PAD_NANDF_D2__GPIO2_IO02	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-	/* Labelled Search (mapped to Power under Android) */
-	MX6_PAD_NANDF_D3__GPIO2_IO03	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-	/* Home */
-	MX6_PAD_NANDF_D4__GPIO2_IO04	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-	/* Volume Down */
-	MX6_PAD_GPIO_19__GPIO4_IO05	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-	/* Volume Up */
-	MX6_PAD_GPIO_18__GPIO7_IO13	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
-};
-
-static void setup_iomux_enet(void)
-{
-	gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* SABRE Lite PHY rst */
-	gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* Nitrogen6X PHY rst */
-	gpio_direction_output(IMX_GPIO_NR(6, 30), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
-	gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
-	imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1));
-	gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
-
-	/* Need delay 10ms according to KSZ9021 spec */
-	udelay(1000 * 10);
-	gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* SABRE Lite PHY reset */
-	gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */
-
-	imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
-}
-
-iomux_v3_cfg_t const usb_pads[] = {
-	MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
-	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-	imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
-}
-
-#ifdef CONFIG_USB_EHCI_MX6
-int board_ehci_hcd_init(int port)
-{
-	imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
-
-	/* Reset USB hub */
-	gpio_direction_output(IMX_GPIO_NR(7, 12), 0);
-	mdelay(2);
-	gpio_set_value(IMX_GPIO_NR(7, 12), 1);
-
-	return 0;
-}
-
-int board_ehci_power(int port, int on)
-{
-	if (port)
-		return 0;
-	gpio_set_value(GP_USB_OTG_PWR, on);
-	return 0;
-}
-
-#endif
-
-#ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg usdhc_cfg[2] = {
-	{USDHC3_BASE_ADDR},
-	{USDHC4_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	int ret;
-
-	if (cfg->esdhc_base == USDHC3_BASE_ADDR) {
-		gpio_direction_input(IMX_GPIO_NR(7, 0));
-		ret = !gpio_get_value(IMX_GPIO_NR(7, 0));
-	} else {
-		gpio_direction_input(IMX_GPIO_NR(2, 6));
-		ret = !gpio_get_value(IMX_GPIO_NR(2, 6));
-	}
-
-	return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-	s32 status = 0;
-	u32 index = 0;
-
-	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-
-	usdhc_cfg[0].max_bus_width = 4;
-	usdhc_cfg[1].max_bus_width = 4;
-
-	for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
-		switch (index) {
-		case 0:
-			imx_iomux_v3_setup_multiple_pads(
-				usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
-			break;
-		case 1:
-		       imx_iomux_v3_setup_multiple_pads(
-			       usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
-		       break;
-		default:
-		       printf("Warning: you configured more USDHC controllers"
-			       "(%d) then supported by the board (%d)\n",
-			       index + 1, CONFIG_SYS_FSL_USDHC_NUM);
-		       return status;
-		}
-
-		status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
-	}
-
-	return status;
-}
-#endif
-
-#ifdef CONFIG_MXC_SPI
-iomux_v3_cfg_t const ecspi1_pads[] = {
-	/* SS1 */
-	MX6_PAD_EIM_D19__GPIO3_IO19   | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
-};
-
-void setup_spi(void)
-{
-	imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
-					 ARRAY_SIZE(ecspi1_pads));
-}
-#endif
-
-int board_phy_config(struct phy_device *phydev)
-{
-	/* min rx data delay */
-	ksz9021_phy_extended_write(phydev,
-			MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0);
-	/* min tx data delay */
-	ksz9021_phy_extended_write(phydev,
-			MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0);
-	/* max rx/tx clock delay, min rx/tx control */
-	ksz9021_phy_extended_write(phydev,
-			MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0);
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
-	uint32_t base = IMX_FEC_BASE;
-	struct mii_dev *bus = NULL;
-	struct phy_device *phydev = NULL;
-	int ret;
-
-	setup_iomux_enet();
-
-#ifdef CONFIG_FEC_MXC
-	bus = fec_get_miibus(base, -1);
-	if (!bus)
-		return 0;
-	/* scan phy 4,5,6,7 */
-	phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
-	if (!phydev) {
-		free(bus);
-		return 0;
-	}
-	printf("using phy at %d\n", phydev->addr);
-	ret  = fec_probe(bis, -1, base, bus, phydev);
-	if (ret) {
-		printf("FEC MXC: %s:failed\n", __func__);
-		free(phydev);
-		free(bus);
-	}
-#endif
-
-#ifdef CONFIG_CI_UDC
-	/* For otg ethernet*/
-	usb_eth_initialize(bis);
-#endif
-	return 0;
-}
-
-static void setup_buttons(void)
-{
-	imx_iomux_v3_setup_multiple_pads(button_pads,
-					 ARRAY_SIZE(button_pads));
-}
-
-#if defined(CONFIG_VIDEO_IPUV3)
-
-static iomux_v3_cfg_t const backlight_pads[] = {
-	/* Backlight on RGB connector: J15 */
-	MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21)
-
-	/* Backlight on LVDS connector: J6 */
-	MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18)
-};
-
-static iomux_v3_cfg_t const rgb_pads[] = {
-	MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
-	MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
-	MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02,
-	MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03,
-	MX6_PAD_DI0_PIN4__GPIO4_IO20,
-	MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
-	MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
-	MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
-	MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03,
-	MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04,
-	MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05,
-	MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06,
-	MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07,
-	MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08,
-	MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09,
-	MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10,
-	MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11,
-	MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12,
-	MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13,
-	MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14,
-	MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15,
-	MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16,
-	MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17,
-	MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18,
-	MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19,
-	MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20,
-	MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21,
-	MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22,
-	MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23,
-};
-
-struct display_info_t {
-	int	bus;
-	int	addr;
-	int	pixfmt;
-	int	(*detect)(struct display_info_t const *dev);
-	void	(*enable)(struct display_info_t const *dev);
-	struct	fb_videomode mode;
-};
-
-
-static int detect_hdmi(struct display_info_t const *dev)
-{
-	struct hdmi_regs *hdmi	= (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
-	return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT;
-}
-
-static void do_enable_hdmi(struct display_info_t const *dev)
-{
-	imx_enable_hdmi_phy();
-}
-
-static int detect_i2c(struct display_info_t const *dev)
-{
-	return ((0 == i2c_set_bus_num(dev->bus))
-		&&
-		(0 == i2c_probe(dev->addr)));
-}
-
-static void enable_lvds(struct display_info_t const *dev)
-{
-	struct iomuxc *iomux = (struct iomuxc *)
-				IOMUXC_BASE_ADDR;
-	u32 reg = readl(&iomux->gpr[2]);
-	reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT;
-	writel(reg, &iomux->gpr[2]);
-	gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
-}
-
-static void enable_rgb(struct display_info_t const *dev)
-{
-	imx_iomux_v3_setup_multiple_pads(
-		rgb_pads,
-		 ARRAY_SIZE(rgb_pads));
-	gpio_direction_output(RGB_BACKLIGHT_GP, 1);
-}
-
-static struct display_info_t const displays[] = {{
-	.bus	= -1,
-	.addr	= 0,
-	.pixfmt	= IPU_PIX_FMT_RGB24,
-	.detect	= detect_hdmi,
-	.enable	= do_enable_hdmi,
-	.mode	= {
-		.name           = "HDMI",
-		.refresh        = 60,
-		.xres           = 1024,
-		.yres           = 768,
-		.pixclock       = 15385,
-		.left_margin    = 220,
-		.right_margin   = 40,
-		.upper_margin   = 21,
-		.lower_margin   = 7,
-		.hsync_len      = 60,
-		.vsync_len      = 10,
-		.sync           = FB_SYNC_EXT,
-		.vmode          = FB_VMODE_NONINTERLACED
-} }, {
-	.bus	= 2,
-	.addr	= 0x4,
-	.pixfmt	= IPU_PIX_FMT_LVDS666,
-	.detect	= detect_i2c,
-	.enable	= enable_lvds,
-	.mode	= {
-		.name           = "Hannstar-XGA",
-		.refresh        = 60,
-		.xres           = 1024,
-		.yres           = 768,
-		.pixclock       = 15385,
-		.left_margin    = 220,
-		.right_margin   = 40,
-		.upper_margin   = 21,
-		.lower_margin   = 7,
-		.hsync_len      = 60,
-		.vsync_len      = 10,
-		.sync           = FB_SYNC_EXT,
-		.vmode          = FB_VMODE_NONINTERLACED
-} }, {
-	.bus	= 2,
-	.addr	= 0x38,
-	.pixfmt	= IPU_PIX_FMT_LVDS666,
-	.detect	= detect_i2c,
-	.enable	= enable_lvds,
-	.mode	= {
-		.name           = "wsvga-lvds",
-		.refresh        = 60,
-		.xres           = 1024,
-		.yres           = 600,
-		.pixclock       = 15385,
-		.left_margin    = 220,
-		.right_margin   = 40,
-		.upper_margin   = 21,
-		.lower_margin   = 7,
-		.hsync_len      = 60,
-		.vsync_len      = 10,
-		.sync           = FB_SYNC_EXT,
-		.vmode          = FB_VMODE_NONINTERLACED
-} }, {
-	.bus	= 2,
-	.addr	= 0x48,
-	.pixfmt	= IPU_PIX_FMT_RGB666,
-	.detect	= detect_i2c,
-	.enable	= enable_rgb,
-	.mode	= {
-		.name           = "wvga-rgb",
-		.refresh        = 57,
-		.xres           = 800,
-		.yres           = 480,
-		.pixclock       = 37037,
-		.left_margin    = 40,
-		.right_margin   = 60,
-		.upper_margin   = 10,
-		.lower_margin   = 10,
-		.hsync_len      = 20,
-		.vsync_len      = 10,
-		.sync           = 0,
-		.vmode          = FB_VMODE_NONINTERLACED
-} } };
-
-int board_video_skip(void)
-{
-	int i;
-	int ret;
-	char const *panel = getenv("panel");
-	if (!panel) {
-		for (i = 0; i < ARRAY_SIZE(displays); i++) {
-			struct display_info_t const *dev = displays+i;
-			if (dev->detect(dev)) {
-				panel = dev->mode.name;
-				printf("auto-detected panel %s\n", panel);
-				break;
-			}
-		}
-		if (!panel) {
-			panel = displays[0].mode.name;
-			printf("No panel detected: default to %s\n", panel);
-			i = 0;
-		}
-	} else {
-		for (i = 0; i < ARRAY_SIZE(displays); i++) {
-			if (!strcmp(panel, displays[i].mode.name))
-				break;
-		}
-	}
-	if (i < ARRAY_SIZE(displays)) {
-		ret = ipuv3_fb_init(&displays[i].mode, 0,
-				    displays[i].pixfmt);
-		if (!ret) {
-			displays[i].enable(displays+i);
-			printf("Display: %s (%ux%u)\n",
-			       displays[i].mode.name,
-			       displays[i].mode.xres,
-			       displays[i].mode.yres);
-		} else {
-			printf("LCD %s cannot be configured: %d\n",
-			       displays[i].mode.name, ret);
-		}
-	} else {
-		printf("unsupported panel %s\n", panel);
-		ret = -EINVAL;
-	}
-	return (0 != ret);
-}
-
-static void setup_display(void)
-{
-	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-	int reg;
-
-	enable_ipu_clock();
-	imx_setup_hdmi();
-	/* Turn on LDB0,IPU,IPU DI0 clocks */
-	reg = __raw_readl(&mxc_ccm->CCGR3);
-	reg |=  MXC_CCM_CCGR3_LDB_DI0_MASK;
-	writel(reg, &mxc_ccm->CCGR3);
-
-	/* set LDB0, LDB1 clk select to 011/011 */
-	reg = readl(&mxc_ccm->cs2cdr);
-	reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
-		 |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
-	reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
-	      |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
-	writel(reg, &mxc_ccm->cs2cdr);
-
-	reg = readl(&mxc_ccm->cscmr2);
-	reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
-	writel(reg, &mxc_ccm->cscmr2);
-
-	reg = readl(&mxc_ccm->chsccdr);
-	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
-		<<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
-	writel(reg, &mxc_ccm->chsccdr);
-
-	reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
-	     |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH
-	     |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
-	     |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
-	     |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
-	     |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
-	     |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
-	     |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
-	     |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
-	writel(reg, &iomux->gpr[2]);
-
-	reg = readl(&iomux->gpr[3]);
-	reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK
-			|IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
-	    | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
-	       <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
-	writel(reg, &iomux->gpr[3]);
-
-	/* backlights off until needed */
-	imx_iomux_v3_setup_multiple_pads(backlight_pads,
-					 ARRAY_SIZE(backlight_pads));
-	gpio_direction_input(LVDS_BACKLIGHT_GP);
-	gpio_direction_input(RGB_BACKLIGHT_GP);
-}
-#endif
-
-int board_early_init_f(void)
-{
-	setup_iomux_uart();
-
-	/* Disable wl1271 For Nitrogen6w */
-	gpio_direction_input(WL12XX_WL_IRQ_GP);
-	gpio_direction_output(WL12XX_WL_ENABLE_GP, 0);
-	gpio_direction_output(WL12XX_BT_ENABLE_GP, 0);
-	gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
-
-	imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
-	setup_buttons();
-
-#if defined(CONFIG_VIDEO_IPUV3)
-	setup_display();
-#endif
-	return 0;
-}
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
-	return 1;
-}
-
-int board_init(void)
-{
-	struct iomuxc_base_regs *const iomuxc_regs
-		= (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
-
-	clrsetbits_le32(&iomuxc_regs->gpr[1],
-			IOMUXC_GPR1_OTG_ID_MASK,
-			IOMUXC_GPR1_OTG_ID_GPIO1);
-
-	imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
-
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_MXC_SPI
-	setup_spi();
-#endif
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
-	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-	setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-
-#ifdef CONFIG_CMD_SATA
-	setup_sata();
-#endif
-
-	return 0;
-}
-
-int checkboard(void)
-{
-	if (gpio_get_value(WL12XX_WL_IRQ_GP))
-		puts("Board: Nitrogen6X\n");
-	else
-		puts("Board: SABRE Lite\n");
-
-	return 0;
-}
-
-struct button_key {
-	char const	*name;
-	unsigned	gpnum;
-	char		ident;
-};
-
-static struct button_key const buttons[] = {
-	{"back",	IMX_GPIO_NR(2, 2),	'B'},
-	{"home",	IMX_GPIO_NR(2, 4),	'H'},
-	{"menu",	IMX_GPIO_NR(2, 1),	'M'},
-	{"search",	IMX_GPIO_NR(2, 3),	'S'},
-	{"volup",	IMX_GPIO_NR(7, 13),	'V'},
-	{"voldown",	IMX_GPIO_NR(4, 5),	'v'},
-};
-
-/*
- * generate a null-terminated string containing the buttons pressed
- * returns number of keys pressed
- */
-static int read_keys(char *buf)
-{
-	int i, numpressed = 0;
-	for (i = 0; i < ARRAY_SIZE(buttons); i++) {
-		if (!gpio_get_value(buttons[i].gpnum))
-			buf[numpressed++] = buttons[i].ident;
-	}
-	buf[numpressed] = '\0';
-	return numpressed;
-}
-
-static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	char envvalue[ARRAY_SIZE(buttons)+1];
-	int numpressed = read_keys(envvalue);
-	setenv("keybd", envvalue);
-	return numpressed == 0;
-}
-
-U_BOOT_CMD(
-	kbd, 1, 1, do_kbd,
-	"Tests for keypresses, sets 'keybd' environment variable",
-	"Returns 0 (true) to shell if key is pressed."
-);
-
-#ifdef CONFIG_PREBOOT
-static char const kbd_magic_prefix[] = "key_magic";
-static char const kbd_command_prefix[] = "key_cmd";
-
-static void preboot_keys(void)
-{
-	int numpressed;
-	char keypress[ARRAY_SIZE(buttons)+1];
-	numpressed = read_keys(keypress);
-	if (numpressed) {
-		char *kbd_magic_keys = getenv("magic_keys");
-		char *suffix;
-		/*
-		 * loop over all magic keys
-		 */
-		for (suffix = kbd_magic_keys; *suffix; ++suffix) {
-			char *keys;
-			char magic[sizeof(kbd_magic_prefix) + 1];
-			sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
-			keys = getenv(magic);
-			if (keys) {
-				if (!strcmp(keys, keypress))
-					break;
-			}
-		}
-		if (*suffix) {
-			char cmd_name[sizeof(kbd_command_prefix) + 1];
-			char *cmd;
-			sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
-			cmd = getenv(cmd_name);
-			if (cmd) {
-				setenv("preboot", cmd);
-				return;
-			}
-		}
-	}
-}
-#endif
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode board_boot_modes[] = {
-	/* 4 bit bus width */
-	{"mmc0",	MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
-	{"mmc1",	MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
-	{NULL,		0},
-};
-#endif
-
-int misc_init_r(void)
-{
-#ifdef CONFIG_PREBOOT
-	preboot_keys();
-#endif
-
-#ifdef CONFIG_CMD_BMODE
-	add_board_boot_modes(board_boot_modes);
-#endif
-	return 0;
-}