Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

3 files changed, 0 insertions, 271 deletions

diff --git a/qemu/roms/u-boot/board/amcc/walnut/Makefile b/qemu/roms/u-boot/board/amcc/walnut/Makefile
deleted file mode 100644
index 922817076..000000000
--- a/qemu/roms/u-boot/board/amcc/walnut/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= walnut.o flash.o
diff --git a/qemu/roms/u-boot/board/amcc/walnut/flash.c b/qemu/roms/u-boot/board/amcc/walnut/flash.c
deleted file mode 100644
index cc0f4254a..000000000
--- a/qemu/roms/u-boot/board/amcc/walnut/flash.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif				/* DEBUG */
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-unsigned long flash_init(void)
-{
-	unsigned long size_b0, size_b1;
-	int i;
-	uint pbcr;
-	unsigned long base_b0, base_b1;
-
-	/* Init: no FLASHes known */
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	size_b0 =
-	    flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-		       size_b0, size_b0 << 20);
-	}
-
-	/* Only one bank */
-	if (CONFIG_SYS_MAX_FLASH_BANKS == 1) {
-		/* Setup offsets */
-		flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
-
-		/* Monitor protection ON by default */
-		(void)flash_protect(FLAG_PROTECT_SET,
-				    CONFIG_SYS_MONITOR_BASE,
-				    CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
-				    &flash_info[0]);
-#ifdef CONFIG_ENV_IS_IN_FLASH
-		(void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
-				    CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
-				    &flash_info[0]);
-		(void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
-				    CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
-				    &flash_info[0]);
-#endif
-
-		size_b1 = 0;
-		flash_info[0].size = size_b0;
-	} else {
-		/* 2 banks */
-		size_b1 =
-		    flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
-				   &flash_info[1]);
-
-		/* Re-do sizing to get full correct info */
-
-		if (size_b1) {
-			mtdcr(EBC0_CFGADDR, PB0CR);
-			pbcr = mfdcr(EBC0_CFGDATA);
-			mtdcr(EBC0_CFGADDR, PB0CR);
-			base_b1 = -size_b1;
-			pbcr =
-			    (pbcr & 0x0001ffff) | base_b1 |
-			    (((size_b1 / 1024 / 1024) - 1) << 17);
-			mtdcr(EBC0_CFGDATA, pbcr);
-			/*          printf("PB1CR = %x\n", pbcr); */
-		}
-
-		if (size_b0) {
-			mtdcr(EBC0_CFGADDR, PB1CR);
-			pbcr = mfdcr(EBC0_CFGDATA);
-			mtdcr(EBC0_CFGADDR, PB1CR);
-			base_b0 = base_b1 - size_b0;
-			pbcr =
-			    (pbcr & 0x0001ffff) | base_b0 |
-			    (((size_b0 / 1024 / 1024) - 1) << 17);
-			mtdcr(EBC0_CFGDATA, pbcr);
-			/*            printf("PB0CR = %x\n", pbcr); */
-		}
-
-		size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);
-
-		flash_get_offsets(base_b0, &flash_info[0]);
-
-		/* monitor protection ON by default */
-		(void)flash_protect(FLAG_PROTECT_SET,
-				    base_b0 + size_b0 - monitor_flash_len,
-				    base_b0 + size_b0 - 1, &flash_info[0]);
-
-		if (size_b1) {
-			/* Re-do sizing to get full correct info */
-			size_b1 =
-			    flash_get_size((vu_long *) base_b1, &flash_info[1]);
-
-			flash_get_offsets(base_b1, &flash_info[1]);
-
-			/* monitor protection ON by default */
-			(void)flash_protect(FLAG_PROTECT_SET,
-					    base_b1 + size_b1 -
-					    monitor_flash_len,
-					    base_b1 + size_b1 - 1,
-					    &flash_info[1]);
-			/* monitor protection OFF by default (one is enough) */
-			(void)flash_protect(FLAG_PROTECT_CLEAR,
-					    base_b0 + size_b0 -
-					    monitor_flash_len,
-					    base_b0 + size_b0 - 1,
-					    &flash_info[0]);
-		} else {
-			flash_info[1].flash_id = FLASH_UNKNOWN;
-			flash_info[1].sector_count = -1;
-		}
-
-		flash_info[0].size = size_b0;
-		flash_info[1].size = size_b1;
-	}			/* else 2 banks */
-	return (size_b0 + size_b1);
-}
-
-
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
-	int i;
-
-	/* set up sector start address table */
-	if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
-	    (info->flash_id == FLASH_AM040)) {
-		for (i = 0; i < info->sector_count; i++)
-			info->start[i] = base + (i * 0x00010000);
-	} else {
-		if (info->flash_id & FLASH_BTYPE) {
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00004000;
-			info->start[2] = base + 0x00006000;
-			info->start[3] = base + 0x00008000;
-			for (i = 4; i < info->sector_count; i++) {
-				info->start[i] =
-				    base + (i * 0x00010000) - 0x00030000;
-			}
-		} else {
-			/* set sector offsets for top boot block type           */
-			i = info->sector_count - 1;
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00006000;
-			info->start[i--] = base + info->size - 0x00008000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00010000;
-			}
-		}
-	}
-}
diff --git a/qemu/roms/u-boot/board/amcc/walnut/walnut.c b/qemu/roms/u-boot/board/amcc/walnut/walnut.c
deleted file mode 100644
index c9482094f..000000000
--- a/qemu/roms/u-boot/board/amcc/walnut/walnut.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-
-int board_early_init_f(void)
-{
-	/*-------------------------------------------------------------------------+
-	  | Interrupt controller setup for the Walnut/Sycamore board.
-	  | Note: IRQ 0-15  405GP internally generated; active high; level sensitive
-	  |       IRQ 16    405GP internally generated; active low; level sensitive
-	  |       IRQ 17-24 RESERVED
-	  |       IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
-	  |       IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
-	  |       IRQ 27 (EXT IRQ 2) Not Used
-	  |       IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
-	  |       IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
-	  |       IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
-	  |       IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
-	  | Note for Walnut board:
-	  |       An interrupt taken for the FPGA (IRQ 25) indicates that either
-	  |       the Mouse, Keyboard, IRDA, or External Expansion caused the
-	  |       interrupt. The FPGA must be read to determine which device
-	  |       caused the interrupt. The default setting of the FPGA clears
-	  |
-	  +-------------------------------------------------------------------------*/
-
-	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */
-	mtdcr(UIC0ER, 0x00000000);	/* disable all ints */
-	mtdcr(UIC0CR, 0x00000020);	/* set all but FPGA SMI to be non-critical */
-	mtdcr(UIC0PR, 0xFFFFFFE0);	/* set int polarities */
-	mtdcr(UIC0TR, 0x10000000);	/* set int trigger levels */
-	mtdcr(UIC0VCR, 0x00000001);	/* set vect base=0,INT0 highest priority */
-	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */
-
-	/* set UART1 control to select CTS/RTS */
-#define FPGA_BRDC       0xF0300004
-	*(volatile char *)(FPGA_BRDC) |= 0x1;
-
-	return 0;
-}
-
-/*
- * Check Board Identity:
- */
-int checkboard(void)
-{
-	char buf[64];
-	int i = getenv_f("serial#", buf, sizeof(buf));
-	uint pvr = get_pvr();
-
-	if (pvr == PVR_405GPR_RB) {
-		puts("Board: Sycamore - AMCC PPC405GPr Evaluation Board");
-	} else {
-		puts("Board: Walnut - AMCC PPC405GP Evaluation Board");
-	}
-
-	if (i > 0) {
-		puts(", serial# ");
-		puts(buf);
-	}
-	putc('\n');
-
-	return (0);
-}
-
-/*
- * initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- * the necessary info for SDRAM controller configuration
- */
-phys_size_t initdram(int board_type)
-{
-	return spd_sdram();
-}