diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
---|---|---|
committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/board/BuS/eb_cpu5282 | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/board/BuS/eb_cpu5282')
-rw-r--r-- | qemu/roms/u-boot/board/BuS/eb_cpu5282/Makefile | 8 | ||||
-rw-r--r-- | qemu/roms/u-boot/board/BuS/eb_cpu5282/eb_cpu5282.c | 264 | ||||
-rw-r--r-- | qemu/roms/u-boot/board/BuS/eb_cpu5282/u-boot.lds | 82 |
3 files changed, 354 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/BuS/eb_cpu5282/Makefile b/qemu/roms/u-boot/board/BuS/eb_cpu5282/Makefile new file mode 100644 index 000000000..3eb727898 --- /dev/null +++ b/qemu/roms/u-boot/board/BuS/eb_cpu5282/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = eb_cpu5282.o diff --git a/qemu/roms/u-boot/board/BuS/eb_cpu5282/eb_cpu5282.c b/qemu/roms/u-boot/board/BuS/eb_cpu5282/eb_cpu5282.c new file mode 100644 index 000000000..2164b52de --- /dev/null +++ b/qemu/roms/u-boot/board/BuS/eb_cpu5282/eb_cpu5282.c @@ -0,0 +1,264 @@ +/* + * (C) Copyright 2005-2009 + * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de> + * + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include "asm/m5282.h" +#include <bmp_layout.h> +#include <status_led.h> +#include <bus_vcxk.h> + +/*---------------------------------------------------------------------------*/ + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_VIDEO +unsigned long display_width; +unsigned long display_height; +#endif + +/*---------------------------------------------------------------------------*/ + +int checkboard (void) +{ + puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n"); +#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) + puts(" Boot from Internal FLASH\n"); +#endif + return 0; +} + +phys_size_t initdram (int board_type) +{ + int size, i; + + size = 0; + MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 | + MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4); + asm (" nop"); +#ifdef CONFIG_SYS_SDRAM_BASE0 + MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)| + MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) | + MCFSDRAMC_DACR_PS_32; + asm (" nop"); + + MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; + asm (" nop"); + + MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP; + asm (" nop"); + for (i = 0; i < 10; i++) + asm (" nop"); + + *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5; + asm (" nop"); + MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE; + asm (" nop"); + + for (i = 0; i < 2000; i++) + asm (" nop"); + + MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS; + asm (" nop"); + /* write SDRAM mode register */ + *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5; + asm (" nop"); + size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024; +#endif +#ifdef CONFIG_SYS_SDRAM_BASE1xx + MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1) + | MCFSDRAMC_DACR_CASL (1) + | MCFSDRAMC_DACR_CBM (3) + | MCFSDRAMC_DACR_PS_16; + + MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; + + MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP; + + *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5; + MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE; + + for (i = 0; i < 2000; i++) + asm (" nop"); + + MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS; + *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5; + size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024; +#endif + return size; +} + +#if defined(CONFIG_SYS_DRAM_TEST) +int testdram (void) +{ + uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START; + uint *pend = (uint *) CONFIG_SYS_MEMTEST_END; + uint *p; + + printf("SDRAM test phase 1:\n"); + for (p = pstart; p < pend; p++) + *p = 0xaaaaaaaa; + + for (p = pstart; p < pend; p++) { + if (*p != 0xaaaaaaaa) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf("SDRAM test phase 2:\n"); + for (p = pstart; p < pend; p++) + *p = 0x55555555; + + for (p = pstart; p < pend; p++) { + if (*p != 0x55555555) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf("SDRAM test passed.\n"); + return 0; +} +#endif + +#if defined(CONFIG_HW_WATCHDOG) + +void hw_watchdog_init(void) +{ + char *s; + int enable; + + enable = 1; + s = getenv("watchdog"); + if (s != NULL) + if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0)) + enable = 0; + if (enable) + MCFGPTA_GPTDDR |= (1<<2); + else + MCFGPTA_GPTDDR &= ~(1<<2); +} + +void hw_watchdog_reset(void) +{ + MCFGPTA_GPTPORT ^= (1<<2); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_HW_WATCHDOG + hw_watchdog_init(); +#endif + return 1; +} + +void __led_toggle(led_id_t mask) +{ + MCFGPTA_GPTPORT ^= (1 << 3); +} + +void __led_init(led_id_t mask, int state) +{ + __led_set(mask, state); + MCFGPTA_GPTDDR |= (1 << 3); +} + +void __led_set(led_id_t mask, int state) +{ + if (state == STATUS_LED_ON) + MCFGPTA_GPTPORT |= (1 << 3); + else + MCFGPTA_GPTPORT &= ~(1 << 3); +} + +#if defined(CONFIG_VIDEO) + +int drv_video_init(void) +{ + char *s; +#ifdef CONFIG_SPLASH_SCREEN + unsigned long splash; +#endif + printf("Init Video as "); + s = getenv("displaywidth"); + if (s != NULL) + display_width = simple_strtoul(s, NULL, 10); + else + display_width = 256; + + s = getenv("displayheight"); + if (s != NULL) + display_height = simple_strtoul(s, NULL, 10); + else + display_height = 256; + + printf("%lu x %lu pixel matrix\n", display_width, display_height); + + MCFCCM_CCR &= ~MCFCCM_CCR_SZEN; + MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2; + + vcxk_init(display_width, display_height); + +#ifdef CONFIG_SPLASH_SCREEN + s = getenv("splashimage"); + if (s != NULL) { + splash = simple_strtoul(s, NULL, 16); + vcxk_acknowledge_wait(); + video_display_bitmap(splash, 0, 0); + } +#endif + return 0; +} +#endif + +/*---------------------------------------------------------------------------*/ + +#ifdef CONFIG_VIDEO +int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int rcode = 0; + ulong side; + ulong bright; + + switch (argc) { + case 3: + side = simple_strtoul(argv[1], NULL, 10); + bright = simple_strtoul(argv[2], NULL, 10); + if ((side >= 0) && (side <= 3) && + (bright >= 0) && (bright <= 1000)) { + vcxk_setbrightness(side, bright); + rcode = 0; + } else { + printf("parameters out of range\n"); + printf("Usage:\n%s\n", cmdtp->usage); + rcode = 1; + } + break; + default: + printf("Usage:\n%s\n", cmdtp->usage); + rcode = 1; + break; + } + return rcode; +} + +/*---------------------------------------------------------------------------*/ + +U_BOOT_CMD( + bright, 3, 0, do_brightness, + "sets the display brightness\n", + " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n" +); + +#endif + +/* EOF EB+MCF-EV123.c */ diff --git a/qemu/roms/u-boot/board/BuS/eb_cpu5282/u-boot.lds b/qemu/roms/u-boot/board/BuS/eb_cpu5282/u-boot.lds new file mode 100644 index 000000000..0df2a0aaf --- /dev/null +++ b/qemu/roms/u-boot/board/BuS/eb_cpu5282/u-boot.lds @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(m68k) + +SECTIONS +{ + .text : + { + arch/m68k/cpu/mcf52x2/start.o (.text*) + + *(.text*) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + KEEP(*(.got)) + __got_end = .; + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data*) + *(.sdata*) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + _sbss = .; + *(.bss*) + *(.sbss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + __bss_end = . ; + PROVIDE (end = .); +} |