diff options
author | 2015-08-28 09:58:54 +0800 | |
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committer | 2015-09-01 12:44:00 +0800 | |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c')
-rw-r--r-- | qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c b/qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c new file mode 100644 index 000000000..bda5e438d --- /dev/null +++ b/qemu/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c @@ -0,0 +1,35 @@ +/* + * + * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* CPU specific interrupt routine */ +#include <common.h> +#include <asm/immap.h> +#include <asm/io.h> + +int interrupt_init(void) +{ + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + + /* Make sure all interrupts are disabled */ + setbits_be32(&intp->imrh0, 0xffffffff); + setbits_be32(&intp->imrl0, 0xffffffff); + + enable_interrupts(); + + return 0; +} + +#if defined(CONFIG_SLTTMR) +void dtimer_intr_setup(void) +{ + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + + out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); + clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); +} +#endif |