diff options
author | RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
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committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c | |
parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c')
-rw-r--r-- | qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c | 132 |
1 files changed, 0 insertions, 132 deletions
diff --git a/qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c b/qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c deleted file mode 100644 index 2c67c322c..000000000 --- a/qemu/roms/u-boot/arch/arm/cpu/armv7/am33xx/emif4.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * emif4.c - * - * AM33XX emif4 configuration file - * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/cpu.h> -#include <asm/arch/ddr_defs.h> -#include <asm/arch/hardware.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <asm/io.h> -#include <asm/emif.h> - -DECLARE_GLOBAL_DATA_PTR; - -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size( - (void *)CONFIG_SYS_SDRAM_BASE, - CONFIG_MAX_RAM_BANK_SIZE); - return 0; -} - -void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; -} - - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_TI81XX -static struct dmm_lisa_map_regs *hw_lisa_map_regs = - (struct dmm_lisa_map_regs *)DMM_BASE; -#endif -#ifndef CONFIG_TI816X -static struct vtp_reg *vtpreg[2] = { - (struct vtp_reg *)VTP0_CTRL_ADDR, - (struct vtp_reg *)VTP1_CTRL_ADDR}; -#endif -#ifdef CONFIG_AM33XX -static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; -#endif -#ifdef CONFIG_AM43XX -static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; -static struct cm_device_inst *cm_device = - (struct cm_device_inst *)CM_DEVICE_INST; -#endif - -#ifdef CONFIG_TI81XX -void config_dmm(const struct dmm_lisa_map_regs *regs) -{ - enable_dmm_clocks(); - - writel(0, &hw_lisa_map_regs->dmm_lisa_map_3); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_2); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_1); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_0); - - writel(regs->dmm_lisa_map_3, &hw_lisa_map_regs->dmm_lisa_map_3); - writel(regs->dmm_lisa_map_2, &hw_lisa_map_regs->dmm_lisa_map_2); - writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1); - writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0); -} -#endif - -#ifndef CONFIG_TI816X -static void config_vtp(int nr) -{ - writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE, - &vtpreg[nr]->vtp0ctrlreg); - writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN), - &vtpreg[nr]->vtp0ctrlreg); - writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN, - &vtpreg[nr]->vtp0ctrlreg); - - /* Poll for READY */ - while ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) != - VTP_CTRL_READY) - ; -} -#endif - -void __weak ddr_pll_config(unsigned int ddrpll_m) -{ -} - -void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs, - const struct ddr_data *data, const struct cmd_control *ctrl, - const struct emif_regs *regs, int nr) -{ - ddr_pll_config(pll); -#ifndef CONFIG_TI816X - config_vtp(nr); -#endif - config_cmd_ctrl(ctrl, nr); - - config_ddr_data(data, nr); -#ifdef CONFIG_AM33XX - config_io_ctrl(ioregs); - - /* Set CKE to be controlled by EMIF/DDR PHY */ - writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); -#endif -#ifdef CONFIG_AM43XX - writel(readl(&cm_device->cm_dll_ctrl) & ~0x1, &cm_device->cm_dll_ctrl); - while ((readl(&cm_device->cm_dll_ctrl) && CM_DLL_READYST) == 0) - ; - writel(0x80000000, &ddrctrl->ddrioctrl); - - config_io_ctrl(ioregs); - - /* Set CKE to be controlled by EMIF/DDR PHY */ - writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); -#endif - - /* Program EMIF instance */ - config_ddr_phy(regs, nr); - set_sdram_timings(regs, nr); - if (get_emif_rev(EMIF1_BASE) == EMIF_4D5) - config_sdram_emif4d5(regs, nr); - else - config_sdram(regs, nr); -} -#endif |