Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

4 files changed, 0 insertions, 177 deletions

diff --git a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/Makefile b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/Makefile
deleted file mode 100644
index cdf1345d5..000000000
--- a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= timer.o gpio.o
-obj-y	+= reset.o
diff --git a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/gpio.c b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/gpio.c
deleted file mode 100644
index eff5b2b75..000000000
--- a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/gpio.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2009 Alessandro Rubini
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-
-static unsigned long gpio_base[4] = {
-	NOMADIK_GPIO0_BASE,
-	NOMADIK_GPIO1_BASE,
-	NOMADIK_GPIO2_BASE,
-	NOMADIK_GPIO3_BASE
-};
-
-enum gpio_registers {
-	GPIO_DAT =	0x00,		/* data register */
-	GPIO_DATS =	0x04,		/* data set */
-	GPIO_DATC =	0x08,		/* data clear */
-	GPIO_PDIS =	0x0c,		/* pull disable */
-	GPIO_DIR =	0x10,		/* direction */
-	GPIO_DIRS =	0x14,		/* direction set */
-	GPIO_DIRC =	0x18,		/* direction clear */
-	GPIO_AFSLA =	0x20,		/* alternate function select A */
-	GPIO_AFSLB =	0x24,		/* alternate function select B */
-};
-
-static inline unsigned long gpio_to_base(int gpio)
-{
-	return gpio_base[gpio / 32];
-}
-
-static inline u32 gpio_to_bit(int gpio)
-{
-	return 1 << (gpio & 0x1f);
-}
-
-void nmk_gpio_af(int gpio, int alternate_function)
-{
-	unsigned long base = gpio_to_base(gpio);
-	u32 bit = gpio_to_bit(gpio);
-	u32 afunc, bfunc;
-
-	/* alternate function is 0..3, with one bit per register */
-	afunc = readl(base + GPIO_AFSLA) & ~bit;
-	bfunc = readl(base + GPIO_AFSLB) & ~bit;
-	if (alternate_function & 1) afunc |= bit;
-	if (alternate_function & 2) bfunc |= bit;
-	writel(afunc, base + GPIO_AFSLA);
-	writel(bfunc, base + GPIO_AFSLB);
-}
-
-void nmk_gpio_dir(int gpio, int dir)
-{
-	unsigned long base = gpio_to_base(gpio);
-	u32 bit = gpio_to_bit(gpio);
-
-	if (dir)
-		writel(bit, base + GPIO_DIRS);
-	else
-		writel(bit, base + GPIO_DIRC);
-}
-
-void nmk_gpio_set(int gpio, int val)
-{
-	unsigned long base = gpio_to_base(gpio);
-	u32 bit = gpio_to_bit(gpio);
-
-	if (val)
-		writel(bit, base + GPIO_DATS);
-	else
-		writel(bit, base + GPIO_DATC);
-}
-
-int nmk_gpio_get(int gpio)
-{
-	unsigned long base = gpio_to_base(gpio);
-	u32 bit = gpio_to_bit(gpio);
-
-	return readl(base + GPIO_DAT) & bit;
-}
diff --git a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/reset.S b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/reset.S
deleted file mode 100644
index ec954726a..000000000
--- a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/reset.S
+++ /dev/null
@@ -1,14 +0,0 @@
-#include <config.h>
-/*
- * Processor reset for Nomadik
- */
-
-	.align 5
-.globl reset_cpu
-reset_cpu:
-	ldr	r0, =NOMADIK_SRC_BASE	/* System and Reset Controller */
-	ldr	r1, =0x1
-	str	r1, [r0, #0x18]
-
-_loop_forever:
-	b	_loop_forever
diff --git a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/timer.c b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/timer.c
deleted file mode 100644
index 775d0b748..000000000
--- a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/nomadik/timer.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * (C) Copyright 2009 Alessandro Rubini
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/mtu.h>
-
-/*
- * The timer is a decrementer, we'll left it free running at 2.4MHz.
- * We have 2.4 ticks per microsecond and an overflow in almost 30min
- */
-#define TIMER_CLOCK		(24 * 100 * 1000)
-#define COUNT_TO_USEC(x)	((x) * 5 / 12)	/* overflows at 6min */
-#define USEC_TO_COUNT(x)	((x) * 12 / 5)	/* overflows at 6min */
-#define TICKS_PER_HZ		(TIMER_CLOCK / CONFIG_SYS_HZ)
-#define TICKS_TO_HZ(x)		((x) / TICKS_PER_HZ)
-
-/* macro to read the decrementing 32 bit timer as an increasing count */
-#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
-
-/* Configure a free-running, auto-wrap counter with no prescaler */
-int timer_init(void)
-{
-	ulong val;
-
-	writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
-	       CONFIG_SYS_TIMERBASE + MTU_CR(0));
-
-	/* Reset the timer */
-	writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
-	/*
-	 * The load-register isn't really immediate: it changes on clock
-	 * edges, so we must wait for our newly-written value to appear.
-	 * Since we might miss reading 0, wait for any change in value.
-	 */
-	val = READ_TIMER();
-	while (READ_TIMER() == val)
-		;
-
-	return 0;
-}
-
-/* Return how many HZ passed since "base" */
-ulong get_timer(ulong base)
-{
-	return  TICKS_TO_HZ(READ_TIMER()) - base;
-}
-
-/* Delay x useconds */
-void __udelay(unsigned long usec)
-{
-	ulong ini, end;
-
-	ini = READ_TIMER();
-	end = ini + USEC_TO_COUNT(usec);
-	while ((signed)(end - READ_TIMER()) > 0)
-		;
-}
-
-unsigned long long get_ticks(void)
-{
-	return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}