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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c')
-rw-r--r--qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c
new file mode 100644
index 000000000..e18a3097d
--- /dev/null
+++ b/qemu/roms/u-boot/arch/arm/cpu/arm926ejs/kirkwood/cache.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
+
+void l2_cache_disable()
+{
+ u32 ctrl;
+
+ ctrl = readfr_extra_feature_reg();
+ ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+ writefr_extra_feature_reg(ctrl);
+}