diff options
author | Don Dugger <n0ano@n0ano.com> | 2016-06-03 03:33:22 +0000 |
---|---|---|
committer | Gerrit Code Review <gerrit@172.30.200.206> | 2016-06-03 03:33:23 +0000 |
commit | da27230f80795d0028333713f036d44c53cb0e68 (patch) | |
tree | b3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/roms/seabios/src/hw/pic.c | |
parent | 0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff) | |
parent | 437fd90c0250dee670290f9b714253671a990160 (diff) |
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/roms/seabios/src/hw/pic.c')
-rw-r--r-- | qemu/roms/seabios/src/hw/pic.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/qemu/roms/seabios/src/hw/pic.c b/qemu/roms/seabios/src/hw/pic.c index 6ff696765..d8b9764c7 100644 --- a/qemu/roms/seabios/src/hw/pic.c +++ b/qemu/roms/seabios/src/hw/pic.c @@ -13,12 +13,16 @@ u16 pic_irqmask_read(void) { + if (!CONFIG_HARDWARE_IRQ) + return 0; return inb(PORT_PIC1_DATA) | (inb(PORT_PIC2_DATA) << 8); } void pic_irqmask_write(u16 mask) { + if (!CONFIG_HARDWARE_IRQ) + return; outb(mask, PORT_PIC1_DATA); outb(mask >> 8, PORT_PIC2_DATA); } @@ -26,6 +30,8 @@ pic_irqmask_write(u16 mask) void pic_irqmask_mask(u16 off, u16 on) { + if (!CONFIG_HARDWARE_IRQ) + return; u8 pic1off = off, pic1on = on, pic2off = off>>8, pic2on = on>>8; outb((inb(PORT_PIC1_DATA) & ~pic1off) | pic1on, PORT_PIC1_DATA); outb((inb(PORT_PIC2_DATA) & ~pic2off) | pic2on, PORT_PIC2_DATA); @@ -34,6 +40,8 @@ pic_irqmask_mask(u16 off, u16 on) void pic_reset(u8 irq0, u8 irq8) { + if (!CONFIG_HARDWARE_IRQ) + return; // Send ICW1 (select OCW1 + will send ICW4) outb(0x11, PORT_PIC1_CMD); outb(0x11, PORT_PIC2_CMD); @@ -60,6 +68,8 @@ pic_setup(void) void enable_hwirq(int hwirq, struct segoff_s func) { + if (!CONFIG_HARDWARE_IRQ) + return; pic_irqmask_mask(1 << hwirq, 0); int vector; if (hwirq < 8) @@ -72,6 +82,8 @@ enable_hwirq(int hwirq, struct segoff_s func) static u8 pic_isr1_read(void) { + if (!CONFIG_HARDWARE_IRQ) + return 0; // 0x0b == select OCW1 + read ISR outb(0x0b, PORT_PIC1_CMD); return inb(PORT_PIC1_CMD); @@ -80,6 +92,8 @@ pic_isr1_read(void) static u8 pic_isr2_read(void) { + if (!CONFIG_HARDWARE_IRQ) + return 0; // 0x0b == select OCW1 + read ISR outb(0x0b, PORT_PIC2_CMD); return inb(PORT_PIC2_CMD); |