diff options
| author |   Don Dugger <n0ano@n0ano.com> | 2016-06-03 03:33:22 +0000 |
|---|---|---|
| committer |   Gerrit Code Review <gerrit@172.30.200.206> | 2016-06-03 03:33:23 +0000 |
| commit | da27230f80795d0028333713f036d44c53cb0e68 (patch) | |
| tree | b3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/gdb-xml/power-vsx.xml | |
| parent | 0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff) | |
| parent | 437fd90c0250dee670290f9b714253671a990160 (diff) | |
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/gdb-xml/power-vsx.xml')
| -rw-r--r-- | qemu/gdb-xml/power-vsx.xml | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/qemu/gdb-xml/power-vsx.xml b/qemu/gdb-xml/power-vsx.xml new file mode 100644 index 000000000..fd290e970 --- /dev/null +++ b/qemu/gdb-xml/power-vsx.xml @@ -0,0 +1,44 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008-2015 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- POWER7 VSX registers that do not overlap existing FP and VMX + registers. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.vsx"> + <reg name="vs0h" bitsize="64" type="uint64"/> + <reg name="vs1h" bitsize="64" type="uint64"/> + <reg name="vs2h" bitsize="64" type="uint64"/> + <reg name="vs3h" bitsize="64" type="uint64"/> + <reg name="vs4h" bitsize="64" type="uint64"/> + <reg name="vs5h" bitsize="64" type="uint64"/> + <reg name="vs6h" bitsize="64" type="uint64"/> + <reg name="vs7h" bitsize="64" type="uint64"/> + <reg name="vs8h" bitsize="64" type="uint64"/> + <reg name="vs9h" bitsize="64" type="uint64"/> + <reg name="vs10h" bitsize="64" type="uint64"/> + <reg name="vs11h" bitsize="64" type="uint64"/> + <reg name="vs12h" bitsize="64" type="uint64"/> + <reg name="vs13h" bitsize="64" type="uint64"/> + <reg name="vs14h" bitsize="64" type="uint64"/> + <reg name="vs15h" bitsize="64" type="uint64"/> + <reg name="vs16h" bitsize="64" type="uint64"/> + <reg name="vs17h" bitsize="64" type="uint64"/> + <reg name="vs18h" bitsize="64" type="uint64"/> + <reg name="vs19h" bitsize="64" type="uint64"/> + <reg name="vs20h" bitsize="64" type="uint64"/> + <reg name="vs21h" bitsize="64" type="uint64"/> + <reg name="vs22h" bitsize="64" type="uint64"/> + <reg name="vs23h" bitsize="64" type="uint64"/> + <reg name="vs24h" bitsize="64" type="uint64"/> + <reg name="vs25h" bitsize="64" type="uint64"/> + <reg name="vs26h" bitsize="64" type="uint64"/> + <reg name="vs27h" bitsize="64" type="uint64"/> + <reg name="vs28h" bitsize="64" type="uint64"/> + <reg name="vs29h" bitsize="64" type="uint64"/> + <reg name="vs30h" bitsize="64" type="uint64"/> + <reg name="vs31h" bitsize="64" type="uint64"/> +</feature> |