diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/include/video/sh_mipi_dsi.h | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/include/video/sh_mipi_dsi.h')
| -rw-r--r-- | kernel/include/video/sh_mipi_dsi.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/kernel/include/video/sh_mipi_dsi.h b/kernel/include/video/sh_mipi_dsi.h new file mode 100644 index 000000000..a01f197e6 --- /dev/null +++ b/kernel/include/video/sh_mipi_dsi.h @@ -0,0 +1,59 @@ +/* + * Public SH-mobile MIPI DSI header + * + * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef VIDEO_SH_MIPI_DSI_H +#define VIDEO_SH_MIPI_DSI_H + +enum sh_mipi_dsi_data_fmt { + MIPI_RGB888, + MIPI_RGB565, + MIPI_RGB666_LP, + MIPI_RGB666, + MIPI_BGR888, + MIPI_BGR565, + MIPI_BGR666_LP, + MIPI_BGR666, + MIPI_YUYV, + MIPI_UYVY, + MIPI_YUV420_L, + MIPI_YUV420, +}; + +#define SH_MIPI_DSI_HSABM (1 << 0) +#define SH_MIPI_DSI_HBPBM (1 << 1) +#define SH_MIPI_DSI_HFPBM (1 << 2) +#define SH_MIPI_DSI_BL2E (1 << 3) +#define SH_MIPI_DSI_VSEE (1 << 4) +#define SH_MIPI_DSI_HSEE (1 << 5) +#define SH_MIPI_DSI_HSAE (1 << 6) + +#define SH_MIPI_DSI_HSbyteCLK (1 << 24) +#define SH_MIPI_DSI_HS6divCLK (1 << 25) +#define SH_MIPI_DSI_HS4divCLK (1 << 26) + +#define SH_MIPI_DSI_SYNC_PULSES_MODE (SH_MIPI_DSI_VSEE | \ + SH_MIPI_DSI_HSEE | \ + SH_MIPI_DSI_HSAE) +#define SH_MIPI_DSI_SYNC_EVENTS_MODE (0) +#define SH_MIPI_DSI_SYNC_BURST_MODE (SH_MIPI_DSI_BL2E) + +struct sh_mipi_dsi_info { + enum sh_mipi_dsi_data_fmt data_format; + int channel; + int lane; + unsigned long flags; + u32 clksrc; + u32 phyctrl; /* for extra setting */ + unsigned int vsynw_offset; + int (*set_dot_clock)(struct platform_device *pdev, + void __iomem *base, + int enable); +}; + +#endif |