diff options
| author |   José Pekkarinen <jose.pekkarinen@nokia.com> | 2016-04-11 10:41:07 +0300 |
|---|---|---|
| committer | José Pekkarinen <jose.pekkarinen@nokia.com> | 2016-04-13 08:17:18 +0300 |
| commit | e09b41010ba33a20a87472ee821fa407a5b8da36 (patch) | |
| tree | d10dc367189862e7ca5c592f033dc3726e1df4e3 /kernel/drivers/staging/sm750fb | |
| parent | f93b97fd65072de626c074dbe099a1fff05ce060 (diff) | |
These changes are the raw update to linux-4.4.6-rt14. Kernel sources
are taken from kernel.org, and rt patch from the rt wiki download page.
During the rebasing, the following patch collided:
Force tick interrupt and get rid of softirq magic(I70131fb85).
Collisions have been removed because its logic was found on the
source already.
Change-Id: I7f57a4081d9deaa0d9ccfc41a6c8daccdee3b769
Signed-off-by: José Pekkarinen <jose.pekkarinen@nokia.com>
Diffstat (limited to 'kernel/drivers/staging/sm750fb')
32 files changed, 2353 insertions, 3550 deletions
diff --git a/kernel/drivers/staging/sm750fb/Kconfig b/kernel/drivers/staging/sm750fb/Kconfig index c40d088a4..ccebc25c2 100644 --- a/kernel/drivers/staging/sm750fb/Kconfig +++ b/kernel/drivers/staging/sm750fb/Kconfig @@ -1,6 +1,10 @@ config FB_SM750 tristate "Silicon Motion SM750 framebuffer support" depends on FB && PCI + select FB_MODE_HELPERS + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Frame buffer driver for the Silicon Motion SM750 chip with 2D accelearion and dual head support. diff --git a/kernel/drivers/staging/sm750fb/TODO b/kernel/drivers/staging/sm750fb/TODO index bc1617249..a3a877d90 100644 --- a/kernel/drivers/staging/sm750fb/TODO +++ b/kernel/drivers/staging/sm750fb/TODO @@ -1,7 +1,8 @@ TODO: -- lots of clechpatch cleanup +- lots of checkpatch cleanup - use kernel coding style - refine the code and remove unused code +- Implement hardware acceleration for imageblit if image->depth > 1 - check on hardware effects of removal of USE_HW_I2C and USE_DVICHIP (these two are supposed to be sample code which is given here if someone wants to use those functionalities) diff --git a/kernel/drivers/staging/sm750fb/ddk750_chip.c b/kernel/drivers/staging/sm750fb/ddk750_chip.c index 7b28328c9..0331d3445 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_chip.c +++ b/kernel/drivers/staging/sm750fb/ddk750_chip.c @@ -1,15 +1,9 @@ +#include <linux/sizes.h> + #include "ddk750_help.h" #include "ddk750_reg.h" #include "ddk750_chip.h" #include "ddk750_power.h" -typedef struct _pllcalparam { - unsigned char power;/* d : 0~ 6*/ - unsigned char pod; - unsigned char od; - unsigned char value;/* value of 2 power d (2^d) */ -} -pllcalparam; - logical_chip_type_t getChipType(void) { @@ -17,7 +11,7 @@ logical_chip_type_t getChipType(void) char physicalRev; logical_chip_type_t chip; - physicalID = devId750;//either 0x718 or 0x750 + physicalID = devId750; /* either 0x718 or 0x750 */ physicalRev = revId750; if (physicalID == 0x718) @@ -33,82 +27,36 @@ logical_chip_type_t getChipType(void) return chip; } - -inline unsigned int twoToPowerOfx(unsigned long x) +static unsigned int get_mxclk_freq(void) { - unsigned long i; - unsigned long result = 1; - - for (i = 1; i <= x; i++) - result *= 2; - return result; -} - -inline unsigned int calcPLL(pll_value_t *pPLL) -{ - return (pPLL->inputFreq * pPLL->M / pPLL->N / twoToPowerOfx(pPLL->OD) / twoToPowerOfx(pPLL->POD)); -} - -unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL) -{ - unsigned int ulPllReg = 0; - - pPLL->inputFreq = DEFAULT_INPUT_CLOCK; - pPLL->clockType = clockType; + unsigned int pll_reg; + unsigned int M, N, OD, POD; - switch (clockType) { - case MXCLK_PLL: - ulPllReg = PEEK32(MXCLK_PLL_CTRL); - break; - case PRIMARY_PLL: - ulPllReg = PEEK32(PANEL_PLL_CTRL); - break; - case SECONDARY_PLL: - ulPllReg = PEEK32(CRT_PLL_CTRL); - break; - case VGA0_PLL: - ulPllReg = PEEK32(VGA_PLL0_CTRL); - break; - case VGA1_PLL: - ulPllReg = PEEK32(VGA_PLL1_CTRL); - break; - } - - pPLL->M = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, M); - pPLL->N = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, N); - pPLL->OD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, OD); - pPLL->POD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, POD); - - return calcPLL(pPLL); -} - - -unsigned int getChipClock(void) -{ - pll_value_t pll; -#if 1 if (getChipType() == SM750LE) return MHz(130); -#endif - return getPllValue(MXCLK_PLL, &pll); -} + pll_reg = PEEK32(MXCLK_PLL_CTRL); + M = FIELD_GET(pll_reg, PANEL_PLL_CTRL, M); + N = FIELD_GET(pll_reg, PANEL_PLL_CTRL, N); + OD = FIELD_GET(pll_reg, PANEL_PLL_CTRL, OD); + POD = FIELD_GET(pll_reg, PANEL_PLL_CTRL, POD); + return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD); +} /* * This function set up the main chip clock. * * Input: Frequency to be set. */ -void setChipClock(unsigned int frequency) +static void setChipClock(unsigned int frequency) { pll_value_t pll; unsigned int ulActualMxClk; -#if 1 + /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */ if (getChipType() == SM750LE) return; -#endif if (frequency) { /* @@ -129,16 +77,14 @@ void setChipClock(unsigned int frequency) } } - - -void setMemoryClock(unsigned int frequency) +static void setMemoryClock(unsigned int frequency) { unsigned int ulReg, divisor; - #if 1 + /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ if (getChipType() == SM750LE) return; -#endif + if (frequency) { /* Set the frequency to the maximum frequency that the DDR Memory can take which is 336MHz. */ @@ -146,7 +92,7 @@ void setMemoryClock(unsigned int frequency) frequency = MHz(336); /* Calculate the divisor */ - divisor = (unsigned int) roundedDiv(getChipClock(), frequency); + divisor = roundedDiv(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ ulReg = PEEK32(CURRENT_GATE); @@ -170,7 +116,6 @@ void setMemoryClock(unsigned int frequency) } } - /* * This function set up the master clock (MCLK). * @@ -179,14 +124,14 @@ void setMemoryClock(unsigned int frequency) * NOTE: * The maximum frequency the engine can run is 168MHz. */ -void setMasterClock(unsigned int frequency) +static void setMasterClock(unsigned int frequency) { unsigned int ulReg, divisor; -#if 1 + /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ if (getChipType() == SM750LE) return; -#endif + if (frequency) { /* Set the frequency to the maximum frequency that the SM750 engine can run, which is about 190 MHz. */ @@ -194,7 +139,7 @@ void setMasterClock(unsigned int frequency) frequency = MHz(190); /* Calculate the divisor */ - divisor = (unsigned int) roundedDiv(getChipClock(), frequency); + divisor = roundedDiv(get_mxclk_freq(), frequency); /* Set the corresponding divisor in the register. */ ulReg = PEEK32(CURRENT_GATE); @@ -218,7 +163,6 @@ void setMasterClock(unsigned int frequency) } } - unsigned int ddk750_getVMSize(void) { unsigned int reg; @@ -226,7 +170,7 @@ unsigned int ddk750_getVMSize(void) /* sm750le only use 64 mb memory*/ if (getChipType() == SM750LE) - return MB(64); + return SZ_64M; /* for 750,always use power mode0*/ reg = PEEK32(MODE0_GATE); @@ -237,38 +181,25 @@ unsigned int ddk750_getVMSize(void) reg = FIELD_GET(PEEK32(MISC_CTRL), MISC_CTRL, LOCALMEM_SIZE); switch (reg) { case MISC_CTRL_LOCALMEM_SIZE_8M: - data = MB(8); break; /* 8 Mega byte */ + data = SZ_8M; break; /* 8 Mega byte */ case MISC_CTRL_LOCALMEM_SIZE_16M: - data = MB(16); break; /* 16 Mega byte */ + data = SZ_16M; break; /* 16 Mega byte */ case MISC_CTRL_LOCALMEM_SIZE_32M: - data = MB(32); break; /* 32 Mega byte */ + data = SZ_32M; break; /* 32 Mega byte */ case MISC_CTRL_LOCALMEM_SIZE_64M: - data = MB(64); break; /* 64 Mega byte */ + data = SZ_64M; break; /* 64 Mega byte */ default: data = 0; break; } return data; - } int ddk750_initHw(initchip_param_t *pInitParam) { - unsigned int ulReg; -#if 0 - //move the code to map regiter function. - if (getChipType() == SM718) { - /* turn on big endian bit*/ - ulReg = PEEK32(0x74); - /* now consider register definition in a big endian pattern*/ - POKE32(0x74, ulReg|0x80000000); - } -#endif - - - if (pInitParam->powerMode != 0 ) + if (pInitParam->powerMode != 0) pInitParam->powerMode = 0; setPowerMode(pInitParam->powerMode); @@ -285,7 +216,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) ulReg = FIELD_SET(ulReg, VGA_CONFIGURATION, MODE, GRAPHIC); POKE32(VGA_CONFIGURATION, ulReg); } else { -#if defined(__i386__) || defined( __x86_64__) +#if defined(__i386__) || defined(__x86_64__) /* set graphic mode via IO method */ outb_p(0x88, 0x3d4); outb_p(0x06, 0x3d5); @@ -333,37 +264,6 @@ int ddk750_initHw(initchip_param_t *pInitParam) ulReg = FIELD_SET(ulReg, ALPHA_DISPLAY_CTRL, PLANE, DISABLE); POKE32(ALPHA_DISPLAY_CTRL, ulReg); -#if 0 - /* Disable LCD hardware cursor, if a former application left it on */ - ulReg = PEEK32(PANEL_HWC_ADDRESS); - ulReg = FIELD_SET(ulReg, PANEL_HWC_ADDRESS, ENABLE, DISABLE); - POKE32(PANEL_HWC_ADDRESS, ulReg); - - /* Disable CRT hardware cursor, if a former application left it on */ - ulReg = PEEK32(CRT_HWC_ADDRESS); - ulReg = FIELD_SET(ulReg, CRT_HWC_ADDRESS, ENABLE, DISABLE); - POKE32(CRT_HWC_ADDRESS, ulReg); - - /* Disable ZV Port 0, if a former application left it on */ - ulReg = PEEK32(ZV0_CAPTURE_CTRL); - ulReg = FIELD_SET(ulReg, ZV0_CAPTURE_CTRL, CAP, DISABLE); - POKE32(ZV0_CAPTURE_CTRL, ulReg); - - /* Disable ZV Port 1, if a former application left it on */ - ulReg = PEEK32(ZV1_CAPTURE_CTRL); - ulReg = FIELD_SET(ulReg, ZV1_CAPTURE_CTRL, CAP, DISABLE); - POKE32(ZV1_CAPTURE_CTRL, ulReg); - - /* Disable ZV Port Power, if a former application left it on */ - enableZVPort(0); - /* Disable DMA Channel, if a former application left it on */ - ulReg = PEEK32(DMA_ABORT_INTERRUPT); - ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT); - POKE32(DMA_ABORT_INTERRUPT, ulReg); - - /* Disable i2c */ - enableI2C(0); -#endif /* Disable DMA Channel, if a former application left it on */ ulReg = PEEK32(DMA_ABORT_INTERRUPT); ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT); @@ -378,17 +278,6 @@ int ddk750_initHw(initchip_param_t *pInitParam) return 0; } -#if 0 - -unsigned int absDiff(unsigned int a, unsigned int b) -{ - if ( a > b ) - return(a - b); - else - return(b - a); -} - -#endif /* monk liu @ 4/6/2011: re-write the calculatePLL function of ddk750. @@ -407,196 +296,64 @@ unsigned int absDiff(unsigned int a, unsigned int b) */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { - /* used for primary and secondary channel pixel clock pll */ - static pllcalparam xparm_PIXEL[] = { - /* 2^0 = 1*/ {0, 0, 0, 1}, - /* 2^ 1 =2*/ {1, 0, 1, 2}, - /* 2^ 2 = 4*/ {2, 0, 2, 4}, - {3, 0, 3, 8}, - {4, 1, 3, 16}, - {5, 2, 3, 32}, - /* 2^6 = 64 */ {6, 3, 3, 64}, - }; - - /* used for MXCLK (chip clock) */ - static pllcalparam xparm_MXCLK[] = { - /* 2^0 = 1*/ {0, 0, 0, 1}, - /* 2^ 1 =2*/ {1, 0, 1, 2}, - /* 2^ 2 = 4*/ {2, 0, 2, 4}, - {3, 0, 3, 8}, - }; - /* as sm750 register definition, N located in 2,15 and M located in 1,255 */ int N, M, X, d; - int xcnt; - int miniDiff; + int mini_diff; unsigned int RN, quo, rem, fl_quo; unsigned int input, request; unsigned int tmpClock, ret; - pllcalparam * xparm; + const int max_OD = 3; + int max_d; -#if 1 if (getChipType() == SM750LE) { /* SM750LE don't have prgrammable PLL and M/N values to work on. Just return the requested clock. */ return request_orig; } -#endif ret = 0; - miniDiff = ~0; + mini_diff = ~0; request = request_orig / 1000; input = pll->inputFreq / 1000; /* for MXCLK register , no POD provided, so need be treated differently */ - - if (pll->clockType != MXCLK_PLL) { - xparm = &xparm_PIXEL[0]; - xcnt = sizeof(xparm_PIXEL)/sizeof(xparm_PIXEL[0]); - } else { - xparm = &xparm_MXCLK[0]; - xcnt = sizeof(xparm_MXCLK)/sizeof(xparm_MXCLK[0]); - } - + if (pll->clockType == MXCLK_PLL) + max_d = 3; for (N = 15; N > 1; N--) { /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */ RN = N * request; quo = RN / input; rem = RN % input;/* rem always small than 14318181 */ - fl_quo = (rem * 10000 /input); + fl_quo = (rem * 10000 / input); - for (d = xcnt - 1; d >= 0; d--) { - X = xparm[d].value; - M = quo*X; + for (d = max_d; d >= 0; d--) { + X = (1 << d); + M = quo * X; M += fl_quo * X / 10000; /* round step */ - M += (fl_quo*X % 10000)>5000?1:0; + M += (fl_quo * X % 10000) > 5000 ? 1 : 0; if (M < 256 && M > 0) { unsigned int diff; - tmpClock = pll->inputFreq *M / N / X; + + tmpClock = pll->inputFreq * M / N / X; diff = absDiff(tmpClock, request_orig); - if (diff < miniDiff) { + if (diff < mini_diff) { pll->M = M; pll->N = N; - pll->OD = xparm[d].od; - pll->POD = xparm[d].pod; - miniDiff = diff; + pll->POD = 0; + if (d > max_OD) + pll->POD = d - max_OD; + pll->OD = d - pll->POD; + mini_diff = diff; ret = tmpClock; } } } } - - //printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD); return ret; } -unsigned int calcPllValue2( -unsigned int ulRequestClk, /* Required pixel clock in Hz unit */ -pll_value_t *pPLL /* Structure to hold the value to be set in PLL */ -) -{ - unsigned int M, N, OD, POD = 0, diff, pllClk, odPower, podPower; - unsigned int bestDiff = 0xffffffff; /* biggest 32 bit unsigned number */ - unsigned int ret; - /* Init PLL structure to know states */ - pPLL->M = 0; - pPLL->N = 0; - pPLL->OD = 0; - pPLL->POD = 0; - - /* Sanity check: None at the moment */ - - /* Convert everything in Khz range in order to avoid calculation overflow */ - pPLL->inputFreq /= 1000; - ulRequestClk /= 1000; - -#ifndef VALIDATION_CHIP - /* The maximum of post divider is 8. */ - for (POD = 0; POD <= 3; POD++) -#endif - { - -#ifndef VALIDATION_CHIP - /* MXCLK_PLL does not have post divider. */ - if ((POD > 0) && (pPLL->clockType == MXCLK_PLL)) - break; -#endif - - /* Work out 2 to the power of POD */ - podPower = twoToPowerOfx(POD); - - /* OD has only 2 bits [15:14] and its value must between 0 to 3 */ - for (OD = 0; OD <= 3; OD++) { - /* Work out 2 to the power of OD */ - odPower = twoToPowerOfx(OD); - -#ifdef VALIDATION_CHIP - if (odPower > 4) - podPower = 4; - else - podPower = odPower; -#endif - - /* N has 4 bits [11:8] and its value must between 2 and 15. - The N == 1 will behave differently --> Result is not correct. */ - for (N = 2; N <= 15; N++) { - /* The formula for PLL is ulRequestClk = inputFreq * M / N / (2^OD) - In the following steps, we try to work out a best M value given the others are known. - To avoid decimal calculation, we use 1000 as multiplier for up to 3 decimal places of accuracy. - */ - M = ulRequestClk * N * odPower * 1000 / pPLL->inputFreq; - M = roundedDiv(M, 1000); - - /* M field has only 8 bits, reject value bigger than 8 bits */ - if (M < 256) { - /* Calculate the actual clock for a given M & N */ - pllClk = pPLL->inputFreq * M / N / odPower / podPower; - - /* How much are we different from the requirement */ - diff = absDiff(pllClk, ulRequestClk); - - if (diff < bestDiff) { - bestDiff = diff; - - /* Store M and N values */ - pPLL->M = M; - pPLL->N = N; - pPLL->OD = OD; - -#ifdef VALIDATION_CHIP - if (OD > 2) - POD = 2; - else - POD = OD; -#endif - - pPLL->POD = POD; - } - } - } - } - } - - /* Restore input frequency from Khz to hz unit */ -// pPLL->inputFreq *= 1000; - ulRequestClk *= 1000; - pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */ - - /* Output debug information */ - //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk)); - //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD)); - - /* Return actual frequency that the PLL can set */ - ret = calcPLL(pPLL); - return ret; -} - - - - - unsigned int formatPllReg(pll_value_t *pPLL) { unsigned int ulPllReg = 0; @@ -606,9 +363,9 @@ unsigned int formatPllReg(pll_value_t *pPLL) On returning a 32 bit number, the value can be applied to any PLL in the calling function. */ ulPllReg = - FIELD_SET( 0, PANEL_PLL_CTRL, BYPASS, OFF) - | FIELD_SET( 0, PANEL_PLL_CTRL, POWER, ON) - | FIELD_SET( 0, PANEL_PLL_CTRL, INPUT, OSC) + FIELD_SET(0, PANEL_PLL_CTRL, BYPASS, OFF) + | FIELD_SET(0, PANEL_PLL_CTRL, POWER, ON) + | FIELD_SET(0, PANEL_PLL_CTRL, INPUT, OSC) #ifndef VALIDATION_CHIP | FIELD_VALUE(0, PANEL_PLL_CTRL, POD, pPLL->POD) #endif @@ -616,7 +373,7 @@ unsigned int formatPllReg(pll_value_t *pPLL) | FIELD_VALUE(0, PANEL_PLL_CTRL, N, pPLL->N) | FIELD_VALUE(0, PANEL_PLL_CTRL, M, pPLL->M); - return ulPllReg; + return ulPllReg; } diff --git a/kernel/drivers/staging/sm750fb/ddk750_chip.h b/kernel/drivers/staging/sm750fb/ddk750_chip.h index 04cb0d559..0891384ef 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_chip.h +++ b/kernel/drivers/staging/sm750fb/ddk750_chip.h @@ -8,18 +8,15 @@ #include <linux/io.h> /* This is all the chips recognized by this library */ -typedef enum _logical_chip_type_t -{ - SM_UNKNOWN, - SM718, - SM750, - SM750LE, +typedef enum _logical_chip_type_t { + SM_UNKNOWN, + SM718, + SM750, + SM750LE, } logical_chip_type_t; - -typedef enum _clock_type_t -{ +typedef enum _clock_type_t { MXCLK_PLL, PRIMARY_PLL, SECONDARY_PLL, @@ -28,60 +25,55 @@ typedef enum _clock_type_t } clock_type_t; -typedef struct _pll_value_t -{ - clock_type_t clockType; - unsigned long inputFreq; /* Input clock frequency to the PLL */ +typedef struct _pll_value_t { + clock_type_t clockType; + unsigned long inputFreq; /* Input clock frequency to the PLL */ - /* Use this when clockType = PANEL_PLL */ - unsigned long M; - unsigned long N; - unsigned long OD; - unsigned long POD; + /* Use this when clockType = PANEL_PLL */ + unsigned long M; + unsigned long N; + unsigned long OD; + unsigned long POD; } pll_value_t; /* input struct to initChipParam() function */ -typedef struct _initchip_param_t -{ - unsigned short powerMode; /* Use power mode 0 or 1 */ - unsigned short chipClock; /* Speed of main chip clock in MHz unit - 0 = keep the current clock setting - Others = the new main chip clock - */ - unsigned short memClock; /* Speed of memory clock in MHz unit - 0 = keep the current clock setting - Others = the new memory clock - */ - unsigned short masterClock; /* Speed of master clock in MHz unit - 0 = keep the current clock setting - Others = the new master clock - */ - unsigned short setAllEngOff; /* 0 = leave all engine state untouched. - 1 = make sure they are off: 2D, Overlay, - video alpha, alpha, hardware cursors - */ - unsigned char resetMemory; /* 0 = Do not reset the memory controller - 1 = Reset the memory controller - */ +typedef struct _initchip_param_t { + unsigned short powerMode; /* Use power mode 0 or 1 */ + unsigned short chipClock; /** + * Speed of main chip clock in MHz unit + * 0 = keep the current clock setting + * Others = the new main chip clock + */ + unsigned short memClock; /** + * Speed of memory clock in MHz unit + * 0 = keep the current clock setting + * Others = the new memory clock + */ + unsigned short masterClock; /** + * Speed of master clock in MHz unit + * 0 = keep the current clock setting + * Others = the new master clock + */ + unsigned short setAllEngOff; /** + * 0 = leave all engine state untouched. + * 1 = make sure they are off: 2D, Overlay, + * video alpha, alpha, hardware cursors + */ + unsigned char resetMemory; /** + * 0 = Do not reset the memory controller + * 1 = Reset the memory controller + */ - /* More initialization parameter can be added if needed */ + /* More initialization parameter can be added if needed */ } initchip_param_t; - logical_chip_type_t getChipType(void); -unsigned int calcPllValue(unsigned int request,pll_value_t *pll); -unsigned int calcPllValue2(unsigned int,pll_value_t *); +unsigned int calcPllValue(unsigned int request, pll_value_t *pll); unsigned int formatPllReg(pll_value_t *pPLL); -void ddk750_set_mmio(void __iomem *,unsigned short,char); +void ddk750_set_mmio(void __iomem *, unsigned short, char); unsigned int ddk750_getVMSize(void); int ddk750_initHw(initchip_param_t *); -unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL); -unsigned int getChipClock(void); -void setChipClock(unsigned int); -void setMemoryClock(unsigned int frequency); -void setMasterClock(unsigned int frequency); - #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_display.c b/kernel/drivers/staging/sm750fb/ddk750_display.c index c84196ac0..84f6e8b8c 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_display.c +++ b/kernel/drivers/staging/sm750fb/ddk750_display.c @@ -4,9 +4,9 @@ #include "ddk750_power.h" #include "ddk750_dvi.h" -#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0,delay) +#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0, delay) -static void setDisplayControl(int ctrl,int dispState) +static void setDisplayControl(int ctrl, int disp_state) { /* state != 0 means turn on both timing & plane en_bit */ unsigned long ulDisplayCtrlReg, ulReservedBits; @@ -15,16 +15,14 @@ static void setDisplayControl(int ctrl,int dispState) cnt = 0; /* Set the primary display control */ - if (!ctrl) - { + if (!ctrl) { ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL); /* Turn on/off the Panel display control */ - if (dispState) - { + if (disp_state) { /* Timing should be enabled first before enabling the plane * because changing at the same time does not guarantee that * the plane will also enabled or disabled. - */ + */ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg, PANEL_DISPLAY_CTRL, TIMING, ENABLE); POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); @@ -45,16 +43,13 @@ static void setDisplayControl(int ctrl,int dispState) * until a few delay. Need to write * and read it a couple times */ - do - { + do { cnt++; POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); - } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != + } while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulDisplayCtrlReg & ~ulReservedBits)); - printk("Set Panel Plane enbit:after tried %d times\n",cnt); - } - else - { + printk("Set Panel Plane enbit:after tried %d times\n", cnt); + } else { /* When turning off, there is no rule on the programming * sequence since whenever the clock is off, then it does not * matter whether the plane is enabled or disabled. @@ -71,14 +66,11 @@ static void setDisplayControl(int ctrl,int dispState) POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg); } - } - /* Set the secondary display control */ - else - { + } else { + /* Set the secondary display control */ ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL); - if (dispState) - { + if (disp_state) { /* Timing should be enabled first before enabling the plane because changing at the same time does not guarantee that the plane will also enabled or disabled. */ @@ -100,16 +92,13 @@ static void setDisplayControl(int ctrl,int dispState) FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE) | FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_4_MASK, ENABLE); - do - { + do { cnt++; POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg); - } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) != + } while ((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) != (ulDisplayCtrlReg & ~ulReservedBits)); - printk("Set Crt Plane enbit:after tried %d times\n",cnt); - } - else - { + printk("Set Crt Plane enbit:after tried %d times\n", cnt); + } else { /* When turning off, there is no rule on the programming * sequence since whenever the clock is off, then it does not * matter whether the plane is enabled or disabled. @@ -128,104 +117,90 @@ static void setDisplayControl(int ctrl,int dispState) } } - -static void waitNextVerticalSync(int ctrl,int delay) +static void waitNextVerticalSync(int ctrl, int delay) { unsigned int status; - if(!ctrl){ + + if (!ctrl) { /* primary controller */ - /* Do not wait when the Primary PLL is off or display control is already off. - This will prevent the software to wait forever. */ + /* Do not wait when the Primary PLL is off or display control is already off. + This will prevent the software to wait forever. */ if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PANEL_PLL_CTRL, POWER) == PANEL_PLL_CTRL_POWER_OFF) || (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) == - PANEL_DISPLAY_CTRL_TIMING_DISABLE)) - { + PANEL_DISPLAY_CTRL_TIMING_DISABLE)) { return; } - while (delay-- > 0) - { - /* Wait for end of vsync. */ - do - { - status = FIELD_GET(PEEK32(SYSTEM_CTRL), - SYSTEM_CTRL, - PANEL_VSYNC); - } - while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE); - - /* Wait for start of vsync. */ - do - { - status = FIELD_GET(PEEK32(SYSTEM_CTRL), - SYSTEM_CTRL, - PANEL_VSYNC); - } - while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE); - } - - }else{ + while (delay-- > 0) { + /* Wait for end of vsync. */ + do { + status = FIELD_GET(PEEK32(SYSTEM_CTRL), + SYSTEM_CTRL, + PANEL_VSYNC); + } while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE); + + /* Wait for start of vsync. */ + do { + status = FIELD_GET(PEEK32(SYSTEM_CTRL), + SYSTEM_CTRL, + PANEL_VSYNC); + } while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE); + } + + } else { /* Do not wait when the Primary PLL is off or display control is already off. This will prevent the software to wait forever. */ if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), CRT_PLL_CTRL, POWER) == CRT_PLL_CTRL_POWER_OFF) || (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) == - CRT_DISPLAY_CTRL_TIMING_DISABLE)) - { + CRT_DISPLAY_CTRL_TIMING_DISABLE)) { return; } - while (delay-- > 0) - { + while (delay-- > 0) { /* Wait for end of vsync. */ - do - { + do { status = FIELD_GET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, CRT_VSYNC); - } - while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE); + } while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE); /* Wait for start of vsync. */ - do - { + do { status = FIELD_GET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, CRT_VSYNC); - } - while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE); + } while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE); } } } -static void swPanelPowerSequence(int disp,int delay) +static void swPanelPowerSequence(int disp, int delay) { unsigned int reg; /* disp should be 1 to open sequence */ reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); - reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,DATA,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, DATA, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,VBIASEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, VBIASEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); - reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, FPEN, disp); + POKE32(PANEL_DISPLAY_CTRL, reg); primaryWaitVerticalSync(delay); } @@ -233,75 +208,42 @@ static void swPanelPowerSequence(int disp,int delay) void ddk750_setLogicalDispOut(disp_output_t output) { unsigned int reg; - if(output & PNL_2_USAGE){ + + if (output & PNL_2_USAGE) { /* set panel path controller select */ reg = PEEK32(PANEL_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,SELECT,(output & PNL_2_MASK)>>PNL_2_OFFSET); - POKE32(PANEL_DISPLAY_CTRL,reg); + reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET); + POKE32(PANEL_DISPLAY_CTRL, reg); } - if(output & CRT_2_USAGE){ + if (output & CRT_2_USAGE) { /* set crt path controller select */ reg = PEEK32(CRT_DISPLAY_CTRL); - reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,SELECT,(output & CRT_2_MASK)>>CRT_2_OFFSET); + reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET); /*se blank off */ - reg = FIELD_SET(reg,CRT_DISPLAY_CTRL,BLANK,OFF); - POKE32(CRT_DISPLAY_CTRL,reg); + reg = FIELD_SET(reg, CRT_DISPLAY_CTRL, BLANK, OFF); + POKE32(CRT_DISPLAY_CTRL, reg); } - if(output & PRI_TP_USAGE){ + if (output & PRI_TP_USAGE) { /* set primary timing and plane en_bit */ - setDisplayControl(0,(output&PRI_TP_MASK)>>PRI_TP_OFFSET); + setDisplayControl(0, (output & PRI_TP_MASK) >> PRI_TP_OFFSET); } - if(output & SEC_TP_USAGE){ + if (output & SEC_TP_USAGE) { /* set secondary timing and plane en_bit*/ - setDisplayControl(1,(output&SEC_TP_MASK)>>SEC_TP_OFFSET); + setDisplayControl(1, (output & SEC_TP_MASK) >> SEC_TP_OFFSET); } - if(output & PNL_SEQ_USAGE){ + if (output & PNL_SEQ_USAGE) { /* set panel sequence */ - swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET,4); + swPanelPowerSequence((output & PNL_SEQ_MASK) >> PNL_SEQ_OFFSET, 4); } - if(output & DAC_USAGE) - setDAC((output & DAC_MASK)>>DAC_OFFSET); + if (output & DAC_USAGE) + setDAC((output & DAC_MASK) >> DAC_OFFSET); - if(output & DPMS_USAGE) + if (output & DPMS_USAGE) ddk750_setDPMS((output & DPMS_MASK) >> DPMS_OFFSET); } - - -int ddk750_initDVIDisp(void) -{ - /* Initialize DVI. If the dviInit fail and the VendorID or the DeviceID are - not zeroed, then set the failure flag. If it is zeroe, it might mean - that the system is in Dual CRT Monitor configuration. */ - - /* De-skew enabled with default 111b value. - This will fix some artifacts problem in some mode on board 2.2. - Somehow this fix does not affect board 2.1. - */ - if ((dviInit(1, /* Select Rising Edge */ - 1, /* Select 24-bit bus */ - 0, /* Select Single Edge clock */ - 1, /* Enable HSync as is */ - 1, /* Enable VSync as is */ - 1, /* Enable De-skew */ - 7, /* Set the de-skew setting to maximum setup */ - 1, /* Enable continuous Sync */ - 1, /* Enable PLL Filter */ - 4 /* Use the recommended value for PLL Filter value */ - ) != 0) && (dviGetVendorID() != 0x0000) && (dviGetDeviceID() != 0x0000)) - { - return (-1); - } - - /* TODO: Initialize other display component */ - - /* Success */ - return 0; - -} - diff --git a/kernel/drivers/staging/sm750fb/ddk750_display.h b/kernel/drivers/staging/sm750fb/ddk750_display.h index ae0f84c68..ca35aa1df 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_display.h +++ b/kernel/drivers/staging/sm750fb/ddk750_display.h @@ -8,7 +8,7 @@ #define PNL_2_OFFSET 0 #define PNL_2_MASK (3 << PNL_2_OFFSET) #define PNL_2_USAGE (PNL_2_MASK << 16) -#define PNL_2_PRI ((0 << PNL_2_OFFSET)|PNL_2_USAGE) +#define PNL_2_PRI ((0 << PNL_2_OFFSET)|PNL_2_USAGE) #define PNL_2_SEC ((2 << PNL_2_OFFSET)|PNL_2_USAGE) @@ -17,7 +17,7 @@ 0: both off */ #define PRI_TP_OFFSET 4 -#define PRI_TP_MASK (1 << PRI_TP_OFFSET) +#define PRI_TP_MASK BIT(PRI_TP_OFFSET) #define PRI_TP_USAGE (PRI_TP_MASK << 16) #define PRI_TP_ON ((0x1 << PRI_TP_OFFSET)|PRI_TP_USAGE) #define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET)|PRI_TP_USAGE) @@ -27,18 +27,18 @@ 80000[27:24] */ #define PNL_SEQ_OFFSET 6 -#define PNL_SEQ_MASK (1 << PNL_SEQ_OFFSET) +#define PNL_SEQ_MASK BIT(PNL_SEQ_OFFSET) #define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16) -#define PNL_SEQ_ON ((1 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE) +#define PNL_SEQ_ON (BIT(PNL_SEQ_OFFSET)|PNL_SEQ_USAGE) #define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE) /* dual digital output 80000[19] */ #define DUAL_TFT_OFFSET 8 -#define DUAL_TFT_MASK (1 << DUAL_TFT_OFFSET) +#define DUAL_TFT_MASK BIT(DUAL_TFT_OFFSET) #define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16) -#define DUAL_TFT_ON ((1 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE) +#define DUAL_TFT_ON (BIT(DUAL_TFT_OFFSET)|DUAL_TFT_USAGE) #define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE) /* secondary timing & plane enable bit @@ -46,7 +46,7 @@ 0: both off */ #define SEC_TP_OFFSET 5 -#define SEC_TP_MASK (1<< SEC_TP_OFFSET) +#define SEC_TP_MASK BIT(SEC_TP_OFFSET) #define SEC_TP_USAGE (SEC_TP_MASK << 16) #define SEC_TP_ON ((0x1 << SEC_TP_OFFSET)|SEC_TP_USAGE) #define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET)|SEC_TP_USAGE) @@ -65,9 +65,9 @@ 4[20] */ #define DAC_OFFSET 7 -#define DAC_MASK (1 << DAC_OFFSET) +#define DAC_MASK BIT(DAC_OFFSET) #define DAC_USAGE (DAC_MASK << 16) -#define DAC_ON ((0x0<< DAC_OFFSET)|DAC_USAGE) +#define DAC_ON ((0x0 << DAC_OFFSET)|DAC_USAGE) #define DAC_OFF ((0x1 << DAC_OFFSET)|DAC_USAGE) /* DPMS only affect D-SUB head @@ -85,76 +85,20 @@ LCD1 means panel path TFT1 & panel path DVI (so enable DAC) CRT means crt path DSUB */ -#if 0 -typedef enum _disp_output_t -{ - NO_DISPLAY = DPMS_OFF, - - LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON, - LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON, - - LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON|DPMS_OFF, - LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON|DPMS_OFF, - - DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DAC_ON, - DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DAC_ON, - - LCD1_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON| - CRT_2_PRI|SEC_TP_OFF|DAC_ON, - - LCD1_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON| - CRT_2_SEC|PRI_TP_OFF|DAC_ON, - - /* LCD1 show primary and DSUB show secondary */ - LCD1_DSUB_DUAL = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON| - CRT_2_SEC|SEC_TP_ON|DAC_ON, - - /* LCD1 show secondary and DSUB show primary */ - LCD1_DSUB_DUAL_SWAP = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON| - CRT_2_PRI|PRI_TP_ON|DAC_ON, - - LCD1_LCD2_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON| - CRT_2_PRI|SEC_TP_OFF|DPMS_OFF|DUAL_TFT_ON, - - LCD1_LCD2_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON| - CRT_2_SEC|PRI_TP_OFF|DPMS_OFF|DUAL_TFT_ON, - - LCD1_LCD2_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON| - CRT_2_PRI|SEC_TP_OFF|DPMS_ON|DUAL_TFT_ON, - - LCD1_LCD2_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON| - CRT_2_SEC|PRI_TP_OFF|DPMS_ON|DUAL_TFT_ON, - - -} -disp_output_t; -#else -typedef enum _disp_output_t{ +typedef enum _disp_output_t { do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON, do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON, -#if 0 - do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON, - do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON, -#else do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON, do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON, -#endif /* do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON, do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON, */ -#if 0 - do_CRT_PRI = CRT_2_PRI|PRI_TP_ON, - do_CRT_SEC = CRT_2_SEC|SEC_TP_ON, -#else do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON, do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON, -#endif } disp_output_t; -#endif void ddk750_setLogicalDispOut(disp_output_t); -int ddk750_initDVIDisp(void); #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_dvi.c b/kernel/drivers/staging/sm750fb/ddk750_dvi.c index f5932bbf1..a7a23514a 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_dvi.c +++ b/kernel/drivers/staging/sm750fb/ddk750_dvi.c @@ -1,4 +1,4 @@ -#define USE_DVICHIP +#define USE_DVICHIP #ifdef USE_DVICHIP #include "ddk750_help.h" #include "ddk750_reg.h" @@ -9,49 +9,48 @@ /* This global variable contains all the supported driver and its corresponding function API. Please set the function pointer to NULL whenever the function is not supported. */ -static dvi_ctrl_device_t g_dcftSupportedDviController[] = -{ +static dvi_ctrl_device_t g_dcftSupportedDviController[] = { #ifdef DVI_CTRL_SII164 - { - .pfnInit = sii164InitChip, - .pfnGetVendorId = sii164GetVendorID, - .pfnGetDeviceId = sii164GetDeviceID, + { + .pfnInit = sii164InitChip, + .pfnGetVendorId = sii164GetVendorID, + .pfnGetDeviceId = sii164GetDeviceID, #ifdef SII164_FULL_FUNCTIONS - .pfnResetChip = sii164ResetChip, - .pfnGetChipString = sii164GetChipString, - .pfnSetPower = sii164SetPower, - .pfnEnableHotPlugDetection = sii164EnableHotPlugDetection, - .pfnIsConnected = sii164IsConnected, - .pfnCheckInterrupt = sii164CheckInterrupt, - .pfnClearInterrupt = sii164ClearInterrupt, + .pfnResetChip = sii164ResetChip, + .pfnGetChipString = sii164GetChipString, + .pfnSetPower = sii164SetPower, + .pfnEnableHotPlugDetection = sii164EnableHotPlugDetection, + .pfnIsConnected = sii164IsConnected, + .pfnCheckInterrupt = sii164CheckInterrupt, + .pfnClearInterrupt = sii164ClearInterrupt, #endif - }, + }, #endif }; int dviInit( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue ) { dvi_ctrl_device_t *pCurrentDviCtrl; + pCurrentDviCtrl = g_dcftSupportedDviController; - if(pCurrentDviCtrl->pfnInit != NULL) - { + if (pCurrentDviCtrl->pfnInit != NULL) { return pCurrentDviCtrl->pfnInit(edgeSelect, busSelect, dualEdgeClkSelect, hsyncEnable, - vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable, - pllFilterEnable, pllFilterValue); + vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable, + pllFilterEnable, pllFilterValue); } - return -1;//error + return -1; /* error */ } @@ -64,14 +63,13 @@ int dviInit( */ unsigned short dviGetVendorID(void) { - dvi_ctrl_device_t *pCurrentDviCtrl; + dvi_ctrl_device_t *pCurrentDviCtrl; - //pCurrentDviCtrl = getDviCtrl(); - pCurrentDviCtrl = g_dcftSupportedDviController; - if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) - return pCurrentDviCtrl->pfnGetVendorId(); + pCurrentDviCtrl = g_dcftSupportedDviController; + if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) + return pCurrentDviCtrl->pfnGetVendorId(); - return 0x0000; + return 0x0000; } @@ -84,14 +82,13 @@ unsigned short dviGetVendorID(void) */ unsigned short dviGetDeviceID(void) { - dvi_ctrl_device_t *pCurrentDviCtrl; + dvi_ctrl_device_t *pCurrentDviCtrl; -// pCurrentDviCtrl = getDviCtrl(); pCurrentDviCtrl = g_dcftSupportedDviController; - if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) - return pCurrentDviCtrl->pfnGetDeviceId(); + if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0) + return pCurrentDviCtrl->pfnGetDeviceId(); - return 0x0000; + return 0x0000; } #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_dvi.h b/kernel/drivers/staging/sm750fb/ddk750_dvi.h index 50bcec29b..e1d4c9a2d 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_dvi.h +++ b/kernel/drivers/staging/sm750fb/ddk750_dvi.h @@ -4,16 +4,17 @@ /* dvi chip stuffs structros */ typedef long (*PFN_DVICTRL_INIT)( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue); + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue); + typedef void (*PFN_DVICTRL_RESETCHIP)(void); typedef char* (*PFN_DVICTRL_GETCHIPSTRING)(void); typedef unsigned short (*PFN_DVICTRL_GETVENDORID)(void); @@ -24,44 +25,38 @@ typedef unsigned char (*PFN_DVICTRL_ISCONNECTED)(void); typedef unsigned char (*PFN_DVICTRL_CHECKINTERRUPT)(void); typedef void (*PFN_DVICTRL_CLEARINTERRUPT)(void); - - /* Structure to hold all the function pointer to the DVI Controller. */ -typedef struct _dvi_ctrl_device_t -{ - PFN_DVICTRL_INIT pfnInit; - PFN_DVICTRL_RESETCHIP pfnResetChip; - PFN_DVICTRL_GETCHIPSTRING pfnGetChipString; - PFN_DVICTRL_GETVENDORID pfnGetVendorId; - PFN_DVICTRL_GETDEVICEID pfnGetDeviceId; - PFN_DVICTRL_SETPOWER pfnSetPower; - PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection; - PFN_DVICTRL_ISCONNECTED pfnIsConnected; - PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt; - PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt; +typedef struct _dvi_ctrl_device_t { + PFN_DVICTRL_INIT pfnInit; + PFN_DVICTRL_RESETCHIP pfnResetChip; + PFN_DVICTRL_GETCHIPSTRING pfnGetChipString; + PFN_DVICTRL_GETVENDORID pfnGetVendorId; + PFN_DVICTRL_GETDEVICEID pfnGetDeviceId; + PFN_DVICTRL_SETPOWER pfnSetPower; + PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection; + PFN_DVICTRL_ISCONNECTED pfnIsConnected; + PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt; + PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt; } dvi_ctrl_device_t; -#define DVI_CTRL_SII164 - +#define DVI_CTRL_SII164 /* dvi functions prototype */ int dviInit( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue ); unsigned short dviGetVendorID(void); unsigned short dviGetDeviceID(void); - - #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_help.c b/kernel/drivers/staging/sm750fb/ddk750_help.c index c68ff3b57..9637dd30d 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_help.c +++ b/kernel/drivers/staging/sm750fb/ddk750_help.c @@ -1,18 +1,16 @@ -//#include "ddk750_reg.h" -//#include "ddk750_chip.h" #include "ddk750_help.h" -void __iomem * mmio750 = NULL; -char revId750 = 0; -unsigned short devId750 = 0; +void __iomem *mmio750; +char revId750; +unsigned short devId750; /* after driver mapped io registers, use this function first */ -void ddk750_set_mmio(void __iomem * addr,unsigned short devId,char revId) +void ddk750_set_mmio(void __iomem *addr, unsigned short devId, char revId) { mmio750 = addr; devId750 = devId; revId750 = revId; - if(revId == 0xfe) + if (revId == 0xfe) printk("found sm750le\n"); } diff --git a/kernel/drivers/staging/sm750fb/ddk750_help.h b/kernel/drivers/staging/sm750fb/ddk750_help.h index 07c8264fa..5be814eed 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_help.h +++ b/kernel/drivers/staging/sm750fb/ddk750_help.h @@ -4,22 +4,15 @@ #ifndef USE_INTERNAL_REGISTER_ACCESS #include <linux/ioport.h> -#include <asm/io.h> -#include <asm/uaccess.h> +#include <linux/io.h> +#include <linux/uaccess.h> #include "sm750_help.h" - -#if 0 -/* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */ -#warning "big endian on target cpu and enable nature big endian support of 718 capability !" -#define PEEK32(addr) __raw_readl(mmio750 + addr) -#define POKE32(addr,data) __raw_writel(data, mmio750 + addr) -#else /* software control endianess */ +/* software control endianness */ #define PEEK32(addr) readl(addr + mmio750) -#define POKE32(addr,data) writel(data, addr + mmio750) -#endif +#define POKE32(addr, data) writel(data, addr + mmio750) -extern void __iomem * mmio750; +extern void __iomem *mmio750; extern char revId750; extern unsigned short devId750; #else diff --git a/kernel/drivers/staging/sm750fb/ddk750_hwi2c.c b/kernel/drivers/staging/sm750fb/ddk750_hwi2c.c index 7826376ed..7be211128 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_hwi2c.c +++ b/kernel/drivers/staging/sm750fb/ddk750_hwi2c.c @@ -8,208 +8,204 @@ #define MAX_HWI2C_FIFO 16 #define HWI2C_WAIT_TIMEOUT 0xF0000 - -int hwI2CInit( - unsigned char busSpeedMode +int sm750_hw_i2c_init( +unsigned char bus_speed_mode ) { - unsigned int value; + unsigned int value; - /* Enable GPIO 30 & 31 as IIC clock & data */ + /* Enable GPIO 30 & 31 as IIC clock & data */ value = PEEK32(GPIO_MUX); - value = FIELD_SET(value, GPIO_MUX, 30, I2C) | - FIELD_SET(0, GPIO_MUX, 31, I2C); + value = FIELD_SET(value, GPIO_MUX, 30, I2C) | + FIELD_SET(0, GPIO_MUX, 31, I2C); POKE32(GPIO_MUX, value); - /* Enable Hardware I2C power. - TODO: Check if we need to enable GPIO power? - */ - enableI2C(1); - - /* Enable the I2C Controller and set the bus speed mode */ - value = PEEK32(I2C_CTRL); - if (busSpeedMode == 0) - value = FIELD_SET(value, I2C_CTRL, MODE, STANDARD); - else - value = FIELD_SET(value, I2C_CTRL, MODE, FAST); - value = FIELD_SET(value, I2C_CTRL, EN, ENABLE); - POKE32(I2C_CTRL, value); - - return 0; + /* Enable Hardware I2C power. + TODO: Check if we need to enable GPIO power? + */ + enableI2C(1); + + /* Enable the I2C Controller and set the bus speed mode */ + value = PEEK32(I2C_CTRL); + if (bus_speed_mode == 0) + value = FIELD_SET(value, I2C_CTRL, MODE, STANDARD); + else + value = FIELD_SET(value, I2C_CTRL, MODE, FAST); + value = FIELD_SET(value, I2C_CTRL, EN, ENABLE); + POKE32(I2C_CTRL, value); + + return 0; } - -void hwI2CClose(void) +void sm750_hw_i2c_close(void) { - unsigned int value; + unsigned int value; - /* Disable I2C controller */ - value = PEEK32(I2C_CTRL); - value = FIELD_SET(value, I2C_CTRL, EN, DISABLE); - POKE32(I2C_CTRL, value); + /* Disable I2C controller */ + value = PEEK32(I2C_CTRL); + value = FIELD_SET(value, I2C_CTRL, EN, DISABLE); + POKE32(I2C_CTRL, value); - /* Disable I2C Power */ - enableI2C(0); + /* Disable I2C Power */ + enableI2C(0); - /* Set GPIO 30 & 31 back as GPIO pins */ - value = PEEK32(GPIO_MUX); - value = FIELD_SET(value, GPIO_MUX, 30, GPIO); - value = FIELD_SET(value, GPIO_MUX, 31, GPIO); - POKE32(GPIO_MUX, value); + /* Set GPIO 30 & 31 back as GPIO pins */ + value = PEEK32(GPIO_MUX); + value = FIELD_SET(value, GPIO_MUX, 30, GPIO); + value = FIELD_SET(value, GPIO_MUX, 31, GPIO); + POKE32(GPIO_MUX, value); } - -static long hwI2CWaitTXDone(void) +static long hw_i2c_wait_tx_done(void) { - unsigned int timeout; + unsigned int timeout; - /* Wait until the transfer is completed. */ - timeout = HWI2C_WAIT_TIMEOUT; - while ((FIELD_GET(PEEK32(I2C_STATUS), I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) && - (timeout != 0)) + /* Wait until the transfer is completed. */ + timeout = HWI2C_WAIT_TIMEOUT; + while ((FIELD_GET(PEEK32(I2C_STATUS), + I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) && + (timeout != 0)) timeout--; if (timeout == 0) - return (-1); + return (-1); - return 0; + return 0; } - - /* * This function writes data to the i2c slave device registers. * * Parameters: - * deviceAddress - i2c Slave device address + * addr - i2c Slave device address * length - Total number of bytes to be written to the device - * pBuffer - The buffer that contains the data to be written to the + * buf - The buffer that contains the data to be written to the * i2c device. * * Return Value: * Total number of bytes those are actually written. */ -static unsigned int hwI2CWriteData( - unsigned char deviceAddress, - unsigned int length, - unsigned char *pBuffer +static unsigned int hw_i2c_write_data( + unsigned char addr, + unsigned int length, + unsigned char *buf ) { - unsigned char count, i; - unsigned int totalBytes = 0; - - /* Set the Device Address */ - POKE32(I2C_SLAVE_ADDRESS, deviceAddress & ~0x01); - - /* Write data. - * Note: - * Only 16 byte can be accessed per i2c start instruction. - */ - do - { - /* Reset I2C by writing 0 to I2C_RESET register to clear the previous status. */ - POKE32(I2C_RESET, 0); - - /* Set the number of bytes to be written */ - if (length < MAX_HWI2C_FIFO) - count = length - 1; - else - count = MAX_HWI2C_FIFO - 1; - POKE32(I2C_BYTE_COUNT, count); - - /* Move the data to the I2C data register */ - for (i = 0; i <= count; i++) - POKE32(I2C_DATA0 + i, *pBuffer++); - - /* Start the I2C */ - POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); - - /* Wait until the transfer is completed. */ - if (hwI2CWaitTXDone() != 0) - break; - - /* Substract length */ - length -= (count + 1); - - /* Total byte written */ - totalBytes += (count + 1); - - } while (length > 0); - - return totalBytes; + unsigned char count, i; + unsigned int total_bytes = 0; + + /* Set the Device Address */ + POKE32(I2C_SLAVE_ADDRESS, addr & ~0x01); + + /* Write data. + * Note: + * Only 16 byte can be accessed per i2c start instruction. + */ + do { + /* + * Reset I2C by writing 0 to I2C_RESET register to + * clear the previous status. + */ + POKE32(I2C_RESET, 0); + + /* Set the number of bytes to be written */ + if (length < MAX_HWI2C_FIFO) + count = length - 1; + else + count = MAX_HWI2C_FIFO - 1; + POKE32(I2C_BYTE_COUNT, count); + + /* Move the data to the I2C data register */ + for (i = 0; i <= count; i++) + POKE32(I2C_DATA0 + i, *buf++); + + /* Start the I2C */ + POKE32(I2C_CTRL, + FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); + + /* Wait until the transfer is completed. */ + if (hw_i2c_wait_tx_done() != 0) + break; + + /* Substract length */ + length -= (count + 1); + + /* Total byte written */ + total_bytes += (count + 1); + + } while (length > 0); + + return total_bytes; } - - - /* * This function reads data from the slave device and stores them * in the given buffer * * Parameters: - * deviceAddress - i2c Slave device address + * addr - i2c Slave device address * length - Total number of bytes to be read - * pBuffer - Pointer to a buffer to be filled with the data read + * buf - Pointer to a buffer to be filled with the data read * from the slave device. It has to be the same size as the * length to make sure that it can keep all the data read. * * Return Value: * Total number of actual bytes read from the slave device */ -static unsigned int hwI2CReadData( - unsigned char deviceAddress, - unsigned int length, - unsigned char *pBuffer +static unsigned int hw_i2c_read_data( + unsigned char addr, + unsigned int length, + unsigned char *buf ) { - unsigned char count, i; - unsigned int totalBytes = 0; - - /* Set the Device Address */ - POKE32(I2C_SLAVE_ADDRESS, deviceAddress | 0x01); - - /* Read data and save them to the buffer. - * Note: - * Only 16 byte can be accessed per i2c start instruction. - */ - do - { - /* Reset I2C by writing 0 to I2C_RESET register to clear all the status. */ - POKE32(I2C_RESET, 0); - - /* Set the number of bytes to be read */ - if (length <= MAX_HWI2C_FIFO) - count = length - 1; - else - count = MAX_HWI2C_FIFO - 1; - POKE32(I2C_BYTE_COUNT, count); - - /* Start the I2C */ - POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); - - /* Wait until transaction done. */ - if (hwI2CWaitTXDone() != 0) - break; - - /* Save the data to the given buffer */ - for (i = 0; i <= count; i++) - *pBuffer++ = PEEK32(I2C_DATA0 + i); - - /* Substract length by 16 */ - length -= (count + 1); - - /* Number of bytes read. */ - totalBytes += (count + 1); - - } while (length > 0); - - return totalBytes; + unsigned char count, i; + unsigned int total_bytes = 0; + + /* Set the Device Address */ + POKE32(I2C_SLAVE_ADDRESS, addr | 0x01); + + /* Read data and save them to the buffer. + * Note: + * Only 16 byte can be accessed per i2c start instruction. + */ + do { + /* + * Reset I2C by writing 0 to I2C_RESET register to + * clear all the status. + */ + POKE32(I2C_RESET, 0); + + /* Set the number of bytes to be read */ + if (length <= MAX_HWI2C_FIFO) + count = length - 1; + else + count = MAX_HWI2C_FIFO - 1; + POKE32(I2C_BYTE_COUNT, count); + + /* Start the I2C */ + POKE32(I2C_CTRL, + FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); + + /* Wait until transaction done. */ + if (hw_i2c_wait_tx_done() != 0) + break; + + /* Save the data to the given buffer */ + for (i = 0; i <= count; i++) + *buf++ = PEEK32(I2C_DATA0 + i); + + /* Substract length by 16 */ + length -= (count + 1); + + /* Number of bytes read. */ + total_bytes += (count + 1); + + } while (length > 0); + + return total_bytes; } - - - /* * This function reads the slave device's register * @@ -221,23 +217,19 @@ static unsigned int hwI2CReadData( * Return Value: * Register value */ -unsigned char hwI2CReadReg( - unsigned char deviceAddress, - unsigned char registerIndex +unsigned char sm750_hw_i2c_read_reg( + unsigned char addr, + unsigned char reg ) { - unsigned char value = (0xFF); + unsigned char value = (0xFF); - if (hwI2CWriteData(deviceAddress, 1, ®isterIndex) == 1) - hwI2CReadData(deviceAddress, 1, &value); + if (hw_i2c_write_data(addr, 1, ®) == 1) + hw_i2c_read_data(addr, 1, &value); - return value; + return value; } - - - - /* * This function writes a value to the slave device's register * @@ -251,21 +243,20 @@ unsigned char hwI2CReadReg( * 0 - Success * -1 - Fail */ -int hwI2CWriteReg( - unsigned char deviceAddress, - unsigned char registerIndex, - unsigned char data +int sm750_hw_i2c_write_reg( + unsigned char addr, + unsigned char reg, + unsigned char data ) { - unsigned char value[2]; + unsigned char value[2]; - value[0] = registerIndex; - value[1] = data; - if (hwI2CWriteData(deviceAddress, 2, value) == 2) - return 0; + value[0] = reg; + value[1] = data; + if (hw_i2c_write_data(addr, 2, value) == 2) + return 0; - return (-1); + return (-1); } - #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_hwi2c.h b/kernel/drivers/staging/sm750fb/ddk750_hwi2c.h index ad311493c..46e22dce2 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_hwi2c.h +++ b/kernel/drivers/staging/sm750fb/ddk750_hwi2c.h @@ -2,9 +2,10 @@ #define DDK750_HWI2C_H__ /* hwi2c functions */ -int hwI2CInit(unsigned char busSpeedMode); -void hwI2CClose(void); +int sm750_hw_i2c_init(unsigned char bus_speed_mode); +void sm750_hw_i2c_close(void); -unsigned char hwI2CReadReg(unsigned char deviceAddress,unsigned char registerIndex); -int hwI2CWriteReg(unsigned char deviceAddress,unsigned char registerIndex,unsigned char data); +unsigned char sm750_hw_i2c_read_reg(unsigned char addr, unsigned char reg); +int sm750_hw_i2c_write_reg(unsigned char addr, unsigned char reg, + unsigned char data); #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_mode.c b/kernel/drivers/staging/sm750fb/ddk750_mode.c index 2e418fb6f..fa3592668 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_mode.c +++ b/kernel/drivers/staging/sm750fb/ddk750_mode.c @@ -20,54 +20,54 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, x = pModeParam->horizontal_display_end; y = pModeParam->vertical_display_end; - /* SM750LE has to set up the top-left and bottom-right - registers as well. - Note that normal SM750/SM718 only use those two register for - auto-centering mode. - */ - POKE32(CRT_AUTO_CENTERING_TL, - FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, TOP, 0) - | FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, LEFT, 0)); - - POKE32(CRT_AUTO_CENTERING_BR, - FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, BOTTOM, y-1) - | FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, RIGHT, x-1)); - - /* Assume common fields in dispControl have been properly set before - calling this function. - This function only sets the extra fields in dispControl. - */ + /* SM750LE has to set up the top-left and bottom-right + registers as well. + Note that normal SM750/SM718 only use those two register for + auto-centering mode. + */ + POKE32(CRT_AUTO_CENTERING_TL, + FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, TOP, 0) + | FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, LEFT, 0)); + + POKE32(CRT_AUTO_CENTERING_BR, + FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, BOTTOM, y-1) + | FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, RIGHT, x-1)); + + /* Assume common fields in dispControl have been properly set before + calling this function. + This function only sets the extra fields in dispControl. + */ /* Clear bit 29:27 of display control register */ - dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK); + dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK); /* Set bit 29:27 of display control register for the right clock */ /* Note that SM750LE only need to supported 7 resoluitons. */ - if ( x == 800 && y == 600 ) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41); + if (x == 800 && y == 600) + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41); else if (x == 1024 && y == 768) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65); else if (x == 1152 && y == 864) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); else if (x == 1280 && y == 768) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80); else if (x == 1280 && y == 720) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74); else if (x == 1280 && y == 960) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); else if (x == 1280 && y == 1024) - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108); else /* default to VGA clock */ - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25); /* Set bit 25:24 of display controller */ - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT); - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT); + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT); - /* Set bit 14 of display controller */ - dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLOCK_PHASE, ACTIVE_LOW); + /* Set bit 14 of display controller */ + dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLOCK_PHASE, ACTIVE_LOW); - POKE32(CRT_DISPLAY_CTRL, dispControl); + POKE32(CRT_DISPLAY_CTRL, dispControl); return dispControl; } @@ -75,130 +75,127 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, /* only timing related registers will be programed */ -static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll) +static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) { int ret = 0; int cnt = 0; - unsigned int ulTmpValue,ulReg; - if(pll->clockType == SECONDARY_PLL) - { + unsigned int ulTmpValue, ulReg; + + if (pll->clockType == SECONDARY_PLL) { /* programe secondary pixel clock */ - POKE32(CRT_PLL_CTRL,formatPllReg(pll)); - POKE32(CRT_HORIZONTAL_TOTAL, - FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) - | FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1)); + POKE32(CRT_PLL_CTRL, formatPllReg(pll)); + POKE32(CRT_HORIZONTAL_TOTAL, + FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) + | FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1)); - POKE32(CRT_HORIZONTAL_SYNC, - FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width) - | FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1)); + POKE32(CRT_HORIZONTAL_SYNC, + FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width) + | FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1)); - POKE32(CRT_VERTICAL_TOTAL, - FIELD_VALUE(0, CRT_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1) - | FIELD_VALUE(0, CRT_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1)); + POKE32(CRT_VERTICAL_TOTAL, + FIELD_VALUE(0, CRT_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1) + | FIELD_VALUE(0, CRT_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1)); - POKE32(CRT_VERTICAL_SYNC, - FIELD_VALUE(0, CRT_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height) - | FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); + POKE32(CRT_VERTICAL_SYNC, + FIELD_VALUE(0, CRT_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height) + | FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); - ulTmpValue = FIELD_VALUE(0,CRT_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)| - FIELD_VALUE(0,CRT_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)| - FIELD_SET(0,CRT_DISPLAY_CTRL,TIMING,ENABLE)| - FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE); + ulTmpValue = FIELD_VALUE(0, CRT_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)| + FIELD_VALUE(0, CRT_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)| + FIELD_SET(0, CRT_DISPLAY_CTRL, TIMING, ENABLE)| + FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE); - if(getChipType() == SM750LE){ - displayControlAdjust_SM750LE(pModeParam,ulTmpValue); - }else{ + if (getChipType() == SM750LE) { + displayControlAdjust_SM750LE(pModeParam, ulTmpValue); + } else { ulReg = PEEK32(CRT_DISPLAY_CTRL) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,TIMING) - & FIELD_CLEAR(CRT_DISPLAY_CTRL,PLANE); + & FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, TIMING) + & FIELD_CLEAR(CRT_DISPLAY_CTRL, PLANE); - POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg); + POKE32(CRT_DISPLAY_CTRL, ulTmpValue|ulReg); } - } - else if(pll->clockType == PRIMARY_PLL) - { + } else if (pll->clockType == PRIMARY_PLL) { unsigned int ulReservedBits; - POKE32(PANEL_PLL_CTRL,formatPllReg(pll)); - POKE32(PANEL_HORIZONTAL_TOTAL, - FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) - | FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1)); + POKE32(PANEL_PLL_CTRL, formatPllReg(pll)); + + POKE32(PANEL_HORIZONTAL_TOTAL, + FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1) + | FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1)); - POKE32(PANEL_HORIZONTAL_SYNC, - FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width) - | FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1)); + POKE32(PANEL_HORIZONTAL_SYNC, + FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width) + | FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1)); - POKE32(PANEL_VERTICAL_TOTAL, - FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1) - | FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1)); + POKE32(PANEL_VERTICAL_TOTAL, + FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1) + | FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1)); - POKE32(PANEL_VERTICAL_SYNC, - FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height) - | FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); + POKE32(PANEL_VERTICAL_SYNC, + FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height) + | FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1)); - ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)| - FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)| - FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE); + ulTmpValue = FIELD_VALUE(0, PANEL_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)| + FIELD_VALUE(0, PANEL_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)| + FIELD_VALUE(0, PANEL_DISPLAY_CTRL, CLOCK_PHASE, pModeParam->clock_phase_polarity)| + FIELD_SET(0, PANEL_DISPLAY_CTRL, TIMING, ENABLE)| + FIELD_SET(0, PANEL_DISPLAY_CTRL, PLANE, ENABLE); - ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | - FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | - FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)| - FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW); + ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) | + FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) | + FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)| + FIELD_SET(0, PANEL_DISPLAY_CTRL, VSYNC, ACTIVE_LOW); - ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) - & FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE) - & FIELD_CLEAR(PANEL_DISPLAY_CTRL, VSYNC_PHASE) - & FIELD_CLEAR(PANEL_DISPLAY_CTRL, HSYNC_PHASE) - & FIELD_CLEAR(PANEL_DISPLAY_CTRL, TIMING) - & FIELD_CLEAR(PANEL_DISPLAY_CTRL, PLANE); + ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) + & FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE) + & FIELD_CLEAR(PANEL_DISPLAY_CTRL, VSYNC_PHASE) + & FIELD_CLEAR(PANEL_DISPLAY_CTRL, HSYNC_PHASE) + & FIELD_CLEAR(PANEL_DISPLAY_CTRL, TIMING) + & FIELD_CLEAR(PANEL_DISPLAY_CTRL, PLANE); /* May a hardware bug or just my test chip (not confirmed). * PANEL_DISPLAY_CTRL register seems requiring few writes - * before a value can be succesfully written in. + * before a value can be successfully written in. * Added some masks to mask out the reserved bits. * Note: This problem happens by design. The hardware will wait for the * next vertical sync to turn on/off the plane. */ - POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg); -#if 1 - while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) - { + POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg); + + while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) { cnt++; - if(cnt > 1000) + if (cnt > 1000) break; - POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg); + POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg); } -#endif - } - else{ + } else { ret = -1; } return ret; } -int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock) +int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) { pll_value_t pll; unsigned int uiActualPixelClk; + pll.inputFreq = DEFAULT_INPUT_CLOCK; pll.clockType = clock; - uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll); - if(getChipType() == SM750LE){ + uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); + if (getChipType() == SM750LE) { /* set graphic mode via IO method */ - outb_p(0x88,0x3d4); - outb_p(0x06,0x3d5); + outb_p(0x88, 0x3d4); + outb_p(0x06, 0x3d5); } - programModeRegisters(parm,&pll); + programModeRegisters(parm, &pll); return 0; } diff --git a/kernel/drivers/staging/sm750fb/ddk750_mode.h b/kernel/drivers/staging/sm750fb/ddk750_mode.h index 6f8df96a8..e846dc2c3 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_mode.h +++ b/kernel/drivers/staging/sm750fb/ddk750_mode.h @@ -3,41 +3,39 @@ #include "ddk750_chip.h" -typedef enum _spolarity_t -{ - POS = 0, /* positive */ - NEG, /* negative */ +typedef enum _spolarity_t { + POS = 0, /* positive */ + NEG, /* negative */ } spolarity_t; -typedef struct _mode_parameter_t -{ - /* Horizontal timing. */ - unsigned long horizontal_total; - unsigned long horizontal_display_end; - unsigned long horizontal_sync_start; - unsigned long horizontal_sync_width; - spolarity_t horizontal_sync_polarity; - - /* Vertical timing. */ - unsigned long vertical_total; - unsigned long vertical_display_end; - unsigned long vertical_sync_start; - unsigned long vertical_sync_height; - spolarity_t vertical_sync_polarity; - - /* Refresh timing. */ - unsigned long pixel_clock; - unsigned long horizontal_frequency; - unsigned long vertical_frequency; - - /* Clock Phase. This clock phase only applies to Panel. */ - spolarity_t clock_phase_polarity; +typedef struct _mode_parameter_t { + /* Horizontal timing. */ + unsigned long horizontal_total; + unsigned long horizontal_display_end; + unsigned long horizontal_sync_start; + unsigned long horizontal_sync_width; + spolarity_t horizontal_sync_polarity; + + /* Vertical timing. */ + unsigned long vertical_total; + unsigned long vertical_display_end; + unsigned long vertical_sync_start; + unsigned long vertical_sync_height; + spolarity_t vertical_sync_polarity; + + /* Refresh timing. */ + unsigned long pixel_clock; + unsigned long horizontal_frequency; + unsigned long vertical_frequency; + + /* Clock Phase. This clock phase only applies to Panel. */ + spolarity_t clock_phase_polarity; } mode_parameter_t; -int ddk750_setModeTiming(mode_parameter_t *,clock_type_t); +int ddk750_setModeTiming(mode_parameter_t *, clock_type_t); #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_power.c b/kernel/drivers/staging/sm750fb/ddk750_power.c index cbb97676b..667e4f822 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_power.c +++ b/kernel/drivers/staging/sm750fb/ddk750_power.c @@ -5,21 +5,23 @@ void ddk750_setDPMS(DPMS_t state) { unsigned int value; - if(getChipType() == SM750LE){ + + if (getChipType() == SM750LE) { value = PEEK32(CRT_DISPLAY_CTRL); - POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(value,CRT_DISPLAY_CTRL,DPMS,state)); - }else{ + POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, + DPMS, state)); + } else { value = PEEK32(SYSTEM_CTRL); - value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state); + value = FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state); POKE32(SYSTEM_CTRL, value); } } -unsigned int getPowerMode(void) +static unsigned int getPowerMode(void) { - if(getChipType() == SM750LE) + if (getChipType() == SM750LE) return 0; - return (FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE)); + return FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE); } @@ -29,160 +31,109 @@ unsigned int getPowerMode(void) */ void setPowerMode(unsigned int powerMode) { - unsigned int control_value = 0; + unsigned int control_value = 0; - control_value = PEEK32(POWER_MODE_CTRL); + control_value = PEEK32(POWER_MODE_CTRL); - if(getChipType() == SM750LE) + if (getChipType() == SM750LE) return; - switch (powerMode) - { - case POWER_MODE_CTRL_MODE_MODE0: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE0); - break; + switch (powerMode) { + case POWER_MODE_CTRL_MODE_MODE0: + control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, + MODE0); + break; - case POWER_MODE_CTRL_MODE_MODE1: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE1); - break; + case POWER_MODE_CTRL_MODE_MODE1: + control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, + MODE1); + break; - case POWER_MODE_CTRL_MODE_SLEEP: - control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, SLEEP); - break; + case POWER_MODE_CTRL_MODE_SLEEP: + control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, + SLEEP); + break; - default: - break; - } + default: + break; + } - /* Set up other fields in Power Control Register */ - if (powerMode == POWER_MODE_CTRL_MODE_SLEEP) - { - control_value = + /* Set up other fields in Power Control Register */ + if (powerMode == POWER_MODE_CTRL_MODE_SLEEP) { + control_value = #ifdef VALIDATION_CHIP - FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, OFF) | + FIELD_SET(control_value, POWER_MODE_CTRL, 336CLK, OFF) | #endif - FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, OFF); - } - else - { - control_value = + FIELD_SET(control_value, POWER_MODE_CTRL, OSC_INPUT, OFF); + } else { + control_value = #ifdef VALIDATION_CHIP - FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, ON) | + FIELD_SET(control_value, POWER_MODE_CTRL, 336CLK, ON) | #endif - FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, ON); - } + FIELD_SET(control_value, POWER_MODE_CTRL, OSC_INPUT, ON); + } - /* Program new power mode. */ - POKE32(POWER_MODE_CTRL, control_value); + /* Program new power mode. */ + POKE32(POWER_MODE_CTRL, control_value); } void setCurrentGate(unsigned int gate) { - unsigned int gate_reg; - unsigned int mode; - - /* Get current power mode. */ - mode = getPowerMode(); - - switch (mode) - { - case POWER_MODE_CTRL_MODE_MODE0: - gate_reg = MODE0_GATE; - break; - - case POWER_MODE_CTRL_MODE_MODE1: - gate_reg = MODE1_GATE; - break; - - default: - gate_reg = MODE0_GATE; - break; - } - POKE32(gate_reg, gate); -} + unsigned int gate_reg; + unsigned int mode; + /* Get current power mode. */ + mode = getPowerMode(); + switch (mode) { + case POWER_MODE_CTRL_MODE_MODE0: + gate_reg = MODE0_GATE; + break; -/* - * This function enable/disable the 2D engine. - */ -void enable2DEngine(unsigned int enable) -{ - uint32_t gate; - - gate = PEEK32(CURRENT_GATE); - if (enable) - { - gate = FIELD_SET(gate, CURRENT_GATE, DE, ON); - gate = FIELD_SET(gate, CURRENT_GATE, CSC, ON); - } - else - { - gate = FIELD_SET(gate, CURRENT_GATE, DE, OFF); - gate = FIELD_SET(gate, CURRENT_GATE, CSC, OFF); - } - - setCurrentGate(gate); + case POWER_MODE_CTRL_MODE_MODE1: + gate_reg = MODE1_GATE; + break; + + default: + gate_reg = MODE0_GATE; + break; + } + POKE32(gate_reg, gate); } + /* - * This function enable/disable the ZV Port. + * This function enable/disable the 2D engine. */ -void enableZVPort(unsigned int enable) -{ - uint32_t gate; - - /* Enable ZV Port Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - { - gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, ON); -#if 1 - /* Using Software I2C */ - gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON); -#else - /* Using Hardware I2C */ - gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON); -#endif - } - else - { - /* Disable ZV Port Gate. There is no way to know whether the GPIO pins are being used - or not. Therefore, do not disable the GPIO gate. */ - gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, OFF); - } - - setCurrentGate(gate); -} - - -void enableSSP(unsigned int enable) +void enable2DEngine(unsigned int enable) { - uint32_t gate; - - /* Enable SSP Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - gate = FIELD_SET(gate, CURRENT_GATE, SSP, ON); - else - gate = FIELD_SET(gate, CURRENT_GATE, SSP, OFF); + u32 gate; + + gate = PEEK32(CURRENT_GATE); + if (enable) { + gate = FIELD_SET(gate, CURRENT_GATE, DE, ON); + gate = FIELD_SET(gate, CURRENT_GATE, CSC, ON); + } else { + gate = FIELD_SET(gate, CURRENT_GATE, DE, OFF); + gate = FIELD_SET(gate, CURRENT_GATE, CSC, OFF); + } - setCurrentGate(gate); + setCurrentGate(gate); } void enableDMA(unsigned int enable) { - uint32_t gate; + u32 gate; - /* Enable DMA Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - gate = FIELD_SET(gate, CURRENT_GATE, DMA, ON); - else - gate = FIELD_SET(gate, CURRENT_GATE, DMA, OFF); + /* Enable DMA Gate */ + gate = PEEK32(CURRENT_GATE); + if (enable) + gate = FIELD_SET(gate, CURRENT_GATE, DMA, ON); + else + gate = FIELD_SET(gate, CURRENT_GATE, DMA, OFF); - setCurrentGate(gate); + setCurrentGate(gate); } /* @@ -190,33 +141,16 @@ void enableDMA(unsigned int enable) */ void enableGPIO(unsigned int enable) { - uint32_t gate; - - /* Enable GPIO Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON); - else - gate = FIELD_SET(gate, CURRENT_GATE, GPIO, OFF); - - setCurrentGate(gate); -} - -/* - * This function enable/disable the PWM Engine - */ -void enablePWM(unsigned int enable) -{ - uint32_t gate; + u32 gate; - /* Enable PWM Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - gate = FIELD_SET(gate, CURRENT_GATE, PWM, ON); - else - gate = FIELD_SET(gate, CURRENT_GATE, PWM, OFF); + /* Enable GPIO Gate */ + gate = PEEK32(CURRENT_GATE); + if (enable) + gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON); + else + gate = FIELD_SET(gate, CURRENT_GATE, GPIO, OFF); - setCurrentGate(gate); + setCurrentGate(gate); } /* @@ -224,16 +158,16 @@ void enablePWM(unsigned int enable) */ void enableI2C(unsigned int enable) { - uint32_t gate; + u32 gate; - /* Enable I2C Gate */ - gate = PEEK32(CURRENT_GATE); - if (enable) - gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON); - else - gate = FIELD_SET(gate, CURRENT_GATE, I2C, OFF); + /* Enable I2C Gate */ + gate = PEEK32(CURRENT_GATE); + if (enable) + gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON); + else + gate = FIELD_SET(gate, CURRENT_GATE, I2C, OFF); - setCurrentGate(gate); + setCurrentGate(gate); } diff --git a/kernel/drivers/staging/sm750fb/ddk750_power.h b/kernel/drivers/staging/sm750fb/ddk750_power.h index 71dc7f980..6e804d990 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_power.h +++ b/kernel/drivers/staging/sm750fb/ddk750_power.h @@ -1,18 +1,17 @@ #ifndef DDK750_POWER_H__ #define DDK750_POWER_H__ -typedef enum _DPMS_t -{ - crtDPMS_ON = 0x0, - crtDPMS_STANDBY = 0x1, - crtDPMS_SUSPEND = 0x2, - crtDPMS_OFF = 0x3, +typedef enum _DPMS_t { + crtDPMS_ON = 0x0, + crtDPMS_STANDBY = 0x1, + crtDPMS_SUSPEND = 0x2, + crtDPMS_OFF = 0x3, } DPMS_t; #define setDAC(off) \ { \ - POKE32(MISC_CTRL,FIELD_VALUE(PEEK32(MISC_CTRL), \ + POKE32(MISC_CTRL, FIELD_VALUE(PEEK32(MISC_CTRL), \ MISC_CTRL, \ DAC_POWER, \ off)); \ @@ -20,8 +19,6 @@ DPMS_t; void ddk750_setDPMS(DPMS_t); -unsigned int getPowerMode(void); - /* * This function sets the current power mode */ @@ -38,11 +35,6 @@ void setCurrentGate(unsigned int gate); void enable2DEngine(unsigned int enable); /* - * This function enable/disable the ZV Port - */ -void enableZVPort(unsigned int enable); - -/* * This function enable/disable the DMA Engine */ void enableDMA(unsigned int enable); @@ -53,19 +45,9 @@ void enableDMA(unsigned int enable); void enableGPIO(unsigned int enable); /* - * This function enable/disable the PWM Engine - */ -void enablePWM(unsigned int enable); - -/* * This function enable/disable the I2C Engine */ void enableI2C(unsigned int enable); -/* - * This function enable/disable the SSP. - */ -void enableSSP(unsigned int enable); - #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_reg.h b/kernel/drivers/staging/sm750fb/ddk750_reg.h index 2016f97d2..16a01c254 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_reg.h +++ b/kernel/drivers/staging/sm750fb/ddk750_reg.h @@ -1640,9 +1640,9 @@ /* CRT Graphics Control */ #define CRT_DISPLAY_CTRL 0x080200 -#define CRT_DISPLAY_CTRL_RESERVED_1_MASK 31:27 -#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0 -#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 0x1F +#define CRT_DISPLAY_CTRL_RESERVED_1_MASK 31:27 +#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0 +#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 0x1F /* SM750LE definition */ #define CRT_DISPLAY_CTRL_DPMS 31:30 @@ -1664,9 +1664,9 @@ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0 -#define CRT_DISPLAY_CTRL_RESERVED_2_MASK 25:24 -#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 3 -#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0 +#define CRT_DISPLAY_CTRL_RESERVED_2_MASK 25:24 +#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 3 +#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0 /* SM750LE definition */ #define CRT_DISPLAY_CTRL_CRTSELECT 25:25 @@ -1677,11 +1677,11 @@ #define CRT_DISPLAY_CTRL_RGBBIT_12BIT 1 -#define CRT_DISPLAY_CTRL_RESERVED_3_MASK 15:15 +#define CRT_DISPLAY_CTRL_RESERVED_3_MASK 15:15 #define CRT_DISPLAY_CTRL_RESERVED_3_MASK_DISABLE 0 #define CRT_DISPLAY_CTRL_RESERVED_3_MASK_ENABLE 1 -#define CRT_DISPLAY_CTRL_RESERVED_4_MASK 9:9 +#define CRT_DISPLAY_CTRL_RESERVED_4_MASK 9:9 #define CRT_DISPLAY_CTRL_RESERVED_4_MASK_DISABLE 0 #define CRT_DISPLAY_CTRL_RESERVED_4_MASK_ENABLE 1 @@ -1836,23 +1836,6 @@ #define CRT_HWC_COLOR_3 0x08023C #define CRT_HWC_COLOR_3_RGB565 15:0 -/* Old Definitions +++. Need to be removed if no application use it. */ -#if 0 - #define CRT_HWC_COLOR_01 0x080238 - #define CRT_HWC_COLOR_01_1_RED 31:27 - #define CRT_HWC_COLOR_01_1_GREEN 26:21 - #define CRT_HWC_COLOR_01_1_BLUE 20:16 - #define CRT_HWC_COLOR_01_0_RED 15:11 - #define CRT_HWC_COLOR_01_0_GREEN 10:5 - #define CRT_HWC_COLOR_01_0_BLUE 4:0 - - #define CRT_HWC_COLOR_2 0x08023C - #define CRT_HWC_COLOR_2_RED 15:11 - #define CRT_HWC_COLOR_2_GREEN 10:5 - #define CRT_HWC_COLOR_2_BLUE 4:0 -#endif -/* Old Definitions --- */ - /* This vertical expansion below start at 0x080240 ~ 0x080264 */ #define CRT_VERTICAL_EXPANSION 0x080240 #ifndef VALIDATION_CHIP @@ -1882,242 +1865,15 @@ #endif /* sm750le new register to control panel output */ -#define DISPLAY_CONTROL_750LE 0x80288 +#define DISPLAY_CONTROL_750LE 0x80288 /* Palette RAM */ -/* Panel Pallete register starts at 0x080400 ~ 0x0807FC */ +/* Panel Palette register starts at 0x080400 ~ 0x0807FC */ #define PANEL_PALETTE_RAM 0x080400 -/* Panel Pallete register starts at 0x080C00 ~ 0x080FFC */ +/* Panel Palette register starts at 0x080C00 ~ 0x080FFC */ #define CRT_PALETTE_RAM 0x080C00 -/* 2D registers - * move their defination into general lynx_accel.h file - * because all smi graphic chip share the same drawing engine - * register format */ -#if 0 -#define DE_SOURCE 0x100000 -#define DE_SOURCE_WRAP 31:31 -#define DE_SOURCE_WRAP_DISABLE 0 -#define DE_SOURCE_WRAP_ENABLE 1 - -/* - * The following definitions are used in different setting - */ - -/* Use these definitions in XY addressing mode or linear addressing mode. */ -#define DE_SOURCE_X_K1 27:16 -#define DE_SOURCE_Y_K2 11:0 - -/* Use this definition in host write mode for mono. The Y_K2 is not used - in host write mode. */ -#define DE_SOURCE_X_K1_MONO 20:16 - -/* Use these definitions in Bresenham line drawing mode. */ -#define DE_SOURCE_X_K1_LINE 29:16 -#define DE_SOURCE_Y_K2_LINE 13:0 - -#define DE_DESTINATION 0x100004 -#define DE_DESTINATION_WRAP 31:31 -#define DE_DESTINATION_WRAP_DISABLE 0 -#define DE_DESTINATION_WRAP_ENABLE 1 -#if 1 - #define DE_DESTINATION_X 27:16 - #define DE_DESTINATION_Y 11:0 -#else - #define DE_DESTINATION_X 28:16 - #define DE_DESTINATION_Y 15:0 -#endif - -#define DE_DIMENSION 0x100008 -#define DE_DIMENSION_X 28:16 -#define DE_DIMENSION_Y_ET 15:0 - -#define DE_CONTROL 0x10000C -#define DE_CONTROL_STATUS 31:31 -#define DE_CONTROL_STATUS_STOP 0 -#define DE_CONTROL_STATUS_START 1 -#define DE_CONTROL_PATTERN 30:30 -#define DE_CONTROL_PATTERN_MONO 0 -#define DE_CONTROL_PATTERN_COLOR 1 -#define DE_CONTROL_UPDATE_DESTINATION_X 29:29 -#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0 -#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1 -#define DE_CONTROL_QUICK_START 28:28 -#define DE_CONTROL_QUICK_START_DISABLE 0 -#define DE_CONTROL_QUICK_START_ENABLE 1 -#define DE_CONTROL_DIRECTION 27:27 -#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0 -#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1 -#define DE_CONTROL_MAJOR 26:26 -#define DE_CONTROL_MAJOR_X 0 -#define DE_CONTROL_MAJOR_Y 1 -#define DE_CONTROL_STEP_X 25:25 -#define DE_CONTROL_STEP_X_POSITIVE 0 -#define DE_CONTROL_STEP_X_NEGATIVE 1 -#define DE_CONTROL_STEP_Y 24:24 -#define DE_CONTROL_STEP_Y_POSITIVE 0 -#define DE_CONTROL_STEP_Y_NEGATIVE 1 -#define DE_CONTROL_STRETCH 23:23 -#define DE_CONTROL_STRETCH_DISABLE 0 -#define DE_CONTROL_STRETCH_ENABLE 1 -#define DE_CONTROL_HOST 22:22 -#define DE_CONTROL_HOST_COLOR 0 -#define DE_CONTROL_HOST_MONO 1 -#define DE_CONTROL_LAST_PIXEL 21:21 -#define DE_CONTROL_LAST_PIXEL_OFF 0 -#define DE_CONTROL_LAST_PIXEL_ON 1 -#define DE_CONTROL_COMMAND 20:16 -#define DE_CONTROL_COMMAND_BITBLT 0 -#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1 -#define DE_CONTROL_COMMAND_DE_TILE 2 -#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3 -#define DE_CONTROL_COMMAND_ALPHA_BLEND 4 -#define DE_CONTROL_COMMAND_RLE_STRIP 5 -#define DE_CONTROL_COMMAND_SHORT_STROKE 6 -#define DE_CONTROL_COMMAND_LINE_DRAW 7 -#define DE_CONTROL_COMMAND_HOST_WRITE 8 -#define DE_CONTROL_COMMAND_HOST_READ 9 -#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10 -#define DE_CONTROL_COMMAND_ROTATE 11 -#define DE_CONTROL_COMMAND_FONT 12 -#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15 -#define DE_CONTROL_ROP_SELECT 15:15 -#define DE_CONTROL_ROP_SELECT_ROP3 0 -#define DE_CONTROL_ROP_SELECT_ROP2 1 -#define DE_CONTROL_ROP2_SOURCE 14:14 -#define DE_CONTROL_ROP2_SOURCE_BITMAP 0 -#define DE_CONTROL_ROP2_SOURCE_PATTERN 1 -#define DE_CONTROL_MONO_DATA 13:12 -#define DE_CONTROL_MONO_DATA_NOT_PACKED 0 -#define DE_CONTROL_MONO_DATA_8_PACKED 1 -#define DE_CONTROL_MONO_DATA_16_PACKED 2 -#define DE_CONTROL_MONO_DATA_32_PACKED 3 -#define DE_CONTROL_REPEAT_ROTATE 11:11 -#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0 -#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1 -#define DE_CONTROL_TRANSPARENCY_MATCH 10:10 -#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0 -#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1 -#define DE_CONTROL_TRANSPARENCY_SELECT 9:9 -#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0 -#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1 -#define DE_CONTROL_TRANSPARENCY 8:8 -#define DE_CONTROL_TRANSPARENCY_DISABLE 0 -#define DE_CONTROL_TRANSPARENCY_ENABLE 1 -#define DE_CONTROL_ROP 7:0 - -/* Pseudo fields. */ - -#define DE_CONTROL_SHORT_STROKE_DIR 27:24 -#define DE_CONTROL_SHORT_STROKE_DIR_225 0 -#define DE_CONTROL_SHORT_STROKE_DIR_135 1 -#define DE_CONTROL_SHORT_STROKE_DIR_315 2 -#define DE_CONTROL_SHORT_STROKE_DIR_45 3 -#define DE_CONTROL_SHORT_STROKE_DIR_270 4 -#define DE_CONTROL_SHORT_STROKE_DIR_90 5 -#define DE_CONTROL_SHORT_STROKE_DIR_180 8 -#define DE_CONTROL_SHORT_STROKE_DIR_0 10 -#define DE_CONTROL_ROTATION 25:24 -#define DE_CONTROL_ROTATION_0 0 -#define DE_CONTROL_ROTATION_270 1 -#define DE_CONTROL_ROTATION_90 2 -#define DE_CONTROL_ROTATION_180 3 - -#define DE_PITCH 0x100010 -#define DE_PITCH_DESTINATION 28:16 -#define DE_PITCH_SOURCE 12:0 - -#define DE_FOREGROUND 0x100014 -#define DE_FOREGROUND_COLOR 31:0 - -#define DE_BACKGROUND 0x100018 -#define DE_BACKGROUND_COLOR 31:0 - -#define DE_STRETCH_FORMAT 0x10001C -#define DE_STRETCH_FORMAT_PATTERN_XY 30:30 -#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0 -#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1 -#define DE_STRETCH_FORMAT_PATTERN_Y 29:27 -#define DE_STRETCH_FORMAT_PATTERN_X 25:23 -#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20 -#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0 -#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1 -#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2 -#define DE_STRETCH_FORMAT_ADDRESSING 19:16 -#define DE_STRETCH_FORMAT_ADDRESSING_XY 0 -#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15 -#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0 - -#define DE_COLOR_COMPARE 0x100020 -#define DE_COLOR_COMPARE_COLOR 23:0 - -#define DE_COLOR_COMPARE_MASK 0x100024 -#define DE_COLOR_COMPARE_MASK_MASKS 23:0 - -#define DE_MASKS 0x100028 -#define DE_MASKS_BYTE_MASK 31:16 -#define DE_MASKS_BIT_MASK 15:0 - -#define DE_CLIP_TL 0x10002C -#define DE_CLIP_TL_TOP 31:16 -#define DE_CLIP_TL_STATUS 13:13 -#define DE_CLIP_TL_STATUS_DISABLE 0 -#define DE_CLIP_TL_STATUS_ENABLE 1 -#define DE_CLIP_TL_INHIBIT 12:12 -#define DE_CLIP_TL_INHIBIT_OUTSIDE 0 -#define DE_CLIP_TL_INHIBIT_INSIDE 1 -#define DE_CLIP_TL_LEFT 11:0 - -#define DE_CLIP_BR 0x100030 -#define DE_CLIP_BR_BOTTOM 31:16 -#define DE_CLIP_BR_RIGHT 12:0 - -#define DE_MONO_PATTERN_LOW 0x100034 -#define DE_MONO_PATTERN_LOW_PATTERN 31:0 - -#define DE_MONO_PATTERN_HIGH 0x100038 -#define DE_MONO_PATTERN_HIGH_PATTERN 31:0 - -#define DE_WINDOW_WIDTH 0x10003C -#define DE_WINDOW_WIDTH_DESTINATION 28:16 -#define DE_WINDOW_WIDTH_SOURCE 12:0 - -#define DE_WINDOW_SOURCE_BASE 0x100040 -#define DE_WINDOW_SOURCE_BASE_EXT 27:27 -#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0 -#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1 -#define DE_WINDOW_SOURCE_BASE_CS 26:26 -#define DE_WINDOW_SOURCE_BASE_CS_0 0 -#define DE_WINDOW_SOURCE_BASE_CS_1 1 -#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0 - -#define DE_WINDOW_DESTINATION_BASE 0x100044 -#define DE_WINDOW_DESTINATION_BASE_EXT 27:27 -#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0 -#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1 -#define DE_WINDOW_DESTINATION_BASE_CS 26:26 -#define DE_WINDOW_DESTINATION_BASE_CS_0 0 -#define DE_WINDOW_DESTINATION_BASE_CS_1 1 -#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0 - -#define DE_ALPHA 0x100048 -#define DE_ALPHA_VALUE 7:0 - -#define DE_WRAP 0x10004C -#define DE_WRAP_X 31:16 -#define DE_WRAP_Y 15:0 - -#define DE_STATUS 0x100050 -#define DE_STATUS_CSC 1:1 -#define DE_STATUS_CSC_CLEAR 0 -#define DE_STATUS_CSC_NOT_ACTIVE 0 -#define DE_STATUS_CSC_ACTIVE 1 -#define DE_STATUS_2D 0:0 -#define DE_STATUS_2D_CLEAR 0 -#define DE_STATUS_2D_NOT_ACTIVE 0 -#define DE_STATUS_2D_ACTIVE 1 -#endif /* Color Space Conversion registers. */ #define CSC_Y_SOURCE_BASE 0x1000C8 diff --git a/kernel/drivers/staging/sm750fb/ddk750_sii164.c b/kernel/drivers/staging/sm750fb/ddk750_sii164.c index 3d224d6a7..241b77b92 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_sii164.c +++ b/kernel/drivers/staging/sm750fb/ddk750_sii164.c @@ -11,8 +11,8 @@ #define USE_HW_I2C #ifdef USE_HW_I2C - #define i2cWriteReg hwI2CWriteReg - #define i2cReadReg hwI2CReadReg + #define i2cWriteReg sm750_hw_i2c_write_reg + #define i2cReadReg sm750_hw_i2c_read_reg #else #define i2cWriteReg swI2CWriteReg #define i2cReadReg swI2CReadReg @@ -36,12 +36,12 @@ static char *gDviCtrlChipName = "Silicon Image SiI 164"; */ unsigned short sii164GetVendorID(void) { - unsigned short vendorID; + unsigned short vendorID; - vendorID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) | - (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW); + vendorID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) | + (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW); - return vendorID; + return vendorID; } /* @@ -53,12 +53,12 @@ unsigned short sii164GetVendorID(void) */ unsigned short sii164GetDeviceID(void) { - unsigned short deviceID; + unsigned short deviceID; - deviceID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) | - (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW); + deviceID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) | + (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW); - return deviceID; + return deviceID; } @@ -113,150 +113,137 @@ unsigned short sii164GetDeviceID(void) * -1 - Fail. */ long sii164InitChip( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue ) { - //unsigned char ucRegIndex, ucRegValue; - //unsigned char ucDeviceAddress, unsigned char config; - //unsigned long delayCount; - /* Initialize the i2c bus */ + /* Initialize the i2c bus */ #ifdef USE_HW_I2C - /* Use fast mode. */ - hwI2CInit(1); + /* Use fast mode. */ + sm750_hw_i2c_init(1); #else - swI2CInit(DEFAULT_I2C_SCL, DEFAULT_I2C_SDA); + sm750_sw_i2c_init(DEFAULT_I2C_SCL, DEFAULT_I2C_SDA); #endif - /* Check if SII164 Chip exists */ - if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID)) - { - -#ifdef DDKDEBUG - //sii164PrintRegisterValues(); -#endif - /* - * Initialize SII164 controller chip. - */ - - /* Select the edge */ - if (edgeSelect == 0) - config = SII164_CONFIGURATION_LATCH_FALLING; - else - config = SII164_CONFIGURATION_LATCH_RISING; - - /* Select bus wide */ - if (busSelect == 0) - config |= SII164_CONFIGURATION_BUS_12BITS; - else - config |= SII164_CONFIGURATION_BUS_24BITS; - - /* Select Dual/Single Edge Clock */ - if (dualEdgeClkSelect == 0) - config |= SII164_CONFIGURATION_CLOCK_SINGLE; - else - config |= SII164_CONFIGURATION_CLOCK_DUAL; - - /* Select HSync Enable */ - if (hsyncEnable == 0) - config |= SII164_CONFIGURATION_HSYNC_FORCE_LOW; - else - config |= SII164_CONFIGURATION_HSYNC_AS_IS; - - /* Select VSync Enable */ - if (vsyncEnable == 0) - config |= SII164_CONFIGURATION_VSYNC_FORCE_LOW; - else - config |= SII164_CONFIGURATION_VSYNC_AS_IS; - - i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); - - /* De-skew enabled with default 111b value. - This will fix some artifacts problem in some mode on board 2.2. - Somehow this fix does not affect board 2.1. - */ - if (deskewEnable == 0) - config = SII164_DESKEW_DISABLE; - else - config = SII164_DESKEW_ENABLE; - - switch (deskewSetting) - { - case 0: - config |= SII164_DESKEW_1_STEP; - break; - case 1: - config |= SII164_DESKEW_2_STEP; - break; - case 2: - config |= SII164_DESKEW_3_STEP; - break; - case 3: - config |= SII164_DESKEW_4_STEP; - break; - case 4: - config |= SII164_DESKEW_5_STEP; - break; - case 5: - config |= SII164_DESKEW_6_STEP; - break; - case 6: - config |= SII164_DESKEW_7_STEP; - break; - case 7: - config |= SII164_DESKEW_8_STEP; - break; - } - i2cWriteReg(SII164_I2C_ADDRESS, SII164_DESKEW, config); - - /* Enable/Disable Continuous Sync. */ - if (continuousSyncEnable == 0) - config = SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE; - else - config = SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE; - - /* Enable/Disable PLL Filter */ - if (pllFilterEnable == 0) - config |= SII164_PLL_FILTER_DISABLE; - else - config |= SII164_PLL_FILTER_ENABLE; - - /* Set the PLL Filter value */ - config |= ((pllFilterValue & 0x07) << 1); - - i2cWriteReg(SII164_I2C_ADDRESS, SII164_PLL, config); - - /* Recover from Power Down and enable output. */ - config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION); - config |= SII164_CONFIGURATION_POWER_NORMAL; - i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); - -#ifdef DDKDEBUG - //sii164PrintRegisterValues(); -#endif - - return 0; - } - - /* Return -1 if initialization fails. */ - return (-1); + /* Check if SII164 Chip exists */ + if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID)) { + /* + * Initialize SII164 controller chip. + */ + + /* Select the edge */ + if (edgeSelect == 0) + config = SII164_CONFIGURATION_LATCH_FALLING; + else + config = SII164_CONFIGURATION_LATCH_RISING; + + /* Select bus wide */ + if (busSelect == 0) + config |= SII164_CONFIGURATION_BUS_12BITS; + else + config |= SII164_CONFIGURATION_BUS_24BITS; + + /* Select Dual/Single Edge Clock */ + if (dualEdgeClkSelect == 0) + config |= SII164_CONFIGURATION_CLOCK_SINGLE; + else + config |= SII164_CONFIGURATION_CLOCK_DUAL; + + /* Select HSync Enable */ + if (hsyncEnable == 0) + config |= SII164_CONFIGURATION_HSYNC_FORCE_LOW; + else + config |= SII164_CONFIGURATION_HSYNC_AS_IS; + + /* Select VSync Enable */ + if (vsyncEnable == 0) + config |= SII164_CONFIGURATION_VSYNC_FORCE_LOW; + else + config |= SII164_CONFIGURATION_VSYNC_AS_IS; + + i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); + + /* De-skew enabled with default 111b value. + This will fix some artifacts problem in some mode on board 2.2. + Somehow this fix does not affect board 2.1. + */ + if (deskewEnable == 0) + config = SII164_DESKEW_DISABLE; + else + config = SII164_DESKEW_ENABLE; + + switch (deskewSetting) { + case 0: + config |= SII164_DESKEW_1_STEP; + break; + case 1: + config |= SII164_DESKEW_2_STEP; + break; + case 2: + config |= SII164_DESKEW_3_STEP; + break; + case 3: + config |= SII164_DESKEW_4_STEP; + break; + case 4: + config |= SII164_DESKEW_5_STEP; + break; + case 5: + config |= SII164_DESKEW_6_STEP; + break; + case 6: + config |= SII164_DESKEW_7_STEP; + break; + case 7: + config |= SII164_DESKEW_8_STEP; + break; + } + i2cWriteReg(SII164_I2C_ADDRESS, SII164_DESKEW, config); + + /* Enable/Disable Continuous Sync. */ + if (continuousSyncEnable == 0) + config = SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE; + else + config = SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE; + + /* Enable/Disable PLL Filter */ + if (pllFilterEnable == 0) + config |= SII164_PLL_FILTER_DISABLE; + else + config |= SII164_PLL_FILTER_ENABLE; + + /* Set the PLL Filter value */ + config |= ((pllFilterValue & 0x07) << 1); + + i2cWriteReg(SII164_I2C_ADDRESS, SII164_PLL, config); + + /* Recover from Power Down and enable output. */ + config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION); + config |= SII164_CONFIGURATION_POWER_NORMAL; + i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); + + return 0; + } + + /* Return -1 if initialization fails. */ + return (-1); } -/* below sii164 function is not neccessary */ +/* below sii164 function is not necessary */ #ifdef SII164_FULL_FUNCTIONS @@ -266,9 +253,9 @@ long sii164InitChip( */ void sii164ResetChip(void) { - /* Power down */ - sii164SetPower(0); - sii164SetPower(1); + /* Power down */ + sii164SetPower(0); + sii164SetPower(1); } @@ -279,7 +266,7 @@ void sii164ResetChip(void) */ char *sii164GetChipString(void) { - return gDviCtrlChipName; + return gDviCtrlChipName; } @@ -291,26 +278,23 @@ char *sii164GetChipString(void) * powerUp - Flag to set the power down or up */ void sii164SetPower( - unsigned char powerUp + unsigned char powerUp ) { - unsigned char config; - - config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION); - if (powerUp == 1) - { - /* Power up the chip */ - config &= ~SII164_CONFIGURATION_POWER_MASK; - config |= SII164_CONFIGURATION_POWER_NORMAL; - i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); - } - else - { - /* Power down the chip */ - config &= ~SII164_CONFIGURATION_POWER_MASK; - config |= SII164_CONFIGURATION_POWER_DOWN; - i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); - } + unsigned char config; + + config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION); + if (powerUp == 1) { + /* Power up the chip */ + config &= ~SII164_CONFIGURATION_POWER_MASK; + config |= SII164_CONFIGURATION_POWER_NORMAL; + i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); + } else { + /* Power down the chip */ + config &= ~SII164_CONFIGURATION_POWER_MASK; + config |= SII164_CONFIGURATION_POWER_DOWN; + i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config); + } } @@ -319,31 +303,30 @@ void sii164SetPower( * This function selects the mode of the hot plug detection. */ static void sii164SelectHotPlugDetectionMode( - sii164_hot_plug_mode_t hotPlugMode + sii164_hot_plug_mode_t hotPlugMode ) { - unsigned char detectReg; - - detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & ~SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG; - switch (hotPlugMode) - { - case SII164_HOTPLUG_DISABLE: - detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH; - break; - case SII164_HOTPLUG_USE_MDI: - detectReg &= ~SII164_DETECT_INTERRUPT_MASK; - detectReg |= SII164_DETECT_INTERRUPT_BY_HTPLG_PIN; - detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI; - break; - case SII164_HOTPLUG_USE_RSEN: - detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN; - break; - case SII164_HOTPLUG_USE_HTPLG: - detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG; - break; - } - - i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg); + unsigned char detectReg; + + detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & ~SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG; + switch (hotPlugMode) { + case SII164_HOTPLUG_DISABLE: + detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH; + break; + case SII164_HOTPLUG_USE_MDI: + detectReg &= ~SII164_DETECT_INTERRUPT_MASK; + detectReg |= SII164_DETECT_INTERRUPT_BY_HTPLG_PIN; + detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI; + break; + case SII164_HOTPLUG_USE_RSEN: + detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN; + break; + case SII164_HOTPLUG_USE_HTPLG: + detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG; + break; + } + + i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg); } /* @@ -353,18 +336,19 @@ static void sii164SelectHotPlugDetectionMode( * enableHotPlug - Enable (=1) / disable (=0) Hot Plug detection */ void sii164EnableHotPlugDetection( - unsigned char enableHotPlug + unsigned char enableHotPlug ) { - unsigned char detectReg; - detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT); - - /* Depending on each DVI controller, need to enable the hot plug based on each - individual chip design. */ - if (enableHotPlug != 0) - sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI); - else - sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_DISABLE); + unsigned char detectReg; + + detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT); + + /* Depending on each DVI controller, need to enable the hot plug based on each + individual chip design. */ + if (enableHotPlug != 0) + sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI); + else + sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_DISABLE); } /* @@ -377,18 +361,18 @@ void sii164EnableHotPlugDetection( */ unsigned char sii164IsConnected(void) { - unsigned char hotPlugValue; + unsigned char hotPlugValue; - hotPlugValue = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_HOT_PLUG_STATUS_MASK; - if (hotPlugValue == SII164_DETECT_HOT_PLUG_STATUS_ON) - return 1; - else - return 0; + hotPlugValue = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_HOT_PLUG_STATUS_MASK; + if (hotPlugValue == SII164_DETECT_HOT_PLUG_STATUS_ON) + return 1; + else + return 0; } /* * sii164CheckInterrupt - * Checks if interrupt has occured. + * Checks if interrupt has occurred. * * Output: * 0 - No interrupt @@ -396,13 +380,13 @@ unsigned char sii164IsConnected(void) */ unsigned char sii164CheckInterrupt(void) { - unsigned char detectReg; + unsigned char detectReg; - detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_MONITOR_STATE_MASK; - if (detectReg == SII164_DETECT_MONITOR_STATE_CHANGE) - return 1; - else - return 0; + detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_MONITOR_STATE_MASK; + if (detectReg == SII164_DETECT_MONITOR_STATE_CHANGE) + return 1; + else + return 0; } /* @@ -411,11 +395,11 @@ unsigned char sii164CheckInterrupt(void) */ void sii164ClearInterrupt(void) { - unsigned char detectReg; + unsigned char detectReg; - /* Clear the MDI interrupt */ - detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT); - i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg | SII164_DETECT_MONITOR_STATE_CLEAR); + /* Clear the MDI interrupt */ + detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT); + i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg | SII164_DETECT_MONITOR_STATE_CLEAR); } #endif diff --git a/kernel/drivers/staging/sm750fb/ddk750_sii164.h b/kernel/drivers/staging/sm750fb/ddk750_sii164.h index 2b4c7d338..f2610c90e 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_sii164.h +++ b/kernel/drivers/staging/sm750fb/ddk750_sii164.h @@ -4,27 +4,26 @@ #define USE_DVICHIP /* Hot Plug detection mode structure */ -typedef enum _sii164_hot_plug_mode_t -{ - SII164_HOTPLUG_DISABLE = 0, /* Disable Hot Plug output bit (always high). */ - SII164_HOTPLUG_USE_MDI, /* Use Monitor Detect Interrupt bit. */ - SII164_HOTPLUG_USE_RSEN, /* Use Receiver Sense detect bit. */ - SII164_HOTPLUG_USE_HTPLG /* Use Hot Plug detect bit. */ +typedef enum _sii164_hot_plug_mode_t { + SII164_HOTPLUG_DISABLE = 0, /* Disable Hot Plug output bit (always high). */ + SII164_HOTPLUG_USE_MDI, /* Use Monitor Detect Interrupt bit. */ + SII164_HOTPLUG_USE_RSEN, /* Use Receiver Sense detect bit. */ + SII164_HOTPLUG_USE_HTPLG /* Use Hot Plug detect bit. */ } sii164_hot_plug_mode_t; /* Silicon Image SiI164 chip prototype */ long sii164InitChip( - unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue + unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue ); unsigned short sii164GetVendorID(void); diff --git a/kernel/drivers/staging/sm750fb/ddk750_swi2c.c b/kernel/drivers/staging/sm750fb/ddk750_swi2c.c index 901b3737f..8d644a7cb 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_swi2c.c +++ b/kernel/drivers/staging/sm750fb/ddk750_swi2c.c @@ -15,7 +15,6 @@ #include "ddk750_swi2c.h" #include "ddk750_power.h" - /******************************************************************* * I2C Software Master Driver: * =========================== @@ -55,8 +54,8 @@ ******************************************************************/ /* GPIO pins used for this I2C. It ranges from 0 to 63. */ -static unsigned char g_i2cClockGPIO = DEFAULT_I2C_SCL; -static unsigned char g_i2cDataGPIO = DEFAULT_I2C_SDA; +static unsigned char sw_i2c_clk_gpio = DEFAULT_I2C_SCL; +static unsigned char sw_i2c_data_gpio = DEFAULT_I2C_SDA; /* * Below is the variable declaration for the GPIO pin register usage @@ -70,19 +69,19 @@ static unsigned char g_i2cDataGPIO = DEFAULT_I2C_SDA; */ /* i2c Clock GPIO Register usage */ -static unsigned long g_i2cClkGPIOMuxReg = GPIO_MUX; -static unsigned long g_i2cClkGPIODataReg = GPIO_DATA; -static unsigned long g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION; +static unsigned long sw_i2c_clk_gpio_mux_reg = GPIO_MUX; +static unsigned long sw_i2c_clk_gpio_data_reg = GPIO_DATA; +static unsigned long sw_i2c_clk_gpio_data_dir_reg = GPIO_DATA_DIRECTION; /* i2c Data GPIO Register usage */ -static unsigned long g_i2cDataGPIOMuxReg = GPIO_MUX; -static unsigned long g_i2cDataGPIODataReg = GPIO_DATA; -static unsigned long g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION; +static unsigned long sw_i2c_data_gpio_mux_reg = GPIO_MUX; +static unsigned long sw_i2c_data_gpio_data_reg = GPIO_DATA; +static unsigned long sw_i2c_data_gpio_data_dir_reg = GPIO_DATA_DIRECTION; /* * This function puts a delay between command */ -static void swI2CWait(void) +static void sw_i2c_wait(void) { /* find a bug: * peekIO method works well before suspend/resume @@ -91,21 +90,17 @@ static void swI2CWait(void) * never finish. * use non-ultimate for loop below is safe * */ -#if 0 + /* Change wait algorithm to use PCI bus clock, it's more reliable than counter loop .. write 0x61 to 0x3ce and read from 0x3cf */ - while(peekIO(0x3ce,0x61) & 0x10); -#else - int i, Temp; - - for(i=0; i<600; i++) - { - Temp = i; - Temp += i; - } -#endif + int i, tmp; + + for (i = 0; i < 600; i++) { + tmp = i; + tmp += i; + } } /* @@ -120,29 +115,29 @@ static void swI2CWait(void) * signal because the i2c will fail when other device try to drive the * signal due to SM50x will drive the signal to always high. */ -void swI2CSCL(unsigned char value) +static void sw_i2c_scl(unsigned char value) { - unsigned long ulGPIOData; - unsigned long ulGPIODirection; - - ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg); - if (value) /* High */ - { - /* Set direction as input. This will automatically pull the signal up. */ - ulGPIODirection &= ~(1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); - } - else /* Low */ - { - /* Set the signal down */ - ulGPIOData = PEEK32(g_i2cClkGPIODataReg); - ulGPIOData &= ~(1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataReg, ulGPIOData); - - /* Set direction as output */ - ulGPIODirection |= (1 << g_i2cClockGPIO); - POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection); - } + unsigned long gpio_data; + unsigned long gpio_dir; + + gpio_dir = PEEK32(sw_i2c_clk_gpio_data_dir_reg); + if (value) { /* High */ + /* + * Set direction as input. This will automatically + * pull the signal up. + */ + gpio_dir &= ~(1 << sw_i2c_clk_gpio); + POKE32(sw_i2c_clk_gpio_data_dir_reg, gpio_dir); + } else { /* Low */ + /* Set the signal down */ + gpio_data = PEEK32(sw_i2c_clk_gpio_data_reg); + gpio_data &= ~(1 << sw_i2c_clk_gpio); + POKE32(sw_i2c_clk_gpio_data_reg, gpio_data); + + /* Set direction as output */ + gpio_dir |= (1 << sw_i2c_clk_gpio); + POKE32(sw_i2c_clk_gpio_data_dir_reg, gpio_dir); + } } /* @@ -157,29 +152,29 @@ void swI2CSCL(unsigned char value) * signal because the i2c will fail when other device try to drive the * signal due to SM50x will drive the signal to always high. */ -void swI2CSDA(unsigned char value) +static void sw_i2c_sda(unsigned char value) { - unsigned long ulGPIOData; - unsigned long ulGPIODirection; - - ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); - if (value) /* High */ - { - /* Set direction as input. This will automatically pull the signal up. */ - ulGPIODirection &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } - else /* Low */ - { - /* Set the signal down */ - ulGPIOData = PEEK32(g_i2cDataGPIODataReg); - ulGPIOData &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataReg, ulGPIOData); - - /* Set direction as output */ - ulGPIODirection |= (1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } + unsigned long gpio_data; + unsigned long gpio_dir; + + gpio_dir = PEEK32(sw_i2c_data_gpio_data_dir_reg); + if (value) { /* High */ + /* + * Set direction as input. This will automatically + * pull the signal up. + */ + gpio_dir &= ~(1 << sw_i2c_data_gpio); + POKE32(sw_i2c_data_gpio_data_dir_reg, gpio_dir); + } else { /* Low */ + /* Set the signal down */ + gpio_data = PEEK32(sw_i2c_data_gpio_data_reg); + gpio_data &= ~(1 << sw_i2c_data_gpio); + POKE32(sw_i2c_data_gpio_data_reg, gpio_data); + + /* Set direction as output */ + gpio_dir |= (1 << sw_i2c_data_gpio); + POKE32(sw_i2c_data_gpio_data_dir_reg, gpio_dir); + } } /* @@ -188,55 +183,55 @@ void swI2CSDA(unsigned char value) * Return Value: * The SDA data bit sent by the Slave */ -static unsigned char swI2CReadSDA(void) +static unsigned char sw_i2c_read_sda(void) { - unsigned long ulGPIODirection; - unsigned long ulGPIOData; - - /* Make sure that the direction is input (High) */ - ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); - if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO))) - { - ulGPIODirection &= ~(1 << g_i2cDataGPIO); - POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection); - } - - /* Now read the SDA line */ - ulGPIOData = PEEK32(g_i2cDataGPIODataReg); - if (ulGPIOData & (1 << g_i2cDataGPIO)) - return 1; - else - return 0; + unsigned long gpio_dir; + unsigned long gpio_data; + unsigned long dir_mask = 1 << sw_i2c_data_gpio; + + /* Make sure that the direction is input (High) */ + gpio_dir = PEEK32(sw_i2c_data_gpio_data_dir_reg); + if ((gpio_dir & dir_mask) != ~dir_mask) { + gpio_dir &= ~(1 << sw_i2c_data_gpio); + POKE32(sw_i2c_data_gpio_data_dir_reg, gpio_dir); + } + + /* Now read the SDA line */ + gpio_data = PEEK32(sw_i2c_data_gpio_data_reg); + if (gpio_data & (1 << sw_i2c_data_gpio)) + return 1; + else + return 0; } /* * This function sends ACK signal */ -static void swI2CAck(void) +static void sw_i2c_ack(void) { - return; /* Single byte read is ok without it. */ + return; /* Single byte read is ok without it. */ } /* * This function sends the start command to the slave device */ -static void swI2CStart(void) +static void sw_i2c_start(void) { - /* Start I2C */ - swI2CSDA(1); - swI2CSCL(1); - swI2CSDA(0); + /* Start I2C */ + sw_i2c_sda(1); + sw_i2c_scl(1); + sw_i2c_sda(0); } /* * This function sends the stop command to the slave device */ -static void swI2CStop(void) +static void sw_i2c_stop(void) { - /* Stop the I2C */ - swI2CSCL(1); - swI2CSDA(0); - swI2CSDA(1); + /* Stop the I2C */ + sw_i2c_scl(1); + sw_i2c_sda(0); + sw_i2c_sda(1); } /* @@ -249,62 +244,60 @@ static void swI2CStop(void) * 0 - Success * -1 - Fail to write byte */ -static long swI2CWriteByte(unsigned char data) +static long sw_i2c_write_byte(unsigned char data) { - unsigned char value = data; - int i; - - /* Sending the data bit by bit */ - for (i=0; i<8; i++) - { - /* Set SCL to low */ - swI2CSCL(0); - - /* Send data bit */ - if ((value & 0x80) != 0) - swI2CSDA(1); - else - swI2CSDA(0); - - swI2CWait(); - - /* Toggle clk line to one */ - swI2CSCL(1); - swI2CWait(); - - /* Shift byte to be sent */ - value = value << 1; - } - - /* Set the SCL Low and SDA High (prepare to get input) */ - swI2CSCL(0); - swI2CSDA(1); - - /* Set the SCL High for ack */ - swI2CWait(); - swI2CSCL(1); - swI2CWait(); - - /* Read SDA, until SDA==0 */ - for(i=0; i<0xff; i++) - { - if (!swI2CReadSDA()) - break; - - swI2CSCL(0); - swI2CWait(); - swI2CSCL(1); - swI2CWait(); - } - - /* Set the SCL Low and SDA High */ - swI2CSCL(0); - swI2CSDA(1); - - if (i<0xff) - return 0; - else - return -1; + unsigned char value = data; + int i; + + /* Sending the data bit by bit */ + for (i = 0; i < 8; i++) { + /* Set SCL to low */ + sw_i2c_scl(0); + + /* Send data bit */ + if ((value & 0x80) != 0) + sw_i2c_sda(1); + else + sw_i2c_sda(0); + + sw_i2c_wait(); + + /* Toggle clk line to one */ + sw_i2c_scl(1); + sw_i2c_wait(); + + /* Shift byte to be sent */ + value = value << 1; + } + + /* Set the SCL Low and SDA High (prepare to get input) */ + sw_i2c_scl(0); + sw_i2c_sda(1); + + /* Set the SCL High for ack */ + sw_i2c_wait(); + sw_i2c_scl(1); + sw_i2c_wait(); + + /* Read SDA, until SDA==0 */ + for (i = 0; i < 0xff; i++) { + if (!sw_i2c_read_sda()) + break; + + sw_i2c_scl(0); + sw_i2c_wait(); + sw_i2c_scl(1); + sw_i2c_wait(); + } + + /* Set the SCL Low and SDA High */ + sw_i2c_scl(0); + sw_i2c_sda(1); + + if (i < 0xff) + return 0; + else + return -1; } /* @@ -317,206 +310,207 @@ static long swI2CWriteByte(unsigned char data) * Return Value: * One byte data read from the Slave device */ -static unsigned char swI2CReadByte(unsigned char ack) +static unsigned char sw_i2c_read_byte(unsigned char ack) { - int i; - unsigned char data = 0; + int i; + unsigned char data = 0; - for(i=7; i>=0; i--) - { - /* Set the SCL to Low and SDA to High (Input) */ - swI2CSCL(0); - swI2CSDA(1); - swI2CWait(); + for (i = 7; i >= 0; i--) { + /* Set the SCL to Low and SDA to High (Input) */ + sw_i2c_scl(0); + sw_i2c_sda(1); + sw_i2c_wait(); - /* Set the SCL High */ - swI2CSCL(1); - swI2CWait(); + /* Set the SCL High */ + sw_i2c_scl(1); + sw_i2c_wait(); - /* Read data bits from SDA */ - data |= (swI2CReadSDA() << i); - } + /* Read data bits from SDA */ + data |= (sw_i2c_read_sda() << i); + } - if (ack) - swI2CAck(); + if (ack) + sw_i2c_ack(); - /* Set the SCL Low and SDA High */ - swI2CSCL(0); - swI2CSDA(1); + /* Set the SCL Low and SDA High */ + sw_i2c_scl(0); + sw_i2c_sda(1); - return data; + return data; } /* * This function initializes GPIO port for SW I2C communication. * * Parameters: - * i2cClkGPIO - The GPIO pin to be used as i2c SCL - * i2cDataGPIO - The GPIO pin to be used as i2c SDA + * clk_gpio - The GPIO pin to be used as i2c SCL + * data_gpio - The GPIO pin to be used as i2c SDA * * Return Value: * -1 - Fail to initialize the i2c * 0 - Success */ -static long swI2CInit_SM750LE(unsigned char i2cClkGPIO, - unsigned char i2cDataGPIO) +static long sm750le_i2c_init(unsigned char clk_gpio, + unsigned char data_gpio) { - int i; + int i; - /* Initialize the GPIO pin for the i2c Clock Register */ - g_i2cClkGPIODataReg = GPIO_DATA_SM750LE; - g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; + /* Initialize the GPIO pin for the i2c Clock Register */ + sw_i2c_clk_gpio_data_reg = GPIO_DATA_SM750LE; + sw_i2c_clk_gpio_data_dir_reg = GPIO_DATA_DIRECTION_SM750LE; - /* Initialize the Clock GPIO Offset */ - g_i2cClockGPIO = i2cClkGPIO; + /* Initialize the Clock GPIO Offset */ + sw_i2c_clk_gpio = clk_gpio; - /* Initialize the GPIO pin for the i2c Data Register */ - g_i2cDataGPIODataReg = GPIO_DATA_SM750LE; - g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE; + /* Initialize the GPIO pin for the i2c Data Register */ + sw_i2c_data_gpio_data_reg = GPIO_DATA_SM750LE; + sw_i2c_data_gpio_data_dir_reg = GPIO_DATA_DIRECTION_SM750LE; - /* Initialize the Data GPIO Offset */ - g_i2cDataGPIO = i2cDataGPIO; + /* Initialize the Data GPIO Offset */ + sw_i2c_data_gpio = data_gpio; - /* Note that SM750LE don't have GPIO MUX and power is always on */ + /* Note that SM750LE don't have GPIO MUX and power is always on */ - /* Clear the i2c lines. */ - for(i=0; i<9; i++) - swI2CStop(); + /* Clear the i2c lines. */ + for (i = 0; i < 9; i++) + sw_i2c_stop(); - return 0; + return 0; } /* * This function initializes the i2c attributes and bus * * Parameters: - * i2cClkGPIO - The GPIO pin to be used as i2c SCL - * i2cDataGPIO - The GPIO pin to be used as i2c SDA + * clk_gpio - The GPIO pin to be used as i2c SCL + * data_gpio - The GPIO pin to be used as i2c SDA * * Return Value: * -1 - Fail to initialize the i2c * 0 - Success */ -long swI2CInit( - unsigned char i2cClkGPIO, - unsigned char i2cDataGPIO +long sm750_sw_i2c_init( + unsigned char clk_gpio, + unsigned char data_gpio ) { - int i; + int i; - /* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */ - if ((i2cClkGPIO > 31) || (i2cDataGPIO > 31)) - return -1; + /* + * Return 0 if the GPIO pins to be used is out of range. The + * range is only from [0..63] + */ + if ((clk_gpio > 31) || (data_gpio > 31)) + return -1; - if (getChipType() == SM750LE) - return swI2CInit_SM750LE(i2cClkGPIO, i2cDataGPIO); + if (getChipType() == SM750LE) + return sm750le_i2c_init(clk_gpio, data_gpio); - /* Initialize the GPIO pin for the i2c Clock Register */ - g_i2cClkGPIOMuxReg = GPIO_MUX; - g_i2cClkGPIODataReg = GPIO_DATA; - g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION; + /* Initialize the GPIO pin for the i2c Clock Register */ + sw_i2c_clk_gpio_mux_reg = GPIO_MUX; + sw_i2c_clk_gpio_data_reg = GPIO_DATA; + sw_i2c_clk_gpio_data_dir_reg = GPIO_DATA_DIRECTION; - /* Initialize the Clock GPIO Offset */ - g_i2cClockGPIO = i2cClkGPIO; + /* Initialize the Clock GPIO Offset */ + sw_i2c_clk_gpio = clk_gpio; - /* Initialize the GPIO pin for the i2c Data Register */ - g_i2cDataGPIOMuxReg = GPIO_MUX; - g_i2cDataGPIODataReg = GPIO_DATA; - g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION; + /* Initialize the GPIO pin for the i2c Data Register */ + sw_i2c_data_gpio_mux_reg = GPIO_MUX; + sw_i2c_data_gpio_data_reg = GPIO_DATA; + sw_i2c_data_gpio_data_dir_reg = GPIO_DATA_DIRECTION; - /* Initialize the Data GPIO Offset */ - g_i2cDataGPIO = i2cDataGPIO; + /* Initialize the Data GPIO Offset */ + sw_i2c_data_gpio = data_gpio; - /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */ - POKE32(g_i2cClkGPIOMuxReg, - PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO)); - POKE32(g_i2cDataGPIOMuxReg, - PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO)); + /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */ + POKE32(sw_i2c_clk_gpio_mux_reg, + PEEK32(sw_i2c_clk_gpio_mux_reg) & ~(1 << sw_i2c_clk_gpio)); + POKE32(sw_i2c_data_gpio_mux_reg, + PEEK32(sw_i2c_data_gpio_mux_reg) & ~(1 << sw_i2c_data_gpio)); - /* Enable GPIO power */ - enableGPIO(1); + /* Enable GPIO power */ + enableGPIO(1); - /* Clear the i2c lines. */ - for(i=0; i<9; i++) - swI2CStop(); + /* Clear the i2c lines. */ + for (i = 0; i < 9; i++) + sw_i2c_stop(); - return 0; + return 0; } /* * This function reads the slave device's register * * Parameters: - * deviceAddress - i2c Slave device address which register + * addr - i2c Slave device address which register * to be read from - * registerIndex - Slave device's register to be read + * reg - Slave device's register to be read * * Return Value: * Register value */ -unsigned char swI2CReadReg( - unsigned char deviceAddress, - unsigned char registerIndex +unsigned char sm750_sw_i2c_read_reg( + unsigned char addr, + unsigned char reg ) { - unsigned char data; + unsigned char data; - /* Send the Start signal */ - swI2CStart(); + /* Send the Start signal */ + sw_i2c_start(); - /* Send the device address */ - swI2CWriteByte(deviceAddress); + /* Send the device address */ + sw_i2c_write_byte(addr); - /* Send the register index */ - swI2CWriteByte(registerIndex); + /* Send the register index */ + sw_i2c_write_byte(reg); - /* Get the bus again and get the data from the device read address */ - swI2CStart(); - swI2CWriteByte(deviceAddress + 1); - data = swI2CReadByte(1); + /* Get the bus again and get the data from the device read address */ + sw_i2c_start(); + sw_i2c_write_byte(addr + 1); + data = sw_i2c_read_byte(1); - /* Stop swI2C and release the bus */ - swI2CStop(); + /* Stop swI2C and release the bus */ + sw_i2c_stop(); - return data; + return data; } /* * This function writes a value to the slave device's register * * Parameters: - * deviceAddress - i2c Slave device address which register + * addr - i2c Slave device address which register * to be written - * registerIndex - Slave device's register to be written + * reg - Slave device's register to be written * data - Data to be written to the register * * Result: * 0 - Success * -1 - Fail */ -long swI2CWriteReg( - unsigned char deviceAddress, - unsigned char registerIndex, - unsigned char data +long sm750_sw_i2c_write_reg( + unsigned char addr, + unsigned char reg, + unsigned char data ) { - long returnValue = 0; + long ret = 0; - /* Send the Start signal */ - swI2CStart(); + /* Send the Start signal */ + sw_i2c_start(); - /* Send the device address and read the data. All should return success - in order for the writing processed to be successful - */ - if ((swI2CWriteByte(deviceAddress) != 0) || - (swI2CWriteByte(registerIndex) != 0) || - (swI2CWriteByte(data) != 0)) - { - returnValue = -1; - } + /* Send the device address and read the data. All should return success + in order for the writing processed to be successful + */ + if ((sw_i2c_write_byte(addr) != 0) || + (sw_i2c_write_byte(reg) != 0) || + (sw_i2c_write_byte(data) != 0)) { + ret = -1; + } - /* Stop i2c and release the bus */ - swI2CStop(); + /* Stop i2c and release the bus */ + sw_i2c_stop(); - return returnValue; + return ret; } diff --git a/kernel/drivers/staging/sm750fb/ddk750_swi2c.h b/kernel/drivers/staging/sm750fb/ddk750_swi2c.h index ec5463b98..b53629cda 100644 --- a/kernel/drivers/staging/sm750fb/ddk750_swi2c.h +++ b/kernel/drivers/staging/sm750fb/ddk750_swi2c.h @@ -28,65 +28,44 @@ * -1 - Fail to initialize the i2c * 0 - Success */ -long swI2CInit( - unsigned char i2cClkGPIO, - unsigned char i2cDataGPIO +long sm750_sw_i2c_init( + unsigned char clk_gpio, + unsigned char data_gpio ); /* * This function reads the slave device's register * * Parameters: - * deviceAddress - i2c Slave device address which register + * addr - i2c Slave device address which register * to be read from - * registerIndex - Slave device's register to be read + * reg - Slave device's register to be read * * Return Value: * Register value */ -unsigned char swI2CReadReg( - unsigned char deviceAddress, - unsigned char registerIndex +unsigned char sm750_sw_i2c_read_reg( + unsigned char addr, + unsigned char reg ); /* * This function writes a value to the slave device's register * * Parameters: - * deviceAddress - i2c Slave device address which register + * addr - i2c Slave device address which register * to be written - * registerIndex - Slave device's register to be written + * reg - Slave device's register to be written * data - Data to be written to the register * * Result: * 0 - Success * -1 - Fail */ -long swI2CWriteReg( - unsigned char deviceAddress, - unsigned char registerIndex, - unsigned char data +long sm750_sw_i2c_write_reg( + unsigned char addr, + unsigned char reg, + unsigned char data ); -/* - * These two functions are used to toggle the data on the SCL and SDA I2C lines. - * The used of these two functions are not recommended unless it is necessary. - */ - -/* - * This function set/reset the SCL GPIO pin - * - * Parameters: - * value - Bit value to set to the SCL or SDA (0 = low, 1 = high) - */ -void swI2CSCL(unsigned char value); - -/* - * This function set/reset the SDA GPIO pin - * - * Parameters: - * value - Bit value to set to the SCL or SDA (0 = low, 1 = high) - */ -void swI2CSDA(unsigned char value); - #endif /* _SWI2C_H_ */ diff --git a/kernel/drivers/staging/sm750fb/modedb.h b/kernel/drivers/staging/sm750fb/modedb.h index c5275c6ff..83cb2e2ae 100644 --- a/kernel/drivers/staging/sm750fb/modedb.h +++ b/kernel/drivers/staging/sm750fb/modedb.h @@ -1,221 +1,233 @@ static const struct fb_videomode modedb2[] = { - { - /* 640x400 @ 70 Hz, 31.5 kHz hsync */ - NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 60 Hz, 31.5 kHz hsync */ - NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 56 Hz, 35.15 kHz hsync */ - NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */ - NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, - 0, FB_VMODE_INTERLACED - }, { - /* 640x400 @ 85 Hz, 37.86 kHz hsync */ - NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3, - FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 72 Hz, 36.5 kHz hsync */ - NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 75 Hz, 37.50 kHz hsync */ - NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 85 Hz, 43.27 kHz hsync */ - NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */ - NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, - 0, FB_VMODE_INTERLACED - }, { - /* 800x600 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 60 Hz, 48.4 kHz hsync */ - NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 640x480 @ 100 Hz, 53.01 kHz hsync */ - NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 60 Hz, 53.5 kHz hsync */ - NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ 85 Hz, 55.84 kHz hsync */ - NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 70 Hz, 56.5 kHz hsync */ - NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x960-60 VESA */ - NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA - }, { - /* 1280x1024-60 VESA */ - NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA - }, { - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, - 0, FB_VMODE_INTERLACED - }, { - /* 800x600 @ 100 Hz, 64.02 kHz hsync */ - NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 76 Hz, 62.5 kHz hsync */ - NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 70 Hz, 62.4 kHz hsync */ - NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */ - NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 60Hz, 63.9 kHz hsync */ - NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/ - NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/ - NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 85 Hz, 70.24 kHz hsync */ - NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 78 Hz, 70.8 kHz hsync */ - NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */ - NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 60Hz, 75.00 kHz hsync */ - NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 84 Hz, 76.0 kHz hsync */ - NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */ - NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1024x768 @ 100Hz, 80.21 kHz hsync */ - NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */ - NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */ - NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1152x864 @ 100 Hz, 89.62 kHz hsync */ - NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */ - NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */ - NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */ - NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */ - NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15, - 0, FB_VMODE_NONINTERLACED - }, { - /* 1800x1440 @ 64Hz, 96.15 kHz hsync */ - NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 1800x1440 @ 70Hz, 104.52 kHz hsync */ - NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, { - /* 512x384 @ 78 Hz, 31.50 kHz hsync */ - NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 512x384 @ 85 Hz, 34.38 kHz hsync */ - NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, { - /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */ - NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */ - NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 320x240 @ 72 Hz, 36.5 kHz hsync */ - NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */ - NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 400x300 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */ - NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 60 Hz, 37.8 kHz hsync */ - NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 63 Hz, 39.6 kHz hsync */ - NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, { - /* 480x300 @ 72 Hz, 48.0 kHz hsync */ - NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3, - 0, FB_VMODE_DOUBLE - }, + { + /* 640x400 @ 70 Hz, 31.5 kHz hsync */ + NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 60 Hz, 31.5 kHz hsync */ + NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 56 Hz, 35.15 kHz hsync */ + NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */ + NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, + 0, FB_VMODE_INTERLACED + }, { + /* 640x400 @ 85 Hz, 37.86 kHz hsync */ + NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3, + FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 72 Hz, 36.5 kHz hsync */ + NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 75 Hz, 37.50 kHz hsync */ + NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 85 Hz, 43.27 kHz hsync */ + NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */ + NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, + 0, FB_VMODE_INTERLACED + }, { + /* 800x600 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 60 Hz, 48.4 kHz hsync */ + NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 100 Hz, 53.01 kHz hsync */ + NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 60 Hz, 53.5 kHz hsync */ + NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 85 Hz, 55.84 kHz hsync */ + NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 70 Hz, 56.5 kHz hsync */ + NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x960-60 VESA */ + NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA + }, { + /* 1280x1024-60 VESA */ + NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA + }, { + /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ + NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, + 0, FB_VMODE_INTERLACED + }, { + /* 800x600 @ 100 Hz, 64.02 kHz hsync */ + NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 76 Hz, 62.5 kHz hsync */ + NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 70 Hz, 62.4 kHz hsync */ + NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */ + NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 60Hz, 63.9 kHz hsync */ + NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/ + NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/ + NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 85 Hz, 70.24 kHz hsync */ + NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 78 Hz, 70.8 kHz hsync */ + NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */ + NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 60Hz, 75.00 kHz hsync */ + NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 84 Hz, 76.0 kHz hsync */ + NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */ + NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1024x768 @ 100Hz, 80.21 kHz hsync */ + NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */ + NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */ + NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1152x864 @ 100 Hz, 89.62 kHz hsync */ + NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */ + NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */ + NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */ + NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */ + NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15, + 0, FB_VMODE_NONINTERLACED + }, { + /* 1800x1440 @ 64Hz, 96.15 kHz hsync */ + NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 1800x1440 @ 70Hz, 104.52 kHz hsync */ + NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + }, { + /* 512x384 @ 78 Hz, 31.50 kHz hsync */ + NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 512x384 @ 85 Hz, 34.38 kHz hsync */ + NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */ + NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */ + NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 320x240 @ 72 Hz, 36.5 kHz hsync */ + NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */ + NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 400x300 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */ + NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 60 Hz, 37.8 kHz hsync */ + NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 63 Hz, 39.6 kHz hsync */ + NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2, + 0, FB_VMODE_DOUBLE + }, { + /* 480x300 @ 72 Hz, 48.0 kHz hsync */ + NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3, + 0, FB_VMODE_DOUBLE + }, }; static const int nmodedb2 = sizeof(modedb2); diff --git a/kernel/drivers/staging/sm750fb/readme b/kernel/drivers/staging/sm750fb/readme index ab9af7916..cfa45958b 100644 --- a/kernel/drivers/staging/sm750fb/readme +++ b/kernel/drivers/staging/sm750fb/readme @@ -5,7 +5,7 @@ Introduction: - 2D acceleration - 16MB integrated video memory -About the kernel module paramter of driver: +About the kernel module parameter of driver: Use 1280,8bpp index color and 60 hz mode: insmod ./sm750fb.ko g_option="1280x1024-8@60" @@ -20,16 +20,16 @@ About the kernel module paramter of driver: and user can use con2fb to link fbX and ttyX Notes: - 1) if you build the driver with built-in method, the paramter + 1) if you build the driver with built-in method, the parameter you edited in the grub config file will be also the - same format as above modular method,but additionaly add + same format as above modular method,but additionally add "video=sm750fb:" ahead of parameters,so,it looks like: video=sm750fb:noaccel,1280x1024@60,otherparam,etc... it equal to modular method with below command: insmod ./sm750fb.ko g_option="noaccel:1280x1024@60:otherparm:etc..." - 2) if you put 800x600 into the paramter without bpp and + 2) if you put 800x600 into the parameter without bpp and refresh rate, kernel driver will defaulty use 16bpp and 60hz Important: diff --git a/kernel/drivers/staging/sm750fb/sm750.c b/kernel/drivers/staging/sm750fb/sm750.c index dbbb2f879..860e1c288 100644 --- a/kernel/drivers/staging/sm750fb/sm750.c +++ b/kernel/drivers/staging/sm750fb/sm750.c @@ -1,35 +1,28 @@ -#include<linux/kernel.h> -#include<linux/module.h> -#include<linux/errno.h> -#include<linux/string.h> -#include<linux/mm.h> -#include<linux/slab.h> -#include<linux/delay.h> -#include<linux/fb.h> -#include<linux/ioport.h> -#include<linux/init.h> -#include<linux/pci.h> -#include<linux/mm_types.h> -#include<linux/vmalloc.h> -#include<linux/pagemap.h> -#include<linux/screen_info.h> -#include<linux/vmalloc.h> -#include<linux/pagemap.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/ioport.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/mm_types.h> +#include <linux/vmalloc.h> +#include <linux/pagemap.h> +#include <linux/screen_info.h> +#include <linux/vmalloc.h> +#include <linux/pagemap.h> #include <linux/console.h> -#ifdef CONFIG_MTRR -#include <asm/mtrr.h> -#endif #include <asm/fb.h> #include "sm750.h" -#include "sm750_hw.h" #include "sm750_accel.h" #include "sm750_cursor.h" #include "modedb.h" -int smi_indent = 0; - - /* * #ifdef __BIG_ENDIAN * ssize_t lynxfb_ops_write(struct fb_info *info, const char __user *buf, @@ -39,23 +32,15 @@ int smi_indent = 0; * #endif */ -typedef void (*PROC_SPEC_SETUP)(struct lynx_share*, char *); -typedef int (*PROC_SPEC_MAP)(struct lynx_share*, struct pci_dev*); -typedef int (*PROC_SPEC_INITHW)(struct lynx_share*, struct pci_dev*); - - /* common var for all device */ static int g_hwcursor = 1; static int g_noaccel; -#ifdef CONFIG_MTRR static int g_nomtrr; -#endif static const char *g_fbmode[] = {NULL, NULL}; static const char *g_def_fbmode = "800x600-16@60"; -static char *g_settings = NULL; +static char *g_settings; static int g_dualview; -static char *g_option = NULL; - +static char *g_option; static const struct fb_videomode lynx750_ext[] = { /* 1024x600-60 VESA [1.71:1] */ @@ -93,9 +78,6 @@ static const struct fb_videomode lynx750_ext[] = { FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED}, - {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3, - FB_SYNC_HOR_HIGH_ACT|FB_VMODE_NONINTERLACED}, - /* 1360 x 768 [1.77083:1] */ {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, @@ -123,8 +105,6 @@ static const struct fb_videomode lynx750_ext[] = { }; - - /* no hardware cursor supported under version 2.6.10, kernel bug */ static int lynxfb_ops_cursor(struct fb_info *info, struct fb_cursor *fbcursor) { @@ -142,42 +122,41 @@ static int lynxfb_ops_cursor(struct fb_info *info, struct fb_cursor *fbcursor) return -ENXIO; } - cursor->disable(cursor); + hw_cursor_disable(cursor); if (fbcursor->set & FB_CUR_SETSIZE) - cursor->setSize(cursor, - fbcursor->image.width, - fbcursor->image.height); + hw_cursor_setSize(cursor, + fbcursor->image.width, + fbcursor->image.height); if (fbcursor->set & FB_CUR_SETPOS) - cursor->setPos(cursor, - fbcursor->image.dx - info->var.xoffset, - fbcursor->image.dy - info->var.yoffset); + hw_cursor_setPos(cursor, + fbcursor->image.dx - info->var.xoffset, + fbcursor->image.dy - info->var.yoffset); if (fbcursor->set & FB_CUR_SETCMAP) { /* get the 16bit color of kernel means */ u16 fg, bg; - fg = ((info->cmap.red[fbcursor->image.fg_color] & 0xf800))| - ((info->cmap.green[fbcursor->image.fg_color] & 0xfc00) >> 5)| + fg = ((info->cmap.red[fbcursor->image.fg_color] & 0xf800)) | + ((info->cmap.green[fbcursor->image.fg_color] & 0xfc00) >> 5) | ((info->cmap.blue[fbcursor->image.fg_color] & 0xf800) >> 11); - bg = ((info->cmap.red[fbcursor->image.bg_color] & 0xf800))| - ((info->cmap.green[fbcursor->image.bg_color] & 0xfc00) >> 5)| + bg = ((info->cmap.red[fbcursor->image.bg_color] & 0xf800)) | + ((info->cmap.green[fbcursor->image.bg_color] & 0xfc00) >> 5) | ((info->cmap.blue[fbcursor->image.bg_color] & 0xf800) >> 11); - cursor->setColor(cursor, fg, bg); + hw_cursor_setColor(cursor, fg, bg); } - if (fbcursor->set & (FB_CUR_SETSHAPE | FB_CUR_SETIMAGE)) { - cursor->setData(cursor, - fbcursor->rop, - fbcursor->image.data, - fbcursor->mask); + hw_cursor_setData(cursor, + fbcursor->rop, + fbcursor->image.data, + fbcursor->mask); } if (fbcursor->enable) - cursor->enable(cursor); + hw_cursor_enable(cursor); return 0; } @@ -186,7 +165,7 @@ static void lynxfb_ops_fillrect(struct fb_info *info, const struct fb_fillrect *region) { struct lynxfb_par *par; - struct lynx_share *share; + struct sm750_dev *sm750_dev; unsigned int base, pitch, Bpp, rop; u32 color; @@ -194,62 +173,68 @@ static void lynxfb_ops_fillrect(struct fb_info *info, return; par = info->par; - share = par->share; + sm750_dev = par->dev; - /* each time 2d function begin to work,below three variable always need - * be set, seems we can put them together in some place */ + /* + * each time 2d function begin to work,below three variable always need + * be set, seems we can put them together in some place + */ base = par->crtc.oScreen; pitch = info->fix.line_length; Bpp = info->var.bits_per_pixel >> 3; - color = (Bpp == 1)?region->color:((u32 *)info->pseudo_palette)[region->color]; - rop = (region->rop != ROP_COPY) ? HW_ROP2_XOR:HW_ROP2_COPY; + color = (Bpp == 1) ? region->color : + ((u32 *)info->pseudo_palette)[region->color]; + rop = (region->rop != ROP_COPY) ? HW_ROP2_XOR : HW_ROP2_COPY; /* * If not use spin_lock,system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ - if (share->dual) - spin_lock(&share->slock); - - share->accel.de_fillrect(&share->accel, - base, pitch, Bpp, - region->dx, region->dy, - region->width, region->height, - color, rop); - if (share->dual) - spin_unlock(&share->slock); + if (sm750_dev->dual) + spin_lock(&sm750_dev->slock); + + sm750_dev->accel.de_fillrect(&sm750_dev->accel, + base, pitch, Bpp, + region->dx, region->dy, + region->width, region->height, + color, rop); + if (sm750_dev->dual) + spin_unlock(&sm750_dev->slock); } static void lynxfb_ops_copyarea(struct fb_info *info, const struct fb_copyarea *region) { struct lynxfb_par *par; - struct lynx_share *share; + struct sm750_dev *sm750_dev; unsigned int base, pitch, Bpp; par = info->par; - share = par->share; + sm750_dev = par->dev; - /* each time 2d function begin to work,below three variable always need - * be set, seems we can put them together in some place */ + /* + * each time 2d function begin to work,below three variable always need + * be set, seems we can put them together in some place + */ base = par->crtc.oScreen; pitch = info->fix.line_length; Bpp = info->var.bits_per_pixel >> 3; /* * If not use spin_lock, system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ - if (share->dual) - spin_lock(&share->slock); - - share->accel.de_copyarea(&share->accel, - base, pitch, region->sx, region->sy, - base, pitch, Bpp, region->dx, region->dy, - region->width, region->height, HW_ROP2_COPY); - if (share->dual) - spin_unlock(&share->slock); + if (sm750_dev->dual) + spin_lock(&sm750_dev->slock); + + sm750_dev->accel.de_copyarea(&sm750_dev->accel, + base, pitch, region->sx, region->sy, + base, pitch, Bpp, region->dx, region->dy, + region->width, region->height, + HW_ROP2_COPY); + if (sm750_dev->dual) + spin_unlock(&sm750_dev->slock); } static void lynxfb_ops_imageblit(struct fb_info *info, @@ -258,44 +243,48 @@ static void lynxfb_ops_imageblit(struct fb_info *info, unsigned int base, pitch, Bpp; unsigned int fgcol, bgcol; struct lynxfb_par *par; - struct lynx_share *share; + struct sm750_dev *sm750_dev; par = info->par; - share = par->share; - /* each time 2d function begin to work,below three variable always need - * be set, seems we can put them together in some place */ + sm750_dev = par->dev; + /* + * each time 2d function begin to work,below three variable always need + * be set, seems we can put them together in some place + */ base = par->crtc.oScreen; pitch = info->fix.line_length; Bpp = info->var.bits_per_pixel >> 3; - if (image->depth == 1) { - if (info->fix.visual == FB_VISUAL_TRUECOLOR || - info->fix.visual == FB_VISUAL_DIRECTCOLOR) { - fgcol = ((u32 *)info->pseudo_palette)[image->fg_color]; - bgcol = ((u32 *)info->pseudo_palette)[image->bg_color]; - } else { - fgcol = image->fg_color; - bgcol = image->bg_color; - } - goto _do_work; + /* TODO: Implement hardware acceleration for image->depth > 1 */ + if (image->depth != 1) { + cfb_imageblit(info, image); + return; + } + + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { + fgcol = ((u32 *)info->pseudo_palette)[image->fg_color]; + bgcol = ((u32 *)info->pseudo_palette)[image->bg_color]; + } else { + fgcol = image->fg_color; + bgcol = image->bg_color; } - return; -_do_work: + /* * If not use spin_lock, system will die if user load driver - * and immediatly unload driver frequently (dual) + * and immediately unload driver frequently (dual) */ - if (share->dual) - spin_lock(&share->slock); - - share->accel.de_imageblit(&share->accel, - image->data, image->width>>3, 0, - base, pitch, Bpp, - image->dx, image->dy, - image->width, image->height, - fgcol, bgcol, HW_ROP2_COPY); - if (share->dual) - spin_unlock(&share->slock); + if (sm750_dev->dual) + spin_lock(&sm750_dev->slock); + + sm750_dev->accel.de_imageblit(&sm750_dev->accel, + image->data, image->width >> 3, 0, + base, pitch, Bpp, + image->dx, image->dy, + image->width, image->height, + fgcol, bgcol, HW_ROP2_COPY); + if (sm750_dev->dual) + spin_unlock(&sm750_dev->slock); } static int lynxfb_ops_pan_display(struct fb_var_screeninfo *var, @@ -303,24 +292,18 @@ static int lynxfb_ops_pan_display(struct fb_var_screeninfo *var, { struct lynxfb_par *par; struct lynxfb_crtc *crtc; - int ret; - if (!info) return -EINVAL; - ret = 0; par = info->par; crtc = &par->crtc; - ret = crtc->proc_panDisplay(crtc, var, info); - - return ret; + return hw_sm750_pan_display(crtc, var, info); } static int lynxfb_ops_set_par(struct fb_info *info) { struct lynxfb_par *par; - struct lynx_share *share; struct lynxfb_crtc *crtc; struct lynxfb_output *output; struct fb_var_screeninfo *var; @@ -333,7 +316,6 @@ static int lynxfb_ops_set_par(struct fb_info *info) ret = 0; par = info->par; - share = par->share; crtc = &par->crtc; output = &par->output; var = &info->var; @@ -341,13 +323,14 @@ static int lynxfb_ops_set_par(struct fb_info *info) /* fix structur is not so FIX ... */ line_length = var->xres_virtual * var->bits_per_pixel / 8; - line_length = PADDING(crtc->line_pad, line_length); + line_length = ALIGN(line_length, crtc->line_pad); fix->line_length = line_length; - pr_err("fix->line_length = %d\n", fix->line_length); + pr_info("fix->line_length = %d\n", fix->line_length); - /* var->red,green,blue,transp are need to be set by driver + /* + * var->red,green,blue,transp are need to be set by driver * and these data should be set before setcolreg routine - * */ + */ switch (var->bits_per_pixel) { case 8: @@ -393,9 +376,9 @@ static int lynxfb_ops_set_par(struct fb_info *info) pr_err("pixel bpp format not satisfied\n."); return ret; } - ret = crtc->proc_setMode(crtc, var, fix); + ret = hw_sm750_crtc_setMode(crtc, var, fix); if (!ret) - ret = output->proc_setMode(output, var, fix); + ret = hw_sm750_output_setMode(output, var, fix); return ret; } @@ -411,14 +394,14 @@ static inline unsigned int chan_to_field(unsigned int chan, static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg) { struct fb_info *info; - struct lynx_share *share; + struct sm750_dev *sm750_dev; int ret; if (mesg.event == pdev->dev.power.power_state.event) return 0; ret = 0; - share = pci_get_drvdata(pdev); + sm750_dev = pci_get_drvdata(pdev); switch (mesg.event) { case PM_EVENT_FREEZE: case PM_EVENT_PRETHAW: @@ -428,11 +411,11 @@ static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg) console_lock(); if (mesg.event & PM_EVENT_SLEEP) { - info = share->fbinfo[0]; + info = sm750_dev->fbinfo[0]; if (info) /* 1 means do suspend */ fb_set_suspend(info, 1); - info = share->fbinfo[1]; + info = sm750_dev->fbinfo[1]; if (info) /* 1 means do suspend */ fb_set_suspend(info, 1); @@ -443,10 +426,6 @@ static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg) return ret; } - /* set chip to sleep mode */ - if (share->suspend) - (*share->suspend)(share); - pci_disable_device(pdev); ret = pci_set_power_state(pdev, pci_choose_state(pdev, mesg)); if (ret) { @@ -463,7 +442,7 @@ static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg) static int lynxfb_resume(struct pci_dev *pdev) { struct fb_info *info; - struct lynx_share *share; + struct sm750_dev *sm750_dev; struct lynxfb_par *par; struct lynxfb_crtc *crtc; @@ -471,35 +450,30 @@ static int lynxfb_resume(struct pci_dev *pdev) int ret; - ret = 0; - share = pci_get_drvdata(pdev); + sm750_dev = pci_get_drvdata(pdev); console_lock(); ret = pci_set_power_state(pdev, PCI_D0); if (ret) { - pr_err("error:%d occured in pci_set_power_state\n", ret); + pr_err("error:%d occurred in pci_set_power_state\n", ret); return ret; } - if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) { pci_restore_state(pdev); ret = pci_enable_device(pdev); if (ret) { - pr_err("error:%d occured in pci_enable_device\n", ret); + pr_err("error:%d occurred in pci_enable_device\n", ret); return ret; } pci_set_master(pdev); } - if (share->resume) - (*share->resume)(share); - - hw_sm750_inithw(share, pdev); + hw_sm750_inithw(sm750_dev, pdev); - info = share->fbinfo[0]; + info = sm750_dev->fbinfo[0]; if (info) { par = info->par; @@ -511,7 +485,7 @@ static int lynxfb_resume(struct pci_dev *pdev) fb_set_suspend(info, 0); } - info = share->fbinfo[1]; + info = sm750_dev->fbinfo[1]; if (info) { par = info->par; @@ -523,7 +497,7 @@ static int lynxfb_resume(struct pci_dev *pdev) fb_set_suspend(info, 0); } - + pdev->dev.power.power_state.event = PM_EVENT_RESUME; console_unlock(); return ret; } @@ -535,35 +509,17 @@ static int lynxfb_ops_check_var(struct fb_var_screeninfo *var, struct lynxfb_par *par; struct lynxfb_crtc *crtc; struct lynxfb_output *output; - struct lynx_share *share; - int ret; resource_size_t request; - par = info->par; crtc = &par->crtc; output = &par->output; - share = par->share; - ret = 0; pr_debug("check var:%dx%d-%d\n", var->xres, var->yres, var->bits_per_pixel); - - switch (var->bits_per_pixel) { - case 8: - case 16: - case 24: /* support 24 bpp for only lynx712/722/720 */ - case 32: - break; - default: - pr_err("bpp %d not supported\n", var->bits_per_pixel); - ret = -EINVAL; - goto exit; - } - switch (var->bits_per_pixel) { case 8: info->fix.visual = FB_VISUAL_PSEUDOCOLOR; @@ -598,8 +554,8 @@ static int lynxfb_ops_check_var(struct fb_var_screeninfo *var, info->fix.visual = FB_VISUAL_TRUECOLOR; break; default: - ret = -EINVAL; - break; + pr_err("bpp %d not supported\n", var->bits_per_pixel); + return -EINVAL; } var->height = var->width = -1; var->accel_flags = 0;/* FB_ACCELF_TEXT; */ @@ -608,21 +564,16 @@ static int lynxfb_ops_check_var(struct fb_var_screeninfo *var, request = var->xres_virtual * (var->bits_per_pixel >> 3); /* defaulty crtc->channel go with par->index */ - request = PADDING(crtc->line_pad, request); + request = ALIGN(request, crtc->line_pad); request = request * var->yres_virtual; if (crtc->vidmem_size < request) { pr_err("not enough video memory for mode\n"); return -ENOMEM; } - ret = output->proc_checkMode(output, var); - if (!ret) - ret = crtc->proc_checkMode(crtc, var); -exit: - return ret; + return hw_sm750_crtc_checkMode(crtc, var); } - static int lynxfb_ops_setcolreg(unsigned regno, unsigned red, unsigned green, @@ -653,11 +604,10 @@ static int lynxfb_ops_setcolreg(unsigned regno, red >>= 8; green >>= 8; blue >>= 8; - ret = crtc->proc_setColReg(crtc, regno, red, green, blue); + ret = hw_sm750_setColReg(crtc, regno, red, green, blue); goto exit; } - if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 256) { u32 val; @@ -692,65 +642,57 @@ static int lynxfb_ops_blank(int blank, struct fb_info *info) static int sm750fb_set_drv(struct lynxfb_par *par) { int ret; - struct lynx_share *share; - struct sm750_share *spec_share; + struct sm750_dev *sm750_dev; struct lynxfb_output *output; struct lynxfb_crtc *crtc; ret = 0; - share = par->share; - spec_share = container_of(share, struct sm750_share, share); + sm750_dev = par->dev; output = &par->output; crtc = &par->crtc; - crtc->vidmem_size = (share->dual)?share->vidmem_size>>1:share->vidmem_size; + crtc->vidmem_size = (sm750_dev->dual) ? sm750_dev->vidmem_size >> 1 : + sm750_dev->vidmem_size; /* setup crtc and output member */ - spec_share->hwCursor = g_hwcursor; + sm750_dev->hwCursor = g_hwcursor; - crtc->proc_setMode = hw_sm750_crtc_setMode; - crtc->proc_checkMode = hw_sm750_crtc_checkMode; - crtc->proc_setColReg = hw_sm750_setColReg; - crtc->proc_panDisplay = hw_sm750_pan_display; - crtc->clear = hw_sm750_crtc_clear; crtc->line_pad = 16; crtc->xpanstep = 8; crtc->ypanstep = 1; crtc->ywrapstep = 0; - output->proc_setMode = hw_sm750_output_setMode; - output->proc_checkMode = hw_sm750_output_checkMode; - - output->proc_setBLANK = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_setBLANK:hw_sm750_setBLANK; - output->clear = hw_sm750_output_clear; + output->proc_setBLANK = (sm750_dev->revid == SM750LE_REVISION_ID) ? + hw_sm750le_setBLANK : hw_sm750_setBLANK; /* chip specific phase */ - share->accel.de_wait = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_deWait : hw_sm750_deWait; - switch (spec_share->state.dataflow) { + sm750_dev->accel.de_wait = (sm750_dev->revid == SM750LE_REVISION_ID) ? + hw_sm750le_deWait : hw_sm750_deWait; + switch (sm750_dev->dataflow) { case sm750_simul_pri: output->paths = sm750_pnc; crtc->channel = sm750_primary; crtc->oScreen = 0; - crtc->vScreen = share->pvMem; + crtc->vScreen = sm750_dev->pvMem; pr_info("use simul primary mode\n"); break; case sm750_simul_sec: output->paths = sm750_pnc; crtc->channel = sm750_secondary; crtc->oScreen = 0; - crtc->vScreen = share->pvMem; + crtc->vScreen = sm750_dev->pvMem; break; case sm750_dual_normal: if (par->index == 0) { output->paths = sm750_panel; crtc->channel = sm750_primary; crtc->oScreen = 0; - crtc->vScreen = share->pvMem; + crtc->vScreen = sm750_dev->pvMem; } else { output->paths = sm750_crt; crtc->channel = sm750_secondary; /* not consider of padding stuffs for oScreen,need fix */ - crtc->oScreen = (share->vidmem_size >> 1); - crtc->vScreen = share->pvMem + crtc->oScreen; + crtc->oScreen = (sm750_dev->vidmem_size >> 1); + crtc->vScreen = sm750_dev->pvMem + crtc->oScreen; } break; case sm750_dual_swap: @@ -758,13 +700,13 @@ static int sm750fb_set_drv(struct lynxfb_par *par) output->paths = sm750_panel; crtc->channel = sm750_secondary; crtc->oScreen = 0; - crtc->vScreen = share->pvMem; + crtc->vScreen = sm750_dev->pvMem; } else { output->paths = sm750_crt; crtc->channel = sm750_primary; /* not consider of padding stuffs for oScreen,need fix */ - crtc->oScreen = (share->vidmem_size >> 1); - crtc->vScreen = share->pvMem + crtc->oScreen; + crtc->oScreen = (sm750_dev->vidmem_size >> 1); + crtc->vScreen = sm750_dev->pvMem + crtc->oScreen; } break; default: @@ -787,12 +729,11 @@ static struct fb_ops lynxfb_ops = { .fb_cursor = lynxfb_ops_cursor, }; - static int lynxfb_set_fbinfo(struct fb_info *info, int index) { int i; struct lynxfb_par *par; - struct lynx_share *share; + struct sm750_dev *sm750_dev; struct lynxfb_crtc *crtc; struct lynxfb_output *output; struct fb_var_screeninfo *var; @@ -808,7 +749,6 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) "kernel HELPERS prepared vesa_modes", }; - static const char *fixId[2] = { "sm750_fb1", "sm750_fb2", }; @@ -817,7 +757,7 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) ret = 0; par = (struct lynxfb_par *)info->par; - share = par->share; + sm750_dev = par->dev; crtc = &par->crtc; output = &par->output; var = &info->var; @@ -829,34 +769,27 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) sm750fb_set_drv(par); lynxfb_ops.fb_pan_display = lynxfb_ops_pan_display; - - /* set current cursor variable and proc pointer, - * must be set after crtc member initialized */ + /* + * set current cursor variable and proc pointer, + * must be set after crtc member initialized + */ crtc->cursor.offset = crtc->oScreen + crtc->vidmem_size - 1024; - crtc->cursor.mmio = share->pvReg + 0x800f0 + (int)crtc->channel * 0x140; + crtc->cursor.mmio = sm750_dev->pvReg + + 0x800f0 + (int)crtc->channel * 0x140; pr_info("crtc->cursor.mmio = %p\n", crtc->cursor.mmio); crtc->cursor.maxH = crtc->cursor.maxW = 64; - crtc->cursor.size = crtc->cursor.maxH*crtc->cursor.maxW*2/8; - crtc->cursor.disable = hw_cursor_disable; - crtc->cursor.enable = hw_cursor_enable; - crtc->cursor.setColor = hw_cursor_setColor; - crtc->cursor.setPos = hw_cursor_setPos; - crtc->cursor.setSize = hw_cursor_setSize; - crtc->cursor.setData = hw_cursor_setData; - crtc->cursor.vstart = share->pvMem + crtc->cursor.offset; - - - crtc->cursor.share = share; - memset_io(crtc->cursor.vstart, 0, crtc->cursor.size); + crtc->cursor.size = crtc->cursor.maxH * crtc->cursor.maxW * 2 / 8; + crtc->cursor.vstart = sm750_dev->pvMem + crtc->cursor.offset; + + memset_io(crtc->cursor.vstart, 0, crtc->cursor.size); if (!g_hwcursor) { lynxfb_ops.fb_cursor = NULL; - crtc->cursor.disable(&crtc->cursor); + hw_cursor_disable(&crtc->cursor); } - /* set info->fbops, must be set before fb_find_mode */ - if (!share->accel_off) { + if (!sm750_dev->accel_off) { /* use 2d acceleration */ lynxfb_ops.fb_fillrect = lynxfb_ops_fillrect; lynxfb_ops.fb_copyarea = lynxfb_ops_copyarea; @@ -870,7 +803,6 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) g_fbmode[index] = g_fbmode[0]; } - for (i = 0; i < 3; i++) { ret = fb_find_mode(var, info, g_fbmode[index], @@ -921,14 +853,14 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) par->info = info; /* set info */ - line_length = PADDING(crtc->line_pad, - (var->xres_virtual * var->bits_per_pixel/8)); + line_length = ALIGN((var->xres_virtual * var->bits_per_pixel / 8), + crtc->line_pad); info->pseudo_palette = &par->pseudo_palette[0]; info->screen_base = crtc->vScreen; pr_debug("screen_base vaddr = %p\n", info->screen_base); info->screen_size = line_length * var->yres_virtual; - info->flags = FBINFO_FLAG_DEFAULT|0; + info->flags = FBINFO_FLAG_DEFAULT | 0; /* set info->fix */ fix->type = FB_TYPE_PACKED_PIXELS; @@ -940,22 +872,22 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) strlcpy(fix->id, fixId[index], sizeof(fix->id)); - - fix->smem_start = crtc->oScreen + share->vidmem_start; + fix->smem_start = crtc->oScreen + sm750_dev->vidmem_start; pr_info("fix->smem_start = %lx\n", fix->smem_start); - /* according to mmap experiment from user space application, + /* + * according to mmap experiment from user space application, * fix->mmio_len should not larger than virtual size * (xres_virtual x yres_virtual x ByPP) * Below line maybe buggy when user mmap fb dev node and write * data into the bound over virtual size - * */ + */ fix->smem_len = crtc->vidmem_size; pr_info("fix->smem_len = %x\n", fix->smem_len); info->screen_size = fix->smem_len; fix->line_length = line_length; - fix->mmio_start = share->vidreg_start; + fix->mmio_start = sm750_dev->vidreg_start; pr_info("fix->mmio_start = %lx\n", fix->mmio_start); - fix->mmio_len = share->vidreg_size; + fix->mmio_len = sm750_dev->vidreg_size; pr_info("fix->mmio_len = %x\n", fix->mmio_len); switch (var->bits_per_pixel) { case 8: @@ -972,14 +904,14 @@ static int lynxfb_set_fbinfo(struct fb_info *info, int index) var->accel_flags = 0; var->vmode = FB_VMODE_NONINTERLACED; - pr_debug("#1 show info->cmap : \nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n", + pr_debug("#1 show info->cmap :\nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n", info->cmap.start, info->cmap.len, info->cmap.red, info->cmap.green, info->cmap.blue, info->cmap.transp); ret = fb_alloc_cmap(&info->cmap, 256, 0); if (ret < 0) { - pr_err("Could not allcate memory for cmap.\n"); + pr_err("Could not allocate memory for cmap.\n"); goto exit; } @@ -994,28 +926,19 @@ exit: } /* chip specific g_option configuration routine */ -static void sm750fb_setup(struct lynx_share *share, char *src) +static void sm750fb_setup(struct sm750_dev *sm750_dev, char *src) { - struct sm750_share *spec_share; char *opt; -#ifdef CAP_EXPENSION - char *exp_res; -#endif int swap; - - spec_share = container_of(share, struct sm750_share, share); -#ifdef CAP_EXPENSIION - exp_res = NULL; -#endif swap = 0; - spec_share->state.initParm.chip_clk = 0; - spec_share->state.initParm.mem_clk = 0; - spec_share->state.initParm.master_clk = 0; - spec_share->state.initParm.powerMode = 0; - spec_share->state.initParm.setAllEngOff = 0; - spec_share->state.initParm.resetMemory = 1; + sm750_dev->initParm.chip_clk = 0; + sm750_dev->initParm.mem_clk = 0; + sm750_dev->initParm.master_clk = 0; + sm750_dev->initParm.powerMode = 0; + sm750_dev->initParm.setAllEngOff = 0; + sm750_dev->initParm.resetMemory = 1; /* defaultly turn g_hwcursor on for both view */ g_hwcursor = 3; @@ -1026,23 +949,19 @@ static void sm750fb_setup(struct lynx_share *share, char *src) } while ((opt = strsep(&src, ":")) != NULL && *opt != 0) { - pr_err("opt=%s\n", opt); - pr_err("src=%s\n", src); + pr_info("opt=%s\n", opt); + pr_info("src=%s\n", src); if (!strncmp(opt, "swap", strlen("swap"))) swap = 1; else if (!strncmp(opt, "nocrt", strlen("nocrt"))) - spec_share->state.nocrt = 1; + sm750_dev->nocrt = 1; else if (!strncmp(opt, "36bit", strlen("36bit"))) - spec_share->state.pnltype = sm750_doubleTFT; + sm750_dev->pnltype = sm750_doubleTFT; else if (!strncmp(opt, "18bit", strlen("18bit"))) - spec_share->state.pnltype = sm750_dualTFT; + sm750_dev->pnltype = sm750_dualTFT; else if (!strncmp(opt, "24bit", strlen("24bit"))) - spec_share->state.pnltype = sm750_24TFT; -#ifdef CAP_EXPANSION - else if (!strncmp(opt, "exp:", strlen("exp:"))) - exp_res = opt + strlen("exp:"); -#endif + sm750_dev->pnltype = sm750_24TFT; else if (!strncmp(opt, "nohwc0", strlen("nohwc0"))) g_hwcursor &= ~0x1; else if (!strncmp(opt, "nohwc1", strlen("nohwc1"))) @@ -1061,128 +980,97 @@ static void sm750fb_setup(struct lynx_share *share, char *src) } } } -#ifdef CAP_EXPANSION - if (getExpRes(exp_res, - &spec_share->state.xLCD, - &spec_share->state.yLCD)) { - /* seems exp_res is not valid */ - spec_share->state.xLCD = spec_share->state.yLCD = 0; - } -#endif NO_PARAM: - if (share->revid != SM750LE_REVISION_ID) { - if (share->dual) { + if (sm750_dev->revid != SM750LE_REVISION_ID) { + if (sm750_dev->dual) { if (swap) - spec_share->state.dataflow = sm750_dual_swap; + sm750_dev->dataflow = sm750_dual_swap; else - spec_share->state.dataflow = sm750_dual_normal; + sm750_dev->dataflow = sm750_dual_normal; } else { if (swap) - spec_share->state.dataflow = sm750_simul_sec; + sm750_dev->dataflow = sm750_simul_sec; else - spec_share->state.dataflow = sm750_simul_pri; + sm750_dev->dataflow = sm750_simul_pri; } } else { /* SM750LE only have one crt channel */ - spec_share->state.dataflow = sm750_simul_sec; + sm750_dev->dataflow = sm750_simul_sec; /* sm750le do not have complex attributes */ - spec_share->state.nocrt = 0; + sm750_dev->nocrt = 0; } } static int lynxfb_pci_probe(struct pci_dev *pdev, - const struct pci_device_id * ent) + const struct pci_device_id *ent) { struct fb_info *info[] = {NULL, NULL}; - struct lynx_share *share = NULL; - - struct sm750_share *spec_share = NULL; - size_t spec_offset = 0; + struct sm750_dev *sm750_dev = NULL; int fbidx; - /* enable device */ if (pci_enable_device(pdev)) { pr_err("can not enable device.\n"); goto err_enable; } - /* though offset of share in sm750_share is 0, - * we use this marcro as the same */ - spec_offset = offsetof(struct sm750_share, share); - - spec_share = kzalloc(sizeof(*spec_share), GFP_KERNEL); - if (!spec_share) { + sm750_dev = kzalloc(sizeof(*sm750_dev), GFP_KERNEL); + if (!sm750_dev) { pr_err("Could not allocate memory for share.\n"); goto err_share; } - /* setting share structure */ - share = (struct lynx_share *)(&(spec_share->share)); - share->fbinfo[0] = share->fbinfo[1] = NULL; - share->devid = pdev->device; - share->revid = pdev->revision; - - pr_info("share->revid = %02x\n", share->revid); - share->pdev = pdev; -#ifdef CONFIG_MTRR - share->mtrr_off = g_nomtrr; - share->mtrr.vram = 0; - share->mtrr.vram_added = 0; -#endif - share->accel_off = g_noaccel; - share->dual = g_dualview; - spin_lock_init(&share->slock); - - if (!share->accel_off) { - /* hook deInit and 2d routines, notes that below hw_xxx + sm750_dev->fbinfo[0] = sm750_dev->fbinfo[1] = NULL; + sm750_dev->devid = pdev->device; + sm750_dev->revid = pdev->revision; + + pr_info("share->revid = %02x\n", sm750_dev->revid); + sm750_dev->pdev = pdev; + sm750_dev->mtrr_off = g_nomtrr; + sm750_dev->mtrr.vram = 0; + sm750_dev->accel_off = g_noaccel; + sm750_dev->dual = g_dualview; + spin_lock_init(&sm750_dev->slock); + + if (!sm750_dev->accel_off) { + /* + * hook deInit and 2d routines, notes that below hw_xxx * routine can work on most of lynx chips * if some chip need specific function, - * please hook it in smXXX_set_drv routine */ - share->accel.de_init = hw_de_init; - share->accel.de_fillrect = hw_fillrect; - share->accel.de_copyarea = hw_copyarea; - share->accel.de_imageblit = hw_imageblit; + * please hook it in smXXX_set_drv routine + */ + sm750_dev->accel.de_init = hw_de_init; + sm750_dev->accel.de_fillrect = hw_fillrect; + sm750_dev->accel.de_copyarea = hw_copyarea; + sm750_dev->accel.de_imageblit = hw_imageblit; pr_info("enable 2d acceleration\n"); } else { pr_info("disable 2d acceleration\n"); } /* call chip specific setup routine */ - sm750fb_setup(share, g_settings); + sm750fb_setup(sm750_dev, g_settings); /* call chip specific mmap routine */ - if (hw_sm750_map(share, pdev)) { + if (hw_sm750_map(sm750_dev, pdev)) { pr_err("Memory map failed\n"); goto err_map; } -#ifdef CONFIG_MTRR - if (!share->mtrr_off) { - pr_info("enable mtrr\n"); - share->mtrr.vram = mtrr_add(share->vidmem_start, - share->vidmem_size, - MTRR_TYPE_WRCOMB, 1); + if (!sm750_dev->mtrr_off) + sm750_dev->mtrr.vram = arch_phys_wc_add(sm750_dev->vidmem_start, + sm750_dev->vidmem_size); - if (share->mtrr.vram < 0) { - /* don't block driver with the failure of MTRR */ - pr_err("Unable to setup MTRR.\n"); - } else { - share->mtrr.vram_added = 1; - pr_info("MTRR added succesfully\n"); - } - } -#endif + memset_io(sm750_dev->pvMem, 0, sm750_dev->vidmem_size); - memset_io(share->pvMem, 0, share->vidmem_size); + pr_info("sm%3x mmio address = %p\n", sm750_dev->devid, + sm750_dev->pvReg); - pr_info("sm%3x mmio address = %p\n", share->devid, share->pvReg); - - pci_set_drvdata(pdev, share); + pci_set_drvdata(pdev, sm750_dev); /* call chipInit routine */ - hw_sm750_inithw(share, pdev); + hw_sm750_inithw(sm750_dev, pdev); /* allocate frame buffer info structor according to g_dualview */ fbidx = 0; @@ -1199,9 +1087,9 @@ ALLOC_FB: int errno; pr_info("framebuffer #%d alloc okay\n", fbidx); - share->fbinfo[fbidx] = info[fbidx]; + sm750_dev->fbinfo[fbidx] = info[fbidx]; par = info[fbidx]->par; - par->share = share; + par->dev = sm750_dev; /* set fb_info structure */ if (lynxfb_set_fbinfo(info[fbidx], fbidx)) { @@ -1229,7 +1117,7 @@ ALLOC_FB: /* no dual view by far */ fbidx++; - if (share->dual && fbidx < 2) + if (sm750_dev->dual && fbidx < 2) goto ALLOC_FB; return 0; @@ -1244,7 +1132,7 @@ err_info0_set: framebuffer_release(info[0]); err_info0_alloc: err_map: - kfree(spec_share); + kfree(sm750_dev); err_share: err_enable: return -ENODEV; @@ -1253,39 +1141,29 @@ err_enable: static void lynxfb_pci_remove(struct pci_dev *pdev) { struct fb_info *info; - struct lynx_share *share; - void *spec_share; + struct sm750_dev *sm750_dev; struct lynxfb_par *par; int cnt; cnt = 2; - share = pci_get_drvdata(pdev); + sm750_dev = pci_get_drvdata(pdev); while (cnt-- > 0) { - info = share->fbinfo[cnt]; + info = sm750_dev->fbinfo[cnt]; if (!info) continue; par = info->par; unregister_framebuffer(info); - /* clean crtc & output allocations */ - par->crtc.clear(&par->crtc); - par->output.clear(&par->output); /* release frame buffer */ framebuffer_release(info); } -#ifdef CONFIG_MTRR - if (share->mtrr.vram_added) - mtrr_del(share->mtrr.vram, - share->vidmem_start, - share->vidmem_size); -#endif + arch_phys_wc_del(sm750_dev->mtrr.vram); - iounmap(share->pvReg); - iounmap(share->pvMem); - spec_share = container_of(share, struct sm750_share, share); + iounmap(sm750_dev->pvReg); + iounmap(sm750_dev->pvMem); kfree(g_settings); - kfree(spec_share); + kfree(sm750_dev); pci_set_drvdata(pdev, NULL); } @@ -1294,7 +1172,6 @@ static int __init lynxfb_setup(char *options) int len; char *opt, *tmp; - if (!options || !*options) { pr_warn("no options.\n"); return 0; @@ -1309,22 +1186,21 @@ static int __init lynxfb_setup(char *options) tmp = g_settings; - /* Notes: - char * strsep(char **s,const char * ct); - @s: the string to be searched - @ct :the characters to search for - - strsep() updates @options to pointer after the first found token - it also returns the pointer ahead the token. - */ + /* + * Notes: + * char * strsep(char **s,const char * ct); + * @s: the string to be searched + * @ct :the characters to search for + * + * strsep() updates @options to pointer after the first found token + * it also returns the pointer ahead the token. + */ while ((opt = strsep(&options, ":")) != NULL) { /* options that mean for any lynx chips are configured here */ if (!strncmp(opt, "noaccel", strlen("noaccel"))) g_noaccel = 1; -#ifdef CONFIG_MTRR else if (!strncmp(opt, "nomtrr", strlen("nomtrr"))) g_nomtrr = 1; -#endif else if (!strncmp(opt, "dual", strlen("dual"))) g_dualview = 1; else { @@ -1360,7 +1236,6 @@ static struct pci_driver lynxfb_driver = { #endif }; - static int __init lynxfb_init(void) { char *option; diff --git a/kernel/drivers/staging/sm750fb/sm750.h b/kernel/drivers/staging/sm750fb/sm750.h index 0847d2bd9..b0a93cdc7 100644 --- a/kernel/drivers/staging/sm750fb/sm750.h +++ b/kernel/drivers/staging/sm750fb/sm750.h @@ -1,78 +1,114 @@ #ifndef LYNXDRV_H_ #define LYNXDRV_H_ +#define FB_ACCEL_SMI 0xab +#define MHZ(x) ((x) * 1000000) -#define FB_ACCEL_SMI 0xab -/* please use revision id to distinguish sm750le and sm750*/ -#define SPC_SM750 0 +#define DEFAULT_SM750_CHIP_CLOCK 290 +#define DEFAULT_SM750LE_CHIP_CLOCK 333 +#ifndef SM750LE_REVISION_ID +#define SM750LE_REVISION_ID ((unsigned char)0xfe) +#endif + +enum sm750_pnltype { + sm750_24TFT = 0, /* 24bit tft */ + sm750_dualTFT = 2, /* dual 18 bit tft */ + sm750_doubleTFT = 1, /* 36 bit double pixel tft */ +}; -//#define SPC_SM750LE 8 +/* vga channel is not concerned */ +enum sm750_dataflow { + sm750_simul_pri, /* primary => all head */ + sm750_simul_sec, /* secondary => all head */ + sm750_dual_normal, /* primary => panel head and secondary => crt */ + sm750_dual_swap, /* primary => crt head and secondary => panel */ +}; -#define MB(x) ((x)<<20) -#define MHZ(x) ((x) * 1000000) -/* align should be 2,4,8,16 */ -#define PADDING(align,data) (((data)+(align)-1)&(~((align) -1))) -extern int smi_indent; +enum sm750_channel { + sm750_primary = 0, + /* enum value equal to the register filed data */ + sm750_secondary = 1, +}; + +enum sm750_path { + sm750_panel = 1, + sm750_crt = 2, + sm750_pnc = 3, /* panel and crt */ +}; +struct init_status { + ushort powerMode; + /* below three clocks are in unit of MHZ*/ + ushort chip_clk; + ushort mem_clk; + ushort master_clk; + ushort setAllEngOff; + ushort resetMemory; +}; -struct lynx_accel{ +struct lynx_accel { /* base virtual address of DPR registers */ - volatile unsigned char __iomem * dprBase; + volatile unsigned char __iomem *dprBase; /* base virtual address of de data port */ - volatile unsigned char __iomem * dpPortBase; + volatile unsigned char __iomem *dpPortBase; /* function fointers */ void (*de_init)(struct lynx_accel *); int (*de_wait)(void);/* see if hardware ready to work */ - int (*de_fillrect)(struct lynx_accel *,u32,u32,u32, - u32,u32,u32,u32,u32,u32); + int (*de_fillrect)(struct lynx_accel *, u32, u32, u32, u32, + u32, u32, u32, u32, u32); - int (*de_copyarea)(struct lynx_accel *,u32,u32,u32,u32, - u32,u32,u32,u32, - u32,u32,u32,u32); + int (*de_copyarea)(struct lynx_accel *, u32, u32, u32, u32, + u32, u32, u32, u32, + u32, u32, u32, u32); - int (*de_imageblit)(struct lynx_accel *,const char *,u32,u32,u32, - u32,u32,u32,u32,u32,u32,u32,u32,u32); + int (*de_imageblit)(struct lynx_accel *, const char *, u32, u32, u32, u32, + u32, u32, u32, u32, + u32, u32, u32, u32); }; -/* lynx_share stands for a presentation of two frame buffer - that use one smi adaptor , it is similar to a basic class of C++ -*/ -struct lynx_share{ +struct sm750_dev { /* common members */ u16 devid; u8 revid; - struct pci_dev * pdev; - struct fb_info * fbinfo[2]; + struct pci_dev *pdev; + struct fb_info *fbinfo[2]; struct lynx_accel accel; int accel_off; int dual; -#ifdef CONFIG_MTRR - int mtrr_off; - struct{ - int vram; - int vram_added; - }mtrr; -#endif + int mtrr_off; + struct{ + int vram; + } mtrr; /* all smi graphic adaptor got below attributes */ unsigned long vidmem_start; unsigned long vidreg_start; __u32 vidmem_size; __u32 vidreg_size; - void __iomem * pvReg; - unsigned char __iomem * pvMem; + void __iomem *pvReg; + unsigned char __iomem *pvMem; /* locks*/ spinlock_t slock; - /* function pointers */ - void (*suspend)(struct lynx_share*); - void (*resume)(struct lynx_share*); + + struct init_status initParm; + enum sm750_pnltype pnltype; + enum sm750_dataflow dataflow; + int nocrt; + + /* + * 0: no hardware cursor + * 1: primary crtc hw cursor enabled, + * 2: secondary crtc hw cursor enabled + * 3: both ctrc hw cursor enabled + */ + int hwCursor; }; -struct lynx_cursor{ +struct lynx_cursor { /* cursor width ,height and size */ int w; int h; @@ -81,26 +117,17 @@ struct lynx_cursor{ int maxW; int maxH; /* base virtual address and offset of cursor image */ - char __iomem * vstart; + char __iomem *vstart; int offset; /* mmio addr of hw cursor */ - volatile char __iomem * mmio; - /* the lynx_share of this adaptor */ - struct lynx_share * share; - /* proc_routines */ - void (*enable)(struct lynx_cursor *); - void (*disable)(struct lynx_cursor *); - void (*setSize)(struct lynx_cursor *,int,int); - void (*setPos)(struct lynx_cursor *,int,int); - void (*setColor)(struct lynx_cursor *,u32,u32); - void (*setData)(struct lynx_cursor *,u16,const u8*,const u8*); + volatile char __iomem *mmio; }; -struct lynxfb_crtc{ - unsigned char __iomem * vCursor;//virtual address of cursor - unsigned char __iomem * vScreen;//virtual address of on_screen - int oCursor;//cursor address offset in vidmem - int oScreen;//onscreen address offset in vidmem +struct lynxfb_crtc { + unsigned char __iomem *vCursor; /* virtual address of cursor */ + unsigned char __iomem *vScreen; /* virtual address of on_screen */ + int oCursor; /* cursor address offset in vidmem */ + int oScreen; /* onscreen address offset in vidmem */ int channel;/* which channel this crtc stands for*/ resource_size_t vidmem_size;/* this view's video memory max size */ @@ -110,77 +137,66 @@ struct lynxfb_crtc{ u16 ypanstep; u16 ywrapstep; - void * priv; - - int(*proc_setMode)(struct lynxfb_crtc*, - struct fb_var_screeninfo*, - struct fb_fix_screeninfo*); + void *priv; - int(*proc_checkMode)(struct lynxfb_crtc*,struct fb_var_screeninfo*); - int(*proc_setColReg)(struct lynxfb_crtc*,ushort,ushort,ushort,ushort); - void (*clear)(struct lynxfb_crtc*); - /* pan display */ - int (*proc_panDisplay)(struct lynxfb_crtc *, - const struct fb_var_screeninfo *, - const struct fb_info *); /* cursor information */ struct lynx_cursor cursor; }; -struct lynxfb_output{ +struct lynxfb_output { int dpms; int paths; - /* which paths(s) this output stands for,for sm750: - paths=1:means output for panel paths - paths=2:means output for crt paths - paths=3:means output for both panel and crt paths + /* which paths(s) this output stands for,for sm750: + paths=1:means output for panel paths + paths=2:means output for crt paths + paths=3:means output for both panel and crt paths */ - int * channel; - /* which channel these outputs linked with,for sm750: - *channel=0 means primary channel - *channel=1 means secondary channel - output->channel ==> &crtc->channel + int *channel; + /* which channel these outputs linked with,for sm750: + *channel=0 means primary channel + *channel=1 means secondary channel + output->channel ==> &crtc->channel */ - void * priv; + void *priv; - int(*proc_setMode)(struct lynxfb_output*, - struct fb_var_screeninfo*, - struct fb_fix_screeninfo*); - - int(*proc_checkMode)(struct lynxfb_output*,struct fb_var_screeninfo*); - int(*proc_setBLANK)(struct lynxfb_output*,int); - void (*clear)(struct lynxfb_output*); + int (*proc_setBLANK)(struct lynxfb_output*, int); }; -struct lynxfb_par{ +struct lynxfb_par { /* either 0 or 1 for dual head adaptor,0 is the older one registered */ int index; unsigned int pseudo_palette[256]; struct lynxfb_crtc crtc; struct lynxfb_output output; - struct fb_info * info; - struct lynx_share * share; + struct fb_info *info; + struct sm750_dev *dev; }; -#ifndef offsetof -#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) -#endif - - -#define PS_TO_HZ(ps) \ - ({ \ - unsigned long long hz = 1000*1000*1000*1000ULL; \ - do_div(hz,ps); \ - (unsigned long)hz;}) - static inline unsigned long ps_to_hz(unsigned int psvalue) { - unsigned long long numerator=1000*1000*1000*1000ULL; + unsigned long long numerator = 1000*1000*1000*1000ULL; /* 10^12 / picosecond period gives frequency in Hz */ do_div(numerator, psvalue); return (unsigned long)numerator; } +int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev); +int hw_sm750_inithw(struct sm750_dev*, struct pci_dev *); +void hw_sm750_initAccel(struct sm750_dev *); +int hw_sm750_deWait(void); +int hw_sm750le_deWait(void); + +int hw_sm750_output_setMode(struct lynxfb_output*, struct fb_var_screeninfo*, + struct fb_fix_screeninfo*); +int hw_sm750_crtc_checkMode(struct lynxfb_crtc*, struct fb_var_screeninfo*); +int hw_sm750_crtc_setMode(struct lynxfb_crtc*, struct fb_var_screeninfo*, + struct fb_fix_screeninfo*); +int hw_sm750_setColReg(struct lynxfb_crtc*, ushort, ushort, ushort, ushort); +int hw_sm750_setBLANK(struct lynxfb_output*, int); +int hw_sm750le_setBLANK(struct lynxfb_output*, int); +int hw_sm750_pan_display(struct lynxfb_crtc *crtc, + const struct fb_var_screeninfo *var, + const struct fb_info *info); #endif diff --git a/kernel/drivers/staging/sm750fb/sm750_accel.c b/kernel/drivers/staging/sm750fb/sm750_accel.c index c5a372690..43e597259 100644 --- a/kernel/drivers/staging/sm750fb/sm750_accel.c +++ b/kernel/drivers/staging/sm750fb/sm750_accel.c @@ -1,143 +1,142 @@ -#include<linux/module.h> -#include<linux/kernel.h> -#include<linux/errno.h> -#include<linux/string.h> -#include<linux/mm.h> -#include<linux/slab.h> -#include<linux/delay.h> -#include<linux/fb.h> -#include<linux/ioport.h> -#include<linux/init.h> -#include<linux/pci.h> -#include<linux/vmalloc.h> -#include<linux/pagemap.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/ioport.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/vmalloc.h> +#include <linux/pagemap.h> #include <linux/console.h> -#include<linux/platform_device.h> -#include<linux/screen_info.h> +#include <linux/platform_device.h> +#include <linux/screen_info.h> #include "sm750.h" #include "sm750_accel.h" #include "sm750_help.h" -static inline void write_dpr(struct lynx_accel * accel,int offset,u32 regValue) +static inline void write_dpr(struct lynx_accel *accel, int offset, u32 regValue) { - writel(regValue,accel->dprBase + offset); + writel(regValue, accel->dprBase + offset); } -static inline u32 read_dpr(struct lynx_accel * accel,int offset) +static inline u32 read_dpr(struct lynx_accel *accel, int offset) { return readl(accel->dprBase + offset); } -static inline void write_dpPort(struct lynx_accel * accel,u32 data) +static inline void write_dpPort(struct lynx_accel *accel, u32 data) { - writel(data,accel->dpPortBase); + writel(data, accel->dpPortBase); } -void hw_de_init(struct lynx_accel * accel) +void hw_de_init(struct lynx_accel *accel) { /* setup 2d engine registers */ - u32 reg,clr; - - write_dpr(accel,DE_MASKS,0xFFFFFFFF); + u32 reg, clr; + + write_dpr(accel, DE_MASKS, 0xFFFFFFFF); /* dpr1c */ - reg = FIELD_SET(0,DE_STRETCH_FORMAT,PATTERN_XY,NORMAL)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_Y,0)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_X,0)| - FIELD_SET(0,DE_STRETCH_FORMAT,ADDRESSING,XY)| - FIELD_VALUE(0,DE_STRETCH_FORMAT,SOURCE_HEIGHT,3); - - clr = FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_XY)& - FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_Y)& - FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_X)& - FIELD_CLEAR(DE_STRETCH_FORMAT,ADDRESSING)& - FIELD_CLEAR(DE_STRETCH_FORMAT,SOURCE_HEIGHT); + reg = FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY, NORMAL)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_Y, 0)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X, 0)| + FIELD_SET(0, DE_STRETCH_FORMAT, ADDRESSING, XY)| + FIELD_VALUE(0, DE_STRETCH_FORMAT, SOURCE_HEIGHT, 3); + + clr = FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_XY)& + FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_Y)& + FIELD_CLEAR(DE_STRETCH_FORMAT, PATTERN_X)& + FIELD_CLEAR(DE_STRETCH_FORMAT, ADDRESSING)& + FIELD_CLEAR(DE_STRETCH_FORMAT, SOURCE_HEIGHT); /* DE_STRETCH bpp format need be initilized in setMode routine */ - write_dpr(accel,DE_STRETCH_FORMAT,(read_dpr(accel,DE_STRETCH_FORMAT) & clr) | reg); + write_dpr(accel, DE_STRETCH_FORMAT, (read_dpr(accel, DE_STRETCH_FORMAT) & clr) | reg); /* disable clipping and transparent */ - write_dpr(accel,DE_CLIP_TL,0);//dpr2c - write_dpr(accel,DE_CLIP_BR,0);//dpr30 + write_dpr(accel, DE_CLIP_TL, 0); /* dpr2c */ + write_dpr(accel, DE_CLIP_BR, 0); /* dpr30 */ - write_dpr(accel,DE_COLOR_COMPARE_MASK,0);//dpr24 - write_dpr(accel,DE_COLOR_COMPARE,0); + write_dpr(accel, DE_COLOR_COMPARE_MASK, 0); /* dpr24 */ + write_dpr(accel, DE_COLOR_COMPARE, 0); - reg = FIELD_SET(0,DE_CONTROL,TRANSPARENCY,DISABLE)| - FIELD_SET(0,DE_CONTROL,TRANSPARENCY_MATCH,OPAQUE)| - FIELD_SET(0,DE_CONTROL,TRANSPARENCY_SELECT,SOURCE); + reg = FIELD_SET(0, DE_CONTROL, TRANSPARENCY, DISABLE)| + FIELD_SET(0, DE_CONTROL, TRANSPARENCY_MATCH, OPAQUE)| + FIELD_SET(0, DE_CONTROL, TRANSPARENCY_SELECT, SOURCE); - clr = FIELD_CLEAR(DE_CONTROL,TRANSPARENCY)& - FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_MATCH)& - FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_SELECT); + clr = FIELD_CLEAR(DE_CONTROL, TRANSPARENCY)& + FIELD_CLEAR(DE_CONTROL, TRANSPARENCY_MATCH)& + FIELD_CLEAR(DE_CONTROL, TRANSPARENCY_SELECT); /* dpr0c */ - write_dpr(accel,DE_CONTROL,(read_dpr(accel,DE_CONTROL)&clr)|reg); + write_dpr(accel, DE_CONTROL, (read_dpr(accel, DE_CONTROL)&clr)|reg); } /* set2dformat only be called from setmode functions * but if you need dual framebuffer driver,need call set2dformat * every time you use 2d function */ -void hw_set2dformat(struct lynx_accel * accel,int fmt) +void hw_set2dformat(struct lynx_accel *accel, int fmt) { u32 reg; - + /* fmt=0,1,2 for 8,16,32,bpp on sm718/750/502 */ - reg = read_dpr(accel,DE_STRETCH_FORMAT); - reg = FIELD_VALUE(reg,DE_STRETCH_FORMAT,PIXEL_FORMAT,fmt); - write_dpr(accel,DE_STRETCH_FORMAT,reg); + reg = read_dpr(accel, DE_STRETCH_FORMAT); + reg = FIELD_VALUE(reg, DE_STRETCH_FORMAT, PIXEL_FORMAT, fmt); + write_dpr(accel, DE_STRETCH_FORMAT, reg); } -int hw_fillrect(struct lynx_accel * accel, - u32 base,u32 pitch,u32 Bpp, - u32 x,u32 y,u32 width,u32 height, - u32 color,u32 rop) +int hw_fillrect(struct lynx_accel *accel, + u32 base, u32 pitch, u32 Bpp, + u32 x, u32 y, u32 width, u32 height, + u32 color, u32 rop) { u32 deCtrl; - if(accel->de_wait() != 0) - { + if (accel->de_wait() != 0) { /* int time wait and always busy,seems hardware * got something error */ - pr_debug("%s:De engine always bussy\n",__func__); + pr_debug("De engine always busy\n"); return -1; } - write_dpr(accel,DE_WINDOW_DESTINATION_BASE,base);//dpr40 - write_dpr(accel,DE_PITCH, - FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch/Bpp)| - FIELD_VALUE(0,DE_PITCH,SOURCE,pitch/Bpp));//dpr10 + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, base); /* dpr40 */ + write_dpr(accel, DE_PITCH, + FIELD_VALUE(0, DE_PITCH, DESTINATION, pitch/Bpp)| + FIELD_VALUE(0, DE_PITCH, SOURCE, pitch/Bpp)); /* dpr10 */ - write_dpr(accel,DE_WINDOW_WIDTH, - FIELD_VALUE(0,DE_WINDOW_WIDTH,DESTINATION,pitch/Bpp)| - FIELD_VALUE(0,DE_WINDOW_WIDTH,SOURCE,pitch/Bpp));//dpr44 + write_dpr(accel, DE_WINDOW_WIDTH, + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, pitch/Bpp)| + FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, pitch/Bpp)); /* dpr44 */ - write_dpr(accel,DE_FOREGROUND,color);//DPR14 + write_dpr(accel, DE_FOREGROUND, color); /* DPR14 */ - write_dpr(accel,DE_DESTINATION, - FIELD_SET(0,DE_DESTINATION,WRAP,DISABLE)| - FIELD_VALUE(0,DE_DESTINATION,X,x)| - FIELD_VALUE(0,DE_DESTINATION,Y,y));//dpr4 + write_dpr(accel, DE_DESTINATION, + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE)| + FIELD_VALUE(0, DE_DESTINATION, X, x)| + FIELD_VALUE(0, DE_DESTINATION, Y, y)); /* dpr4 */ - write_dpr(accel,DE_DIMENSION, - FIELD_VALUE(0,DE_DIMENSION,X,width)| - FIELD_VALUE(0,DE_DIMENSION,Y_ET,height));//dpr8 + write_dpr(accel, DE_DIMENSION, + FIELD_VALUE(0, DE_DIMENSION, X, width)| + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr8 */ deCtrl = - FIELD_SET(0,DE_CONTROL,STATUS,START)| - FIELD_SET(0,DE_CONTROL,DIRECTION,LEFT_TO_RIGHT)| - FIELD_SET(0,DE_CONTROL,LAST_PIXEL,ON)| - FIELD_SET(0,DE_CONTROL,COMMAND,RECTANGLE_FILL)| - FIELD_SET(0,DE_CONTROL,ROP_SELECT,ROP2)| - FIELD_VALUE(0,DE_CONTROL,ROP,rop);//dpr0xc - - write_dpr(accel,DE_CONTROL,deCtrl); + FIELD_SET(0, DE_CONTROL, STATUS, START)| + FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)| + FIELD_SET(0, DE_CONTROL, LAST_PIXEL, ON)| + FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL)| + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2)| + FIELD_VALUE(0, DE_CONTROL, ROP, rop); /* dpr0xc */ + + write_dpr(accel, DE_CONTROL, deCtrl); return 0; } int hw_copyarea( -struct lynx_accel * accel, +struct lynx_accel *accel, unsigned int sBase, /* Address of source: offset in frame buffer */ unsigned int sPitch, /* Pitch value of source surface in BYTE */ unsigned int sx, @@ -151,170 +150,149 @@ unsigned int width, unsigned int height, /* width and height of rectangle in pixel value */ unsigned int rop2) /* ROP value */ { - unsigned int nDirection, de_ctrl; - int opSign; - nDirection = LEFT_TO_RIGHT; + unsigned int nDirection, de_ctrl; + int opSign; + + nDirection = LEFT_TO_RIGHT; /* Direction of ROP2 operation: 1 = Left to Right, (-1) = Right to Left */ - opSign = 1; - de_ctrl = 0; - - /* If source and destination are the same surface, need to check for overlay cases */ - if (sBase == dBase && sPitch == dPitch) - { - /* Determine direction of operation */ - if (sy < dy) - { - /* +----------+ - |S | - | +----------+ - | | | | - | | | | - +---|------+ | - | D| - +----------+ */ - - nDirection = BOTTOM_TO_TOP; - } - else if (sy > dy) - { - /* +----------+ - |D | - | +----------+ - | | | | - | | | | - +---|------+ | - | S| - +----------+ */ - - nDirection = TOP_TO_BOTTOM; - } - else - { - /* sy == dy */ - - if (sx <= dx) - { - /* +------+---+------+ - |S | | D| - | | | | - | | | | - | | | | - +------+---+------+ */ - - nDirection = RIGHT_TO_LEFT; - } - else - { - /* sx > dx */ - - /* +------+---+------+ - |D | | S| - | | | | - | | | | - | | | | - +------+---+------+ */ - - nDirection = LEFT_TO_RIGHT; - } - } - } - - if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) - { - sx += width - 1; - sy += height - 1; - dx += width - 1; - dy += height - 1; - opSign = (-1); - } - - /* Note: - DE_FOREGROUND are DE_BACKGROUND are don't care. - DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS are set by set deSetTransparency(). - */ + opSign = 1; + de_ctrl = 0; + + /* If source and destination are the same surface, need to check for overlay cases */ + if (sBase == dBase && sPitch == dPitch) { + /* Determine direction of operation */ + if (sy < dy) { + /* +----------+ + |S | + | +----------+ + | | | | + | | | | + +---|------+ | + | D| + +----------+ */ + + nDirection = BOTTOM_TO_TOP; + } else if (sy > dy) { + /* +----------+ + |D | + | +----------+ + | | | | + | | | | + +---|------+ | + | S| + +----------+ */ + + nDirection = TOP_TO_BOTTOM; + } else { + /* sy == dy */ + + if (sx <= dx) { + /* +------+---+------+ + |S | | D| + | | | | + | | | | + | | | | + +------+---+------+ */ + + nDirection = RIGHT_TO_LEFT; + } else { + /* sx > dx */ + + /* +------+---+------+ + |D | | S| + | | | | + | | | | + | | | | + +------+---+------+ */ + + nDirection = LEFT_TO_RIGHT; + } + } + } - /* 2D Source Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. - */ - write_dpr(accel,DE_WINDOW_SOURCE_BASE, sBase);//dpr40 + if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) { + sx += width - 1; + sy += height - 1; + dx += width - 1; + dy += height - 1; + opSign = (-1); + } - /* 2D Destination Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. - */ - write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);//dpr44 + /* Note: + DE_FOREGROUND are DE_BACKGROUND are don't care. + DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS are set by set deSetTransparency(). + */ + + /* 2D Source Base. + It is an address offset (128 bit aligned) from the beginning of frame buffer. + */ + write_dpr(accel, DE_WINDOW_SOURCE_BASE, sBase); /* dpr40 */ + + /* 2D Destination Base. + It is an address offset (128 bit aligned) from the beginning of frame buffer. + */ + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* dpr44 */ -#if 0 /* Program pitch (distance between the 1st points of two adjacent lines). Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel convertion. + pixel values. Need Byte to pixel conversion. */ - if(Bpp == 3){ - sx *= 3; - dx *= 3; - width *= 3; - write_dpr(accel,DE_PITCH, - FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) | - FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch));//dpr10 - } - else -#endif { - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) | - FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp)));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp))); /* dpr10 */ } /* Screen Window width in Pixels. 2D engine uses this value to calculate the linear address in frame buffer for a given point. */ - write_dpr(accel,DE_WINDOW_WIDTH, - FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) | - FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp)));//dpr3c + write_dpr(accel, DE_WINDOW_WIDTH, + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) | + FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp))); /* dpr3c */ - if (accel->de_wait() != 0){ + if (accel->de_wait() != 0) return -1; + + { + + write_dpr(accel, DE_SOURCE, + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | + FIELD_VALUE(0, DE_SOURCE, X_K1, sx) | + FIELD_VALUE(0, DE_SOURCE, Y_K2, sy)); /* dpr0 */ + write_dpr(accel, DE_DESTINATION, + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | + FIELD_VALUE(0, DE_DESTINATION, X, dx) | + FIELD_VALUE(0, DE_DESTINATION, Y, dy)); /* dpr04 */ + write_dpr(accel, DE_DIMENSION, + FIELD_VALUE(0, DE_DIMENSION, X, width) | + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr08 */ + + de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | + FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | + FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) | + ((nDirection == RIGHT_TO_LEFT) ? + FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT) + : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) | + FIELD_SET(0, DE_CONTROL, STATUS, START); + write_dpr(accel, DE_CONTROL, de_ctrl); /* dpr0c */ + } - { - - write_dpr(accel,DE_SOURCE, - FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) | - FIELD_VALUE(0, DE_SOURCE, X_K1, sx) | - FIELD_VALUE(0, DE_SOURCE, Y_K2, sy));//dpr0 - write_dpr(accel,DE_DESTINATION, - FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) | - FIELD_VALUE(0, DE_DESTINATION, X, dx) | - FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04 - write_dpr(accel,DE_DIMENSION, - FIELD_VALUE(0, DE_DIMENSION, X, width) | - FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08 - - de_ctrl = - FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | - FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | - FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) | - ((nDirection == RIGHT_TO_LEFT) ? - FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT) - : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) | - FIELD_SET(0, DE_CONTROL, STATUS, START); - write_dpr(accel,DE_CONTROL,de_ctrl);//dpr0c - } - - return 0; + return 0; } -static unsigned int deGetTransparency(struct lynx_accel * accel) +static unsigned int deGetTransparency(struct lynx_accel *accel) { - unsigned int de_ctrl; + unsigned int de_ctrl; - de_ctrl = read_dpr(accel,DE_CONTROL); + de_ctrl = read_dpr(accel, DE_CONTROL); - de_ctrl &= - FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) | - FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT)| - FIELD_MASK(DE_CONTROL_TRANSPARENCY); + de_ctrl &= + FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) | + FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT)| + FIELD_MASK(DE_CONTROL_TRANSPARENCY); - return de_ctrl; + return de_ctrl; } int hw_imageblit(struct lynx_accel *accel, @@ -332,79 +310,64 @@ int hw_imageblit(struct lynx_accel *accel, u32 bColor, /* Background color (corresponding to a 0 in the monochrome data */ u32 rop2) /* ROP value */ { - unsigned int ulBytesPerScan; - unsigned int ul4BytesPerScan; - unsigned int ulBytesRemain; - unsigned int de_ctrl = 0; - unsigned char ajRemain[4]; - int i, j; - - startBit &= 7; /* Just make sure the start bit is within legal range */ - ulBytesPerScan = (width + startBit + 7) / 8; - ul4BytesPerScan = ulBytesPerScan & ~3; - ulBytesRemain = ulBytesPerScan & 3; - - if(accel->de_wait() != 0) - { -// inf_msg("*** ImageBlit return -1 ***\n"); - return -1; - } - - /* 2D Source Base. - Use 0 for HOST Blt. - */ - write_dpr(accel,DE_WINDOW_SOURCE_BASE, 0); + unsigned int ulBytesPerScan; + unsigned int ul4BytesPerScan; + unsigned int ulBytesRemain; + unsigned int de_ctrl = 0; + unsigned char ajRemain[4]; + int i, j; + + startBit &= 7; /* Just make sure the start bit is within legal range */ + ulBytesPerScan = (width + startBit + 7) / 8; + ul4BytesPerScan = ulBytesPerScan & ~3; + ulBytesRemain = ulBytesPerScan & 3; + + if (accel->de_wait() != 0) + return -1; - /* 2D Destination Base. - It is an address offset (128 bit aligned) from the beginning of frame buffer. - */ - write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase); -#if 0 + /* 2D Source Base. + Use 0 for HOST Blt. + */ + write_dpr(accel, DE_WINDOW_SOURCE_BASE, 0); + + /* 2D Destination Base. + It is an address offset (128 bit aligned) from the beginning of frame buffer. + */ + write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* Program pitch (distance between the 1st points of two adjacent lines). Note that input pitch is BYTE value, but the 2D Pitch register uses - pixel values. Need Byte to pixel convertion. + pixel values. Need Byte to pixel conversion. */ - if(bytePerPixel == 3 ){ - dx *= 3; - width *= 3; - startBit *= 3; - write_dpr(accel,DE_PITCH, - FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) | - FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch));//dpr10 - - } - else -#endif { - write_dpr(accel,DE_PITCH, + write_dpr(accel, DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) | - FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel));//dpr10 + FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel)); /* dpr10 */ } - /* Screen Window width in Pixels. - 2D engine uses this value to calculate the linear address in frame buffer for a given point. - */ - write_dpr(accel,DE_WINDOW_WIDTH, - FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) | - FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (dPitch/bytePerPixel))); + /* Screen Window width in Pixels. + 2D engine uses this value to calculate the linear address in frame buffer for a given point. + */ + write_dpr(accel, DE_WINDOW_WIDTH, + FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) | + FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (dPitch/bytePerPixel))); - /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used. - For mono bitmap, use startBit for X_K1. */ - write_dpr(accel,DE_SOURCE, - FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) | - FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit));//dpr00 + /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used. + For mono bitmap, use startBit for X_K1. */ + write_dpr(accel, DE_SOURCE, + FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | + FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit)); /* dpr00 */ - write_dpr(accel,DE_DESTINATION, - FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) | - FIELD_VALUE(0, DE_DESTINATION, X, dx) | - FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04 + write_dpr(accel, DE_DESTINATION, + FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | + FIELD_VALUE(0, DE_DESTINATION, X, dx) | + FIELD_VALUE(0, DE_DESTINATION, Y, dy)); /* dpr04 */ - write_dpr(accel,DE_DIMENSION, - FIELD_VALUE(0, DE_DIMENSION, X, width) | - FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08 + write_dpr(accel, DE_DIMENSION, + FIELD_VALUE(0, DE_DIMENSION, X, width) | + FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); /* dpr08 */ - write_dpr(accel,DE_FOREGROUND, fColor); - write_dpr(accel,DE_BACKGROUND, bColor); + write_dpr(accel, DE_FOREGROUND, fColor); + write_dpr(accel, DE_BACKGROUND, bColor); de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | @@ -412,26 +375,22 @@ int hw_imageblit(struct lynx_accel *accel, FIELD_SET(0, DE_CONTROL, HOST, MONO) | FIELD_SET(0, DE_CONTROL, STATUS, START); - write_dpr(accel,DE_CONTROL, de_ctrl | deGetTransparency(accel)); + write_dpr(accel, DE_CONTROL, de_ctrl | deGetTransparency(accel)); - /* Write MONO data (line by line) to 2D Engine data port */ - for (i=0; i<height; i++) - { - /* For each line, send the data in chunks of 4 bytes */ - for (j=0; j<(ul4BytesPerScan/4); j++) - { - write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4))); - } + /* Write MONO data (line by line) to 2D Engine data port */ + for (i = 0; i < height; i++) { + /* For each line, send the data in chunks of 4 bytes */ + for (j = 0; j < (ul4BytesPerScan/4); j++) + write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4))); - if (ulBytesRemain) - { - memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain); - write_dpPort(accel, *(unsigned int *)ajRemain); - } + if (ulBytesRemain) { + memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain); + write_dpPort(accel, *(unsigned int *)ajRemain); + } - pSrcbuf += srcDelta; - } + pSrcbuf += srcDelta; + } - return 0; + return 0; } diff --git a/kernel/drivers/staging/sm750fb/sm750_accel.h b/kernel/drivers/staging/sm750fb/sm750_accel.h index 3ee0bd892..f252e47d5 100644 --- a/kernel/drivers/staging/sm750fb/sm750_accel.h +++ b/kernel/drivers/staging/sm750fb/sm750_accel.h @@ -7,7 +7,7 @@ /* notes: below address are the offset value from de_base_address (0x100000)*/ /* for sm718/750/502 de_base is at mmreg_1mb*/ -#define DE_BASE_ADDR_TYPE1 0x100000 +#define DE_BASE_ADDR_TYPE1 0x100000 /* for sm712,de_base is at mmreg_32kb */ #define DE_BASE_ADDR_TYPE2 0x8000 /* for sm722,de_base is at mmreg_0 */ @@ -26,7 +26,7 @@ #define DE_SOURCE_WRAP_ENABLE 1 #define DE_SOURCE_X_K1 29:16 #define DE_SOURCE_Y_K2 15:0 -#define DE_SOURCE_X_K1_MONO 20:16 +#define DE_SOURCE_X_K1_MONO 20:16 #define DE_DESTINATION 0x4 #define DE_DESTINATION_WRAP 31:31 @@ -113,7 +113,7 @@ #define DE_CONTROL_TRANSPARENCY_ENABLE 1 #define DE_CONTROL_ROP 7:0 -// Pseudo fields. +/* Pseudo fields. */ #define DE_CONTROL_SHORT_STROKE_DIR 27:24 #define DE_CONTROL_SHORT_STROKE_DIR_225 0 @@ -234,17 +234,17 @@ #define BOTTOM_TO_TOP 1 #define RIGHT_TO_LEFT 1 -void hw_set2dformat(struct lynx_accel * accel,int fmt); +void hw_set2dformat(struct lynx_accel *accel, int fmt); -void hw_de_init(struct lynx_accel * accel); +void hw_de_init(struct lynx_accel *accel); -int hw_fillrect(struct lynx_accel * accel, - u32 base,u32 pitch,u32 Bpp, - u32 x,u32 y,u32 width,u32 height, - u32 color,u32 rop); +int hw_fillrect(struct lynx_accel *accel, + u32 base, u32 pitch, u32 Bpp, + u32 x, u32 y, u32 width, u32 height, + u32 color, u32 rop); int hw_copyarea( -struct lynx_accel * accel, +struct lynx_accel *accel, unsigned int sBase, /* Address of source: offset in frame buffer */ unsigned int sPitch, /* Pitch value of source surface in BYTE */ unsigned int sx, diff --git a/kernel/drivers/staging/sm750fb/sm750_cursor.c b/kernel/drivers/staging/sm750fb/sm750_cursor.c index 68d5cbc3e..3b7ce9275 100644 --- a/kernel/drivers/staging/sm750fb/sm750_cursor.c +++ b/kernel/drivers/staging/sm750fb/sm750_cursor.c @@ -1,19 +1,19 @@ -#include<linux/module.h> -#include<linux/kernel.h> -#include<linux/errno.h> -#include<linux/string.h> -#include<linux/mm.h> -#include<linux/slab.h> -#include<linux/delay.h> -#include<linux/fb.h> -#include<linux/ioport.h> -#include<linux/init.h> -#include<linux/pci.h> -#include<linux/vmalloc.h> -#include<linux/pagemap.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/ioport.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/vmalloc.h> +#include <linux/pagemap.h> #include <linux/console.h> -#include<linux/platform_device.h> -#include<linux/screen_info.h> +#include <linux/platform_device.h> +#include <linux/screen_info.h> #include "sm750.h" #include "sm750_help.h" @@ -23,8 +23,8 @@ #define PEEK32(addr) \ readl(cursor->mmio + (addr)) -#define POKE32(addr,data) \ -writel((data),cursor->mmio + (addr)) +#define POKE32(addr, data) \ +writel((data), cursor->mmio + (addr)) /* cursor control for voyager and 718/750*/ #define HWC_ADDRESS 0x0 @@ -58,45 +58,47 @@ writel((data),cursor->mmio + (addr)) /* hw_cursor_xxx works for voyager,718 and 750 */ -void hw_cursor_enable(struct lynx_cursor * cursor) +void hw_cursor_enable(struct lynx_cursor *cursor) { u32 reg; - reg = FIELD_VALUE(0,HWC_ADDRESS,ADDRESS,cursor->offset)| - FIELD_SET(0,HWC_ADDRESS,EXT,LOCAL)| - FIELD_SET(0,HWC_ADDRESS,ENABLE,ENABLE); - POKE32(HWC_ADDRESS,reg); + + reg = FIELD_VALUE(0, HWC_ADDRESS, ADDRESS, cursor->offset)| + FIELD_SET(0, HWC_ADDRESS, EXT, LOCAL)| + FIELD_SET(0, HWC_ADDRESS, ENABLE, ENABLE); + POKE32(HWC_ADDRESS, reg); } -void hw_cursor_disable(struct lynx_cursor * cursor) +void hw_cursor_disable(struct lynx_cursor *cursor) { - POKE32(HWC_ADDRESS,0); + POKE32(HWC_ADDRESS, 0); } -void hw_cursor_setSize(struct lynx_cursor * cursor, - int w,int h) +void hw_cursor_setSize(struct lynx_cursor *cursor, + int w, int h) { cursor->w = w; cursor->h = h; } -void hw_cursor_setPos(struct lynx_cursor * cursor, - int x,int y) +void hw_cursor_setPos(struct lynx_cursor *cursor, + int x, int y) { u32 reg; - reg = FIELD_VALUE(0,HWC_LOCATION,Y,y)| - FIELD_VALUE(0,HWC_LOCATION,X,x); - POKE32(HWC_LOCATION,reg); + + reg = FIELD_VALUE(0, HWC_LOCATION, Y, y)| + FIELD_VALUE(0, HWC_LOCATION, X, x); + POKE32(HWC_LOCATION, reg); } -void hw_cursor_setColor(struct lynx_cursor * cursor, - u32 fg,u32 bg) +void hw_cursor_setColor(struct lynx_cursor *cursor, + u32 fg, u32 bg) { - POKE32(HWC_COLOR_12,(fg<<16)|(bg&0xffff)); - POKE32(HWC_COLOR_3,0xffe0); + POKE32(HWC_COLOR_12, (fg<<16)|(bg&0xffff)); + POKE32(HWC_COLOR_3, 0xffe0); } -void hw_cursor_setData(struct lynx_cursor * cursor, - u16 rop,const u8* pcol,const u8* pmsk) +void hw_cursor_setData(struct lynx_cursor *cursor, + u16 rop, const u8 *pcol, const u8 *pmsk) { - int i,j,count,pitch,offset; - u8 color,mask,opr; + int i, j, count, pitch, offset; + u8 color, mask, opr; u16 data; void __iomem *pbuffer, *pstart; @@ -122,36 +124,14 @@ void hw_cursor_setData(struct lynx_cursor * cursor, odd=0; */ - for(i=0;i<count;i++) - { + for (i = 0; i < count; i++) { color = *pcol++; mask = *pmsk++; data = 0; - /* either method below works well, - * but method 2 shows no lag - * and method 1 seems a bit wrong*/ -#if 0 - if(rop == ROP_XOR) - opr = mask ^ color; - else - opr = mask & color; - - for(j=0;j<8;j++) - { - - if(opr & (0x80 >> j)) - { //use fg color,id = 2 - data |= 2 << (j*2); - }else{ - //use bg color,id = 1 - data |= 1 << (j*2); - } - } -#else - for(j=0;j<8;j++){ - if(mask & (0x80>>j)){ - if(rop == ROP_XOR) + for (j = 0; j < 8; j++) { + if (mask & (0x80>>j)) { + if (rop == ROP_XOR) opr = mask ^ color; else opr = mask & color; @@ -160,20 +140,15 @@ void hw_cursor_setData(struct lynx_cursor * cursor, data |= ((opr & (0x80>>j))?2:1)<<(j*2); } } -#endif iowrite16(data, pbuffer); /* assume pitch is 1,2,4,8,...*/ -#if 0 - if(!((i+1)&(pitch-1))) /* below line equal to is line */ -#else - if((i+1) % pitch == 0) -#endif + if ((i+1) % pitch == 0) { /* need a return */ pstart += offset; pbuffer = pstart; - }else{ + } else { pbuffer += sizeof(u16); } @@ -183,10 +158,10 @@ void hw_cursor_setData(struct lynx_cursor * cursor, } -void hw_cursor_setData2(struct lynx_cursor * cursor, - u16 rop,const u8* pcol,const u8* pmsk) +void hw_cursor_setData2(struct lynx_cursor *cursor, + u16 rop, const u8 *pcol, const u8 *pmsk) { - int i,j,count,pitch,offset; + int i, j, count, pitch, offset; u8 color, mask; u16 data; void __iomem *pbuffer, *pstart; @@ -204,46 +179,23 @@ void hw_cursor_setData2(struct lynx_cursor * cursor, pstart = cursor->vstart; pbuffer = pstart; - for(i=0;i<count;i++) - { + for (i = 0; i < count; i++) { color = *pcol++; mask = *pmsk++; data = 0; - /* either method below works well, but method 2 shows no lag */ -#if 0 - if(rop == ROP_XOR) - opr = mask ^ color; - else - opr = mask & color; - - for(j=0;j<8;j++) - { - - if(opr & (0x80 >> j)) - { //use fg color,id = 2 - data |= 2 << (j*2); - }else{ - //use bg color,id = 1 - data |= 1 << (j*2); - } - } -#else - for(j=0;j<8;j++){ - if(mask & (1<<j)) + for (j = 0; j < 8; j++) { + if (mask & (1<<j)) data |= ((color & (1<<j))?1:2)<<(j*2); } -#endif iowrite16(data, pbuffer); /* assume pitch is 1,2,4,8,...*/ - if(!(i&(pitch-1))) - //if((i+1) % pitch == 0) - { + if (!(i&(pitch-1))) { /* need a return */ pstart += offset; pbuffer = pstart; - }else{ + } else { pbuffer += sizeof(u16); } diff --git a/kernel/drivers/staging/sm750fb/sm750_cursor.h b/kernel/drivers/staging/sm750fb/sm750_cursor.h index 8cede0721..6c4fc9b73 100644 --- a/kernel/drivers/staging/sm750fb/sm750_cursor.h +++ b/kernel/drivers/staging/sm750fb/sm750_cursor.h @@ -2,16 +2,16 @@ #define LYNX_CURSOR_H__ /* hw_cursor_xxx works for voyager,718 and 750 */ -void hw_cursor_enable(struct lynx_cursor * cursor); -void hw_cursor_disable(struct lynx_cursor * cursor); -void hw_cursor_setSize(struct lynx_cursor * cursor, - int w,int h); -void hw_cursor_setPos(struct lynx_cursor * cursor, - int x,int y); -void hw_cursor_setColor(struct lynx_cursor * cursor, - u32 fg,u32 bg); -void hw_cursor_setData(struct lynx_cursor * cursor, - u16 rop,const u8* data,const u8* mask); -void hw_cursor_setData2(struct lynx_cursor * cursor, - u16 rop,const u8* data,const u8* mask); +void hw_cursor_enable(struct lynx_cursor *cursor); +void hw_cursor_disable(struct lynx_cursor *cursor); +void hw_cursor_setSize(struct lynx_cursor *cursor, + int w, int h); +void hw_cursor_setPos(struct lynx_cursor *cursor, + int x, int y); +void hw_cursor_setColor(struct lynx_cursor *cursor, + u32 fg, u32 bg); +void hw_cursor_setData(struct lynx_cursor *cursor, + u16 rop, const u8 *data, const u8 *mask); +void hw_cursor_setData2(struct lynx_cursor *cursor, + u16 rop, const u8 *data, const u8 *mask); #endif diff --git a/kernel/drivers/staging/sm750fb/sm750_help.h b/kernel/drivers/staging/sm750fb/sm750_help.h index e0128d2a9..c070cf25a 100644 --- a/kernel/drivers/staging/sm750fb/sm750_help.h +++ b/kernel/drivers/staging/sm750fb/sm750_help.h @@ -1,29 +1,7 @@ #ifndef LYNX_HELP_H__ #define LYNX_HELP_H__ -/*****************************************************************************\ - * FIELD MACROS * -\*****************************************************************************/ - -#define _LSB(f) (0 ? f) -#define _MSB(f) (1 ? f) -#define _COUNT(f) (_MSB(f) - _LSB(f) + 1) - -#define RAW_MASK(f) (0xFFFFFFFF >> (32 - _COUNT(f))) -#define GET_MASK(f) (RAW_MASK(f) << _LSB(f)) -#define GET_FIELD(d,f) (((d) >> _LSB(f)) & RAW_MASK(f)) -#define TEST_FIELD(d,f,v) (GET_FIELD(d,f) == f ## _ ## v) -#define SET_FIELD(d,f,v) (((d) & ~GET_MASK(f)) | \ - (((f ## _ ## v) & RAW_MASK(f)) << _LSB(f))) -#define SET_FIELDV(d,f,v) (((d) & ~GET_MASK(f)) | \ - (((v) & RAW_MASK(f)) << _LSB(f))) - - -//////////////////////////////////////////////////////////////////////////////// -// // -// Internal macros // -// // -//////////////////////////////////////////////////////////////////////////////// +/* Internal macros */ #define _F_START(f) (0 ? f) #define _F_END(f) (1 ? f) #define _F_SIZE(f) (1 + _F_END(f) - _F_START(f)) @@ -31,78 +9,45 @@ #define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f)) #define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f)) - -//////////////////////////////////////////////////////////////////////////////// -// // -// Global macros // -// // -//////////////////////////////////////////////////////////////////////////////// - +/* Global macros */ #define FIELD_GET(x, reg, field) \ ( \ - _F_NORMALIZE((x), reg ## _ ## field) \ + _F_NORMALIZE((x), reg ## _ ## field) \ ) #define FIELD_SET(x, reg, field, value) \ ( \ - (x & ~_F_MASK(reg ## _ ## field)) \ - | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \ + (x & ~_F_MASK(reg ## _ ## field)) \ + | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \ ) #define FIELD_VALUE(x, reg, field, value) \ ( \ - (x & ~_F_MASK(reg ## _ ## field)) \ - | _F_DENORMALIZE(value, reg ## _ ## field) \ + (x & ~_F_MASK(reg ## _ ## field)) \ + | _F_DENORMALIZE(value, reg ## _ ## field) \ ) #define FIELD_CLEAR(reg, field) \ ( \ - ~ _F_MASK(reg ## _ ## field) \ + ~_F_MASK(reg ## _ ## field) \ ) - -//////////////////////////////////////////////////////////////////////////////// -// // -// Field Macros // -// // -//////////////////////////////////////////////////////////////////////////////// - +/* Field Macros */ #define FIELD_START(field) (0 ? field) #define FIELD_END(field) (1 ? field) #define FIELD_SIZE(field) (1 + FIELD_END(field) - FIELD_START(field)) #define FIELD_MASK(field) (((1 << (FIELD_SIZE(field)-1)) | ((1 << (FIELD_SIZE(field)-1)) - 1)) << FIELD_START(field)) -#define FIELD_NORMALIZE(reg, field) (((reg) & FIELD_MASK(field)) >> FIELD_START(field)) -#define FIELD_DENORMALIZE(field, value) (((value) << FIELD_START(field)) & FIELD_MASK(field)) - -#define FIELD_INIT(reg, field, value) FIELD_DENORMALIZE(reg ## _ ## field, \ - reg ## _ ## field ## _ ## value) -#define FIELD_INIT_VAL(reg, field, value) \ - (FIELD_DENORMALIZE(reg ## _ ## field, value)) -#define FIELD_VAL_SET(x, r, f, v) x = x & ~FIELD_MASK(r ## _ ## f) \ - | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) - -#define RGB(r, g, b) \ -( \ - (unsigned long) (((r) << 16) | ((g) << 8) | (b)) \ -) - -#define RGB16(r, g, b) \ -( \ - (unsigned short) ((((r) & 0xF8) << 8) | (((g) & 0xFC) << 3) | (((b) & 0xF8) >> 3)) \ -) -static inline unsigned int absDiff(unsigned int a,unsigned int b) +static inline unsigned int absDiff(unsigned int a, unsigned int b) { - if(a<b) + if (a < b) return b-a; else return a-b; } /* n / d + 1 / 2 = (2n + d) / 2d */ -#define roundedDiv(num,denom) ((2 * (num) + (denom)) / (2 * (denom))) -#define MB(x) ((x)<<20) -#define KB(x) ((x)<<10) +#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom))) #define MHz(x) ((x) * 1000000) diff --git a/kernel/drivers/staging/sm750fb/sm750_hw.c b/kernel/drivers/staging/sm750fb/sm750_hw.c index 9f0d06da1..41822c6c0 100644 --- a/kernel/drivers/staging/sm750fb/sm750_hw.c +++ b/kernel/drivers/staging/sm750fb/sm750_hw.c @@ -1,99 +1,87 @@ #include <linux/version.h> -#include<linux/module.h> -#include<linux/kernel.h> -#include<linux/errno.h> -#include<linux/string.h> -#include<linux/mm.h> -#include<linux/slab.h> -#include<linux/delay.h> -#include<linux/fb.h> -#include<linux/ioport.h> -#include<linux/init.h> -#include<linux/pci.h> -#include<linux/vmalloc.h> -#include<linux/pagemap.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/ioport.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/vmalloc.h> +#include <linux/pagemap.h> #include <linux/console.h> #ifdef CONFIG_MTRR #include <asm/mtrr.h> #endif -#include<linux/platform_device.h> -#include<linux/screen_info.h> +#include <linux/platform_device.h> +#include <linux/screen_info.h> +#include <linux/sizes.h> #include "sm750.h" -#include "sm750_hw.h" #include "ddk750.h" #include "sm750_accel.h" -int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev) +int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) { int ret; - struct sm750_share * spec_share; - - spec_share = container_of(share, struct sm750_share,share); ret = 0; - share->vidreg_start = pci_resource_start(pdev, 1); - share->vidreg_size = MB(2); + sm750_dev->vidreg_start = pci_resource_start(pdev, 1); + sm750_dev->vidreg_size = SZ_2M; - pr_info("mmio phyAddr = %lx\n", share->vidreg_start); + pr_info("mmio phyAddr = %lx\n", sm750_dev->vidreg_start); /* reserve the vidreg space of smi adaptor * if you do this, u need to add release region code * in lynxfb_remove, or memory will not be mapped again * successfully * */ - - if((ret = pci_request_region(pdev, 1, "sm750fb"))) - { + ret = pci_request_region(pdev, 1, "sm750fb"); + if (ret) { pr_err("Can not request PCI regions.\n"); goto exit; } /* now map mmio and vidmem*/ - share->pvReg = ioremap_nocache(share->vidreg_start, share->vidreg_size); - if(!share->pvReg){ + sm750_dev->pvReg = ioremap_nocache(sm750_dev->vidreg_start, + sm750_dev->vidreg_size); + if (!sm750_dev->pvReg) { pr_err("mmio failed\n"); ret = -EFAULT; goto exit; - }else{ - pr_info("mmio virtual addr = %p\n", share->pvReg); + } else { + pr_info("mmio virtual addr = %p\n", sm750_dev->pvReg); } - - share->accel.dprBase = share->pvReg + DE_BASE_ADDR_TYPE1; - share->accel.dpPortBase = share->pvReg + DE_PORT_ADDR_TYPE1; - ddk750_set_mmio(share->pvReg,share->devid, share->revid); + sm750_dev->accel.dprBase = sm750_dev->pvReg + DE_BASE_ADDR_TYPE1; + sm750_dev->accel.dpPortBase = sm750_dev->pvReg + DE_PORT_ADDR_TYPE1; + + ddk750_set_mmio(sm750_dev->pvReg, sm750_dev->devid, sm750_dev->revid); - share->vidmem_start = pci_resource_start(pdev, 0); + sm750_dev->vidmem_start = pci_resource_start(pdev, 0); /* don't use pdev_resource[x].end - resource[x].start to * calculate the resource size,its only the maximum available * size but not the actual size,use - * @hw_sm750_getVMSize function can be safe. + * @ddk750_getVMSize function can be safe. * */ - share->vidmem_size = hw_sm750_getVMSize(share); + sm750_dev->vidmem_size = ddk750_getVMSize(); pr_info("video memory phyAddr = %lx, size = %u bytes\n", - share->vidmem_start, share->vidmem_size); + sm750_dev->vidmem_start, sm750_dev->vidmem_size); /* reserve the vidmem space of smi adaptor */ -#if 0 - if((ret = pci_request_region(pdev,0,_moduleName_))) - { - pr_err("Can not request PCI regions.\n"); - goto exit; - } -#endif - - share->pvMem = ioremap(share->vidmem_start, - share->vidmem_size); - - if(!share->pvMem){ + sm750_dev->pvMem = ioremap_wc(sm750_dev->vidmem_start, + sm750_dev->vidmem_size); + if (!sm750_dev->pvMem) { pr_err("Map video memory failed\n"); ret = -EFAULT; goto exit; - }else{ - pr_info("video memory vaddr = %p\n", share->pvMem); + } else { + pr_info("video memory vaddr = %p\n", sm750_dev->pvMem); } exit: return ret; @@ -101,40 +89,31 @@ exit: -int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) +int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) { - struct sm750_share * spec_share; - struct init_status * parm; - - spec_share = container_of(share, struct sm750_share,share); - parm = &spec_share->state.initParm; - if(parm->chip_clk == 0) - parm->chip_clk = (getChipType() == SM750LE)? + struct init_status *parm; + + parm = &sm750_dev->initParm; + if (parm->chip_clk == 0) + parm->chip_clk = (getChipType() == SM750LE) ? DEFAULT_SM750LE_CHIP_CLOCK : DEFAULT_SM750_CHIP_CLOCK; - if(parm->mem_clk == 0) + if (parm->mem_clk == 0) parm->mem_clk = parm->chip_clk; - if(parm->master_clk == 0) + if (parm->master_clk == 0) parm->master_clk = parm->chip_clk/3; - ddk750_initHw((initchip_param_t *)&spec_share->state.initParm); + ddk750_initHw((initchip_param_t *)&sm750_dev->initParm); /* for sm718,open pci burst */ - if(share->devid == 0x718){ + if (sm750_dev->devid == 0x718) { POKE32(SYSTEM_CTRL, FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON)); } - /* sm750 use sii164, it can be setup with default value - * by on power, so initDVIDisp can be skipped */ -#if 0 - ddk750_initDVIDisp(); -#endif - - if(getChipType() != SM750LE) - { + if (getChipType() != SM750LE) { /* does user need CRT ?*/ - if(spec_share->state.nocrt){ + if (sm750_dev->nocrt) { POKE32(MISC_CTRL, FIELD_SET(PEEK32(MISC_CTRL), MISC_CTRL, @@ -144,7 +123,7 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, VNHN)); - }else{ + } else { POKE32(MISC_CTRL, FIELD_SET(PEEK32(MISC_CTRL), MISC_CTRL, @@ -156,134 +135,108 @@ int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev) DPMS, VPHP)); } - switch (spec_share->state.pnltype){ - case sm750_doubleTFT: - case sm750_24TFT: - case sm750_dualTFT: - POKE32(PANEL_DISPLAY_CTRL, - FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), - PANEL_DISPLAY_CTRL, - TFT_DISP, - spec_share->state.pnltype)); - break; + switch (sm750_dev->pnltype) { + case sm750_doubleTFT: + case sm750_24TFT: + case sm750_dualTFT: + POKE32(PANEL_DISPLAY_CTRL, + FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), + PANEL_DISPLAY_CTRL, + TFT_DISP, + sm750_dev->pnltype)); + break; } - }else{ + } else { /* for 750LE ,no DVI chip initilization makes Monitor no signal */ /* Set up GPIO for software I2C to program DVI chip in the Xilinx SP605 board, in order to have video signal. */ - swI2CInit(0,1); + sm750_sw_i2c_init(0, 1); - /* Customer may NOT use CH7301 DVI chip, which has to be - initialized differently. - */ - if (swI2CReadReg(0xec, 0x4a) == 0x95) - { - /* The following register values for CH7301 are from - Chrontel app note and our experiment. - */ + /* Customer may NOT use CH7301 DVI chip, which has to be + initialized differently. + */ + if (sm750_sw_i2c_read_reg(0xec, 0x4a) == 0x95) { + /* The following register values for CH7301 are from + Chrontel app note and our experiment. + */ pr_info("yes,CH7301 DVI chip found\n"); - swI2CWriteReg(0xec, 0x1d, 0x16); - swI2CWriteReg(0xec, 0x21, 0x9); - swI2CWriteReg(0xec, 0x49, 0xC0); + sm750_sw_i2c_write_reg(0xec, 0x1d, 0x16); + sm750_sw_i2c_write_reg(0xec, 0x21, 0x9); + sm750_sw_i2c_write_reg(0xec, 0x49, 0xC0); pr_info("okay,CH7301 DVI chip setup done\n"); - } } - - /* init 2d engine */ - if(!share->accel_off){ - hw_sm750_initAccel(share); -// share->accel.de_wait = hw_sm750_deWait; } - return 0; -} - - -resource_size_t hw_sm750_getVMSize(struct lynx_share * share) -{ - resource_size_t ret; - - ret = ddk750_getVMSize(); - return ret; -} - - + /* init 2d engine */ + if (!sm750_dev->accel_off) + hw_sm750_initAccel(sm750_dev); -int hw_sm750_output_checkMode(struct lynxfb_output* output, struct fb_var_screeninfo* var) -{ - return 0; } - -int hw_sm750_output_setMode(struct lynxfb_output* output, - struct fb_var_screeninfo* var, struct fb_fix_screeninfo* fix) +int hw_sm750_output_setMode(struct lynxfb_output *output, + struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix) { int ret; disp_output_t dispSet; int channel; - + ret = 0; dispSet = 0; channel = *output->channel; - if(getChipType() != SM750LE){ - if(channel == sm750_primary){ + if (getChipType() != SM750LE) { + if (channel == sm750_primary) { pr_info("primary channel\n"); - if(output->paths & sm750_panel) + if (output->paths & sm750_panel) dispSet |= do_LCD1_PRI; - if(output->paths & sm750_crt) + if (output->paths & sm750_crt) dispSet |= do_CRT_PRI; - }else{ + } else { pr_info("secondary channel\n"); - if(output->paths & sm750_panel) + if (output->paths & sm750_panel) dispSet |= do_LCD1_SEC; - if(output->paths & sm750_crt) + if (output->paths & sm750_crt) dispSet |= do_CRT_SEC; } ddk750_setLogicalDispOut(dispSet); - }else{ + } else { /* just open DISPLAY_CONTROL_750LE register bit 3:0*/ u32 reg; + reg = PEEK32(DISPLAY_CONTROL_750LE); reg |= 0xf; POKE32(DISPLAY_CONTROL_750LE, reg); } - pr_info("ddk setlogicdispout done \n"); + pr_info("ddk setlogicdispout done\n"); return ret; } -void hw_sm750_output_clear(struct lynxfb_output* output) -{ - - return; -} - -int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var) +int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, struct fb_var_screeninfo *var) { - struct lynx_share * share; - - - share = container_of(crtc, struct lynxfb_par,crtc)->share; - - switch (var->bits_per_pixel){ - case 8: - case 16: - break; - case 32: - if (share->revid == SM750LE_REVISION_ID) { - pr_debug("750le do not support 32bpp\n"); - return -EINVAL; - } - break; - default: + struct sm750_dev *sm750_dev; + struct lynxfb_par *par = container_of(crtc, struct lynxfb_par, crtc); + + sm750_dev = par->dev; + + switch (var->bits_per_pixel) { + case 8: + case 16: + break; + case 32: + if (sm750_dev->revid == SM750LE_REVISION_ID) { + pr_debug("750le do not support 32bpp\n"); return -EINVAL; + } + break; + default: + return -EINVAL; } @@ -294,46 +247,44 @@ int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* /* set the controller's mode for @crtc charged with @var and @fix parameters */ -int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, - struct fb_var_screeninfo* var, - struct fb_fix_screeninfo* fix) +int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, + struct fb_var_screeninfo *var, + struct fb_fix_screeninfo *fix) { - int ret,fmt; + int ret, fmt; u32 reg; mode_parameter_t modparm; clock_type_t clock; - struct lynx_share * share; - struct lynxfb_par * par; + struct sm750_dev *sm750_dev; + struct lynxfb_par *par; + - ret = 0; par = container_of(crtc, struct lynxfb_par, crtc); - share = par->share; -#if 1 - if(!share->accel_off){ + sm750_dev = par->dev; + + if (!sm750_dev->accel_off) { /* set 2d engine pixel format according to mode bpp */ - switch(var->bits_per_pixel){ - case 8: - fmt = 0; - break; - case 16: - fmt = 1; - break; - case 32: - default: - fmt = 2; - break; + switch (var->bits_per_pixel) { + case 8: + fmt = 0; + break; + case 16: + fmt = 1; + break; + case 32: + default: + fmt = 2; + break; } - hw_set2dformat(&share->accel, fmt); + hw_set2dformat(&sm750_dev->accel, fmt); } -#endif /* set timing */ -// modparm.pixel_clock = PS_TO_HZ(var->pixclock); modparm.pixel_clock = ps_to_hz(var->pixclock); modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG; modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG; - modparm.clock_phase_polarity = (var->sync& FB_SYNC_COMP_HIGH_ACT) ? POS:NEG; + modparm.clock_phase_polarity = (var->sync & FB_SYNC_COMP_HIGH_ACT) ? POS:NEG; modparm.horizontal_display_end = var->xres; modparm.horizontal_sync_width = var->hsync_len; modparm.horizontal_sync_start = var->xres + var->right_margin; @@ -344,19 +295,19 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, modparm.vertical_total = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; /* choose pll */ - if(crtc->channel != sm750_secondary) + if (crtc->channel != sm750_secondary) clock = PRIMARY_PLL; else clock = SECONDARY_PLL; pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock); ret = ddk750_setModeTiming(&modparm, clock); - if(ret){ + if (ret) { pr_err("Set mode timing failed\n"); goto exit; } - if(crtc->channel != sm750_secondary){ + if (crtc->channel != sm750_secondary) { /* set pitch, offset ,width,start address ,etc... */ POKE32(PANEL_FB_ADDRESS, FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)| @@ -365,14 +316,14 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, reg = var->xres * (var->bits_per_pixel >> 3); /* crtc->channel is not equal to par->index on numeric,be aware of that */ - reg = PADDING(crtc->line_pad,reg); + reg = ALIGN(reg, crtc->line_pad); POKE32(PANEL_FB_WIDTH, FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)| FIELD_VALUE(0, PANEL_FB_WIDTH, OFFSET, fix->line_length)); POKE32(PANEL_WINDOW_WIDTH, - FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres -1)| + FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres - 1)| FIELD_VALUE(0, PANEL_WINDOW_WIDTH, X, var->xoffset)); POKE32(PANEL_WINDOW_HEIGHT, @@ -383,7 +334,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, POKE32(PANEL_PLANE_BR, FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)| - FIELD_VALUE(0, PANEL_PLANE_BR,RIGHT, var->xres - 1)); + FIELD_VALUE(0, PANEL_PLANE_BR, RIGHT, var->xres - 1)); /* set pixel format */ reg = PEEK32(PANEL_DISPLAY_CTRL); @@ -392,12 +343,12 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc, PANEL_DISPLAY_CTRL, FORMAT, (var->bits_per_pixel >> 4) )); - }else{ + } else { /* not implemented now */ POKE32(CRT_FB_ADDRESS, crtc->oScreen); reg = var->xres * (var->bits_per_pixel >> 3); /* crtc->channel is not equal to par->index on numeric,be aware of that */ - reg = PADDING(crtc->line_pad, reg); + reg = ALIGN(reg, crtc->line_pad); POKE32(CRT_FB_WIDTH, FIELD_VALUE(0, CRT_FB_WIDTH, WIDTH, reg)| @@ -415,181 +366,140 @@ exit: return ret; } -void hw_sm750_crtc_clear(struct lynxfb_crtc* crtc) -{ - - return; -} - -int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index, +int hw_sm750_setColReg(struct lynxfb_crtc *crtc, ushort index, ushort red, ushort green, ushort blue) { - static unsigned int add[]={PANEL_PALETTE_RAM,CRT_PALETTE_RAM}; + static unsigned int add[] = {PANEL_PALETTE_RAM, CRT_PALETTE_RAM}; + POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue); return 0; } -int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){ - int dpms,crtdb; - - switch(blank) - { -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_UNBLANK: -#else - case VESA_NO_BLANKING: -#endif - dpms = CRT_DISPLAY_CTRL_DPMS_0; - crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_NORMAL: - dpms = CRT_DISPLAY_CTRL_DPMS_0; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_VSYNC_SUSPEND: -#else - case VESA_VSYNC_SUSPEND: -#endif - dpms = CRT_DISPLAY_CTRL_DPMS_2; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_HSYNC_SUSPEND: -#else - case VESA_HSYNC_SUSPEND: -#endif - dpms = CRT_DISPLAY_CTRL_DPMS_1; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_POWERDOWN: -#else - case VESA_POWERDOWN: -#endif - dpms = CRT_DISPLAY_CTRL_DPMS_3; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; - default: - return -EINVAL; +int hw_sm750le_setBLANK(struct lynxfb_output *output, int blank) +{ + int dpms, crtdb; + + switch (blank) { + case FB_BLANK_UNBLANK: + dpms = CRT_DISPLAY_CTRL_DPMS_0; + crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; + break; + case FB_BLANK_NORMAL: + dpms = CRT_DISPLAY_CTRL_DPMS_0; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_VSYNC_SUSPEND: + dpms = CRT_DISPLAY_CTRL_DPMS_2; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_HSYNC_SUSPEND: + dpms = CRT_DISPLAY_CTRL_DPMS_1; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_POWERDOWN: + dpms = CRT_DISPLAY_CTRL_DPMS_3; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + default: + return -EINVAL; } - if(output->paths & sm750_crt){ + if (output->paths & sm750_crt) { POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms)); POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); } return 0; } -int hw_sm750_setBLANK(struct lynxfb_output* output,int blank) +int hw_sm750_setBLANK(struct lynxfb_output *output, int blank) { unsigned int dpms, pps, crtdb; - + dpms = pps = crtdb = 0; - switch (blank) - { -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_UNBLANK: -#else - case VESA_NO_BLANKING: -#endif - pr_info("flag = FB_BLANK_UNBLANK \n"); - dpms = SYSTEM_CTRL_DPMS_VPHP; - pps = PANEL_DISPLAY_CTRL_DATA_ENABLE; - crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_NORMAL: - pr_info("flag = FB_BLANK_NORMAL \n"); - dpms = SYSTEM_CTRL_DPMS_VPHP; - pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_VSYNC_SUSPEND: -#else - case VESA_VSYNC_SUSPEND: -#endif - dpms = SYSTEM_CTRL_DPMS_VNHP; - pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_HSYNC_SUSPEND: -#else - case VESA_HSYNC_SUSPEND: -#endif - dpms = SYSTEM_CTRL_DPMS_VPHN; - pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) - case FB_BLANK_POWERDOWN: -#else - case VESA_POWERDOWN: -#endif - dpms = SYSTEM_CTRL_DPMS_VNHN; - pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; - crtdb = CRT_DISPLAY_CTRL_BLANK_ON; - break; + switch (blank) { + case FB_BLANK_UNBLANK: + pr_info("flag = FB_BLANK_UNBLANK\n"); + dpms = SYSTEM_CTRL_DPMS_VPHP; + pps = PANEL_DISPLAY_CTRL_DATA_ENABLE; + crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; + break; + case FB_BLANK_NORMAL: + pr_info("flag = FB_BLANK_NORMAL\n"); + dpms = SYSTEM_CTRL_DPMS_VPHP; + pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_VSYNC_SUSPEND: + dpms = SYSTEM_CTRL_DPMS_VNHP; + pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_HSYNC_SUSPEND: + dpms = SYSTEM_CTRL_DPMS_VPHN; + pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; + case FB_BLANK_POWERDOWN: + dpms = SYSTEM_CTRL_DPMS_VNHN; + pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; + crtdb = CRT_DISPLAY_CTRL_BLANK_ON; + break; } - if(output->paths & sm750_crt){ + if (output->paths & sm750_crt) { - POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); - POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb)); + POKE32(SYSTEM_CTRL, FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); + POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); } - if(output->paths & sm750_panel){ + if (output->paths & sm750_panel) POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps)); - } return 0; } -void hw_sm750_initAccel(struct lynx_share * share) +void hw_sm750_initAccel(struct sm750_dev *sm750_dev) { u32 reg; + enable2DEngine(1); - if(getChipType() == SM750LE){ + if (getChipType() == SM750LE) { reg = PEEK32(DE_STATE1); - reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON); - POKE32(DE_STATE1,reg); + reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, ON); + POKE32(DE_STATE1, reg); reg = PEEK32(DE_STATE1); - reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF); + reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, OFF); POKE32(DE_STATE1, reg); - }else{ + } else { /* engine reset */ reg = PEEK32(SYSTEM_CTRL); - reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON); + reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, ON); POKE32(SYSTEM_CTRL, reg); reg = PEEK32(SYSTEM_CTRL); - reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,OFF); + reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, OFF); POKE32(SYSTEM_CTRL, reg); } /* call 2d init */ - share->accel.de_init(&share->accel); + sm750_dev->accel.de_init(&sm750_dev->accel); } int hw_sm750le_deWait(void) { - int i=0x10000000; - while(i--){ + int i = 0x10000000; + + while (i--) { unsigned int dwVal = PEEK32(DE_STATE2); - if((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) && + + if ((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) && (FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) && - (FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY)) - { + (FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY)) { return 0; } } @@ -600,13 +510,14 @@ int hw_sm750le_deWait(void) int hw_sm750_deWait(void) { - int i=0x10000000; - while(i--){ + int i = 0x10000000; + + while (i--) { unsigned int dwVal = PEEK32(SYSTEM_CTRL); - if((FIELD_GET(dwVal,SYSTEM_CTRL,DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) && - (FIELD_GET(dwVal,SYSTEM_CTRL,DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) && - (FIELD_GET(dwVal,SYSTEM_CTRL,DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY)) - { + + if ((FIELD_GET(dwVal, SYSTEM_CTRL, DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) && + (FIELD_GET(dwVal, SYSTEM_CTRL, DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) && + (FIELD_GET(dwVal, SYSTEM_CTRL, DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY)) { return 0; } } @@ -615,28 +526,27 @@ int hw_sm750_deWait(void) } int hw_sm750_pan_display(struct lynxfb_crtc *crtc, - const struct fb_var_screeninfo *var, - const struct fb_info *info) + const struct fb_var_screeninfo *var, + const struct fb_info *info) { - uint32_t total; - //check params - if ((var->xoffset + var->xres > var->xres_virtual) || - (var->yoffset + var->yres > var->yres_virtual)) { - return -EINVAL; - } - - total = var->yoffset * info->fix.line_length + - ((var->xoffset * var->bits_per_pixel) >> 3); - total += crtc->oScreen; - if (crtc->channel == sm750_primary) { - POKE32(PANEL_FB_ADDRESS, - FIELD_VALUE(PEEK32(PANEL_FB_ADDRESS), - PANEL_FB_ADDRESS, ADDRESS, total)); - } else { - POKE32(CRT_FB_ADDRESS, - FIELD_VALUE(PEEK32(CRT_FB_ADDRESS), - CRT_FB_ADDRESS, ADDRESS, total)); - } - return 0; -} + uint32_t total; + /* check params */ + if ((var->xoffset + var->xres > var->xres_virtual) || + (var->yoffset + var->yres > var->yres_virtual)) { + return -EINVAL; + } + total = var->yoffset * info->fix.line_length + + ((var->xoffset * var->bits_per_pixel) >> 3); + total += crtc->oScreen; + if (crtc->channel == sm750_primary) { + POKE32(PANEL_FB_ADDRESS, + FIELD_VALUE(PEEK32(PANEL_FB_ADDRESS), + PANEL_FB_ADDRESS, ADDRESS, total)); + } else { + POKE32(CRT_FB_ADDRESS, + FIELD_VALUE(PEEK32(CRT_FB_ADDRESS), + CRT_FB_ADDRESS, ADDRESS, total)); + } + return 0; +} diff --git a/kernel/drivers/staging/sm750fb/sm750_hw.h b/kernel/drivers/staging/sm750fb/sm750_hw.h deleted file mode 100644 index b05be5e99..000000000 --- a/kernel/drivers/staging/sm750fb/sm750_hw.h +++ /dev/null @@ -1,104 +0,0 @@ -#ifndef LYNX_HW750_H__ -#define LYNX_HW750_H__ - - -#define DEFAULT_SM750_CHIP_CLOCK 290 -#define DEFAULT_SM750LE_CHIP_CLOCK 333 -#ifndef SM750LE_REVISION_ID -#define SM750LE_REVISION_ID (unsigned char)0xfe -#endif - -//#define DEFAULT_MEM_CLOCK (DEFAULT_SM750_CHIP_CLOCK/1) -//#define DEFAULT_MASTER_CLOCK (DEFAULT_SM750_CHIP_CLOCK/3) - - -enum sm750_pnltype{ - - sm750_24TFT = 0,/* 24bit tft */ - - sm750_dualTFT = 2,/* dual 18 bit tft */ - - sm750_doubleTFT = 1,/* 36 bit double pixel tft */ -}; - -/* vga channel is not concerned */ -enum sm750_dataflow{ - sm750_simul_pri,/* primary => all head */ - - sm750_simul_sec,/* secondary => all head */ - - sm750_dual_normal,/* primary => panel head and secondary => crt */ - - sm750_dual_swap,/* primary => crt head and secondary => panel */ -}; - - -enum sm750_channel{ - sm750_primary = 0, - /* enum value equal to the register filed data */ - sm750_secondary = 1, -}; - -enum sm750_path{ - sm750_panel = 1, - sm750_crt = 2, - sm750_pnc = 3,/* panel and crt */ -}; - -struct init_status{ - ushort powerMode; - /* below three clocks are in unit of MHZ*/ - ushort chip_clk; - ushort mem_clk; - ushort master_clk; - ushort setAllEngOff; - ushort resetMemory; -}; - -struct sm750_state{ - struct init_status initParm; - enum sm750_pnltype pnltype; - enum sm750_dataflow dataflow; - int nocrt; - int xLCD; - int yLCD; -}; - -/* sm750_share stands for a presentation of two frame buffer - that use one sm750 adaptor, it is similiar to the super class of lynx_share - in C++ -*/ - -struct sm750_share{ - /* it's better to put lynx_share struct to the first place of sm750_share */ - struct lynx_share share; - struct sm750_state state; - int hwCursor; - /* 0: no hardware cursor - 1: primary crtc hw cursor enabled, - 2: secondary crtc hw cursor enabled - 3: both ctrc hw cursor enabled - */ -}; - -int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev); -int hw_sm750_inithw(struct lynx_share*,struct pci_dev *); -void hw_sm750_initAccel(struct lynx_share *); -int hw_sm750_deWait(void); -int hw_sm750le_deWait(void); - -resource_size_t hw_sm750_getVMSize(struct lynx_share *); -int hw_sm750_output_checkMode(struct lynxfb_output*,struct fb_var_screeninfo*); -int hw_sm750_output_setMode(struct lynxfb_output*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*); -int hw_sm750_crtc_checkMode(struct lynxfb_crtc*,struct fb_var_screeninfo*); -int hw_sm750_crtc_setMode(struct lynxfb_crtc*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*); -int hw_sm750_setColReg(struct lynxfb_crtc*,ushort,ushort,ushort,ushort); -int hw_sm750_setBLANK(struct lynxfb_output*,int); -int hw_sm750le_setBLANK(struct lynxfb_output*,int); -void hw_sm750_crtc_clear(struct lynxfb_crtc*); -void hw_sm750_output_clear(struct lynxfb_output*); -int hw_sm750_pan_display(struct lynxfb_crtc *crtc, - const struct fb_var_screeninfo *var, - const struct fb_info *info); - -#endif |