diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S')
| -rw-r--r-- | kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S new file mode 100644 index 000000000..79adf83e2 --- /dev/null +++ b/kernel/arch/arm/mach-ixp4xx/include/mach/entry-macro.S @@ -0,0 +1,41 @@ +/* + * arch/arm/mach-ixp4xx/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for IXP4xx-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) + ldr \irqstat, [\irqstat] @ get interrupts + cmp \irqstat, #0 + beq 1001f @ upper IRQ? + clz \irqnr, \irqstat + mov \base, #31 + sub \irqnr, \base, \irqnr + b 1002f @ lower IRQ being + @ handled + +1001: + /* + * IXP465/IXP435 has an upper IRQ status register + */ +#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) + ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) + ldr \irqstat, [\irqstat] @ get upper interrupts + mov \irqnr, #63 + clz \irqstat, \irqstat + cmp \irqstat, #32 + subne \irqnr, \irqnr, \irqstat +#endif +1002: + .endm + + |