blob: dd9d366978b4f9b20d1d713d8a012d7c90c5e174 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
|
# Copyright (c) 2016-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#;
[eal options]
-n=4
no-output=no ; disable DPDK debug output
[port 0]
name=if0
mac=hardware
rx desc=2048
tx desc=2048
promiscuous=yes
[port 1]
name=if1
mac=hardware
rx desc=2048
tx desc=2048
promiscuous=yes
[port 2]
name=if2
mac=hardware
rx desc=2048
tx desc=2048
promiscuous=yes
[port 3]
name=if3
mac=hardware
rx desc=2048
tx desc=2048
promiscuous=yes
[defaults]
mempool size=8K
memcache size=512
[global]
start time=5
name=Handle None (4x)
[core 0]
mode=master
[core 1]
name=none
task=0
mode=l2fwd
rx port=if0
tx port=if1
drop=no
[core 2]
name=none
task=0
mode=l2fwd
rx port=if1
tx port=if0
drop=no
[core 3]
name=none
task=0
mode=l2fwd
rx port=if2
tx port=if3
drop=no
[core 4]
name=none
task=0
mode=l2fwd
rx port=if3
tx port=if2
drop=no
|