summaryrefslogtreecommitdiffstats
path: root/samples/vnf_samples/nsut/prox/configs/gen_all-4.cfg
blob: 7a23bf005ad5b7437f681ca65ed39b47c4e0addb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
; Copyright (c) 2017 Intel Corporation
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;      http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.

[eal options]
-n=4 ; force number of memory channels
no-output=no ; disable DPDK debug output

[port 0]
name=p0
mac=70:00:00:00:00:01
[port 1]
name=p1
mac=70:00:00:00:00:02
[port 2]
name=p2
mac=70:00:00:00:00:03
[port 3]
name=p3
mac=70:00:00:00:00:04


[defaults]
mempool size=4K

[global]
start time=5
name=BNG gen
[core 0]
mode=master

[core 1]
name=cpe0
task=0
mode=gen
tx port=p0
bps=1250000000
pkt inline=50 00 00 00 00 01 70 00 00 00 00 01 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 08 55 7b

[core 2]
name=cpe0
task=0
mode=gen
tx port=p1
bps=1250000000
pkt inline=50 00 00 00 00 02 70 00 00 00 00 02 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 08 55 7b

[core 3]
name=cpe0
task=0
mode=gen
tx port=p2
bps=1250000000
pkt inline=50 00 00 00 00 03 70 00 00 00 00 03 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 08 55 7b

[core 4]
name=cpe0
task=0
mode=gen
tx port=p3
bps=1250000000
pkt inline=50 00 00 00 00 04 70 00 00 00 00 04 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 08 55 7b

[core 5]
task=0
mode=lat
rx port=p0
lat pos=42

[core 6]
task=0
mode=lat
rx port=p1
lat pos=42

[core 7]
task=0
mode=lat
rx port=p2
lat pos=42

[core 8]
task=0
mode=lat
rx port=p3
lat pos=42