Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-06-01 | Add cachestat scenario | JingLu5 | 2 | -0/+93 |
2016-05-24 | Merge "add memory_load scenario" | liang gao | 2 | -0/+99 |
2016-05-23 | add memory_load scenario | JingLu5 | 2 | -0/+99 |
2016-05-19 | add support for RAMspeed | JingLu5 | 1 | -0/+239 |
2016-04-08 | add latency for cache read operations(LMBench) | kubi | 1 | -0/+19 |
2016-01-10 | Support run cyclictest on BareMetal | QiLiang | 1 | -81/+78 |
2015-12-26 | add scenario and sample file for Unixbench. | kubi | 1 | -0/+169 |
2015-12-08 | Add scenario for reading processor load | Jo¶rgen Karlsson | 3 | -0/+245 |
2015-10-28 | Extend lmbench scenario to measure memory bandwidth | Kristian Hunt | 1 | -0/+169 |
2015-10-27 | Heat context code refactor part 2 | QiLiang | 1 | -16/+18 |
2015-10-22 | Update sla check for scenarios | houjingwen | 1 | -6/+18 |
2015-10-15 | Add Cyclictest scenario and sample | QiLiang | 2 | -0/+161 |