diff options
Diffstat (limited to 'samples/vnf_samples/nsut/prox/configs')
8 files changed, 712 insertions, 20 deletions
diff --git a/samples/vnf_samples/nsut/prox/configs/gen_buffering-2.cfg b/samples/vnf_samples/nsut/prox/configs/gen_buffering-2.cfg new file mode 100644 index 000000000..962f34a17 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/gen_buffering-2.cfg @@ -0,0 +1,75 @@ +# Copyright (c) 2016-2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 ; number of memory channels +no-output=no ; disable DPDK debug output + +[port 0] +name=p0 +mac=hardware + +[port 1] +name=p1 +mac=hardware + +[defaults] +mempool size=4K + +[variables] +$sut_mac0=@@dst_mac0 +$sut_mac1=@@dst_mac1 + +[global] +start time=5 +name=Buffering gen + +[core 0] +mode=master + +[core 1-4] +name=p0 +task=0 +mode=gen +tx port=p0 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac0} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + +[core 5-8] +name=p1 +task=0 +mode=gen +tx port=p1 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac1} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + +[core 28] +name=P0 +task=0 +mode=lat +rx port=p0 +lat pos=42 + +[core 29] +name=P1 +task=0 +mode=lat +rx port=p1 +lat pos=42 diff --git a/samples/vnf_samples/nsut/prox/configs/gen_buffering-4.cfg b/samples/vnf_samples/nsut/prox/configs/gen_buffering-4.cfg new file mode 100644 index 000000000..9be6297a8 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/gen_buffering-4.cfg @@ -0,0 +1,122 @@ +# Copyright (c) 2016-2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 ; number of memory channels +no-output=no ; disable DPDK debug output + +[port 0] +name=p0 +mac=hardware + +[port 1] +name=p1 +mac=hardware + +[port 2] +name=p2 +mac=hardware + +[port 3] +name=p3 +mac=hardware + + +[defaults] +mempool size=4K + +[variables] +$sut_mac0=@@dst_mac0 +$sut_mac1=@@dst_mac1 +$sut_mac2=@@dst_mac2 +$sut_mac3=@@dst_mac3 + +[global] +start time=5 +name=Buffering gen + +[core 0] +mode=master + +[core 1-4] +name=p0 +task=0 +mode=gen +tx port=p0 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac0} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + +[core 5-8] +name=p1 +task=0 +mode=gen +tx port=p1 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac1} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + + +[core 9-12] +name=p2 +task=0 +mode=gen +tx port=p2 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac2} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + + +[core 13-16] +name=p3 +task=0 +mode=gen +tx port=p3 +bps=1250000000 +; Ethernet + IP + UDP +pkt inline=${sut_mac3} 70 00 00 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 0c 55 7b 42 43 44 45 +lat pos=42 + +[core 28] +name=P0 +task=0 +mode=lat +rx port=p0 +lat pos=42 + +[core 29] +name=P1 +task=0 +mode=lat +rx port=p1 +lat pos=42 + +[core 30] +name=P2 +task=0 +mode=lat +rx port=p2 +lat pos=42 + +[core 31] +name=P3 +task=0 +mode=lat +rx port=p3 +lat pos=42 diff --git a/samples/vnf_samples/nsut/prox/configs/gen_lb-2.cfg b/samples/vnf_samples/nsut/prox/configs/gen_lb-2.cfg new file mode 100644 index 000000000..c86b5f063 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/gen_lb-2.cfg @@ -0,0 +1,114 @@ +# Copyright (c) 2016-2017 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 ; force number of memory channels +no-output=no ; disable DPDK debug output + +[variables] +$sut_mac0=@@dst_mac0 +$sut_mac1=@@dst_mac1 + +[port 0] +name=p0 +mac=hardware +rx desc=4096 +tx desc=4096 +promiscuous=yes + +[port 1] +name=p1 +mac=hardware +rx desc=4096 +tx desc=1024 +promiscuous=yes + + +[defaults] +mempool size=16K + +[global] +start time=5 +name=Gen Load Balancing + +[core 0] +mode=master + +[core 1-4] +name=p0 +task=0 +mode=gen +tx port=p0 +bps=1250000000 +; Ethernet + IP + pseudo-UDP +pkt inline=${sut_mac0} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 +; src_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=26 +; dst_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=30 +; sport: [0..31] +; dport: [0..31] +random=00000000000XXXXX00000000000XXXXX +rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 5-8] +name=p1 +task=0 +mode=gen +tx port=p1 +bps=1250000000 +; Ethernet + IP + pseudo-UDP +pkt inline=${sut_mac1} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 +; src_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=26 +; dst_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=30 +; sport: [0..31] +; dport: [0..31] +random=00000000000XXXXX00000000000XXXXX +rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 28] +name=rec_0 +task=0 +mode=lat +rx port=p0 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 29] +name=rec_1 +task=0 +mode=lat +rx port=p1 +lat pos=42 +signature pos=46 +signature=0xcafedeca + + + + diff --git a/samples/vnf_samples/nsut/prox/configs/gen_lb-4.cfg b/samples/vnf_samples/nsut/prox/configs/gen_lb-4.cfg index 4ac4f94d7..6a2d3f95a 100644 --- a/samples/vnf_samples/nsut/prox/configs/gen_lb-4.cfg +++ b/samples/vnf_samples/nsut/prox/configs/gen_lb-4.cfg @@ -20,6 +20,9 @@ no-output=no ; disable DPDK debug output [variables] $sut_mac0=@@dst_mac0 +$sut_mac1=@@dst_mac1 +$sut_mac2=@@dst_mac2 +$sut_mac3=@@dst_mac3 [port 0] name=p0 @@ -59,14 +62,14 @@ name=Gen Load Balancing [core 0] mode=master -[core 1] +[core 1-4] name=p0 task=0 mode=gen tx port=p0 bps=1250000000 ; Ethernet + IP + pseudo-UDP -pkt inline=${sut_mac0} 70 00 00 00 00 01 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d 00 00 00 01 00 00 00 02 13 88 13 88 00 08 55 7b +pkt inline=${sut_mac0} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 ; src_ip: 10.x.x.x random=101000000000XXXX0000XXXX000XXXXX rand_offset=26 @@ -77,29 +80,111 @@ rand_offset=30 ; dport: [0..31] random=00000000000XXXXX00000000000XXXXX rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca -[core 2] -name=p0 +[core 5-8] +name=p1 task=0 -mode=nop +mode=gen +tx port=p1 +bps=1250000000 +; Ethernet + IP + pseudo-UDP +pkt inline=${sut_mac1} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 +; src_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=26 +; dst_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=30 +; sport: [0..31] +; dport: [0..31] +random=00000000000XXXXX00000000000XXXXX +rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 9-12] +name=p2 +task=0 +mode=gen +tx port=p2 +bps=1250000000 +; Ethernet + IP + pseudo-UDP +pkt inline=${sut_mac1} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 +; src_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=26 +; dst_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=30 +; sport: [0..31] +; dport: [0..31] +random=00000000000XXXXX00000000000XXXXX +rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 13-16] +name=p3 +task=0 +mode=gen +tx port=p3 +bps=1250000000 +; Ethernet + IP + pseudo-UDP +pkt inline=${sut_mac1} 3c fd fe 9f a3 08 08 00 45 00 00 24 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 13 88 13 88 00 10 55 7b 00 01 02 03 04 05 06 07 +; src_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=26 +; dst_ip: 10.x.x.x +random=101000000000XXXX0000XXXX000XXXXX +rand_offset=30 +; sport: [0..31] +; dport: [0..31] +random=00000000000XXXXX00000000000XXXXX +rand_offset=34 +lat pos=42 +signature pos=46 +signature=0xcafedeca + +[core 28] +name=rec_0 +task=0 +mode=lat rx port=p0 +lat pos=42 +signature pos=46 +signature=0xcafedeca -[core 3] -name=p1 +[core 29] +name=rec_1 task=0 -mode=nop +mode=lat rx port=p1 +lat pos=42 +signature pos=46 +signature=0xcafedeca -[core 4] -name=p2 +[core 30] +name=rec_2 task=0 -mode=nop +mode=lat rx port=p2 +lat pos=42 +signature pos=46 +signature=0xcafedeca -[core 5] -name=p3 +[core 31] +name=rec_3 task=0 -mode=nop +mode=lat rx port=p3 +lat pos=42 +signature pos=46 +signature=0xcafedeca + diff --git a/samples/vnf_samples/nsut/prox/configs/handle_buffering-2.cfg b/samples/vnf_samples/nsut/prox/configs/handle_buffering-2.cfg new file mode 100644 index 000000000..14763c336 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/handle_buffering-2.cfg @@ -0,0 +1,74 @@ +# Copyright (c) 2016-2017 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 ; number of memory channels +no-output=no ; disable DPDK debug output + +[port 0] +name=if0 +mac=hardware +rx desc=2048 +tx desc=2048 + +[port 1] +name=if1 +mac=hardware +rx desc=2048 +tx desc=2048 + +[defaults] +mempool size=1408K +memcache size=512 + +[global] +start time=5 +name=Handle Buffering (1x) + +[core 0] +mode=master + +[core 1] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if0 +tx cores=1t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p0 +rx ring=yes +tx port=if0 +drop=no + +[core 2] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if1 +tx cores=2t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p1 +rx ring=yes +tx port=if1 +drop=no
\ No newline at end of file diff --git a/samples/vnf_samples/nsut/prox/configs/handle_buffering-4.cfg b/samples/vnf_samples/nsut/prox/configs/handle_buffering-4.cfg new file mode 100644 index 000000000..c4fa46f89 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/handle_buffering-4.cfg @@ -0,0 +1,118 @@ +# Copyright (c) 2016-2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 ; number of memory channels +no-output=no ; disable DPDK debug output + +[port 0] +name=if0 +mac=hardware +rx desc=2048 +tx desc=2048 + +[port 1] +name=if1 +mac=hardware +rx desc=2048 +tx desc=2048 + +[port 2] +name=if2 +mac=hardware +rx desc=2048 +tx desc=2048 + +[port 3] +name=if3 +mac=hardware +rx desc=2048 +tx desc=2048 + +[defaults] +mempool size=640K +memcache size=512 + +[global] +start time=5 +name=Handle Buffering (1x) + +[core 0] +mode=master + +[core 1] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if0 +tx cores=1t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p0 +rx ring=yes +tx port=if0 +drop=no + +[core 2] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if1 +tx cores=2t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p1 +rx ring=yes +tx port=if1 +drop=no + +[core 3] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if2 +tx cores=3t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p2 +rx ring=yes +tx port=if2 +drop=no + +[core 4] +name=none +task=0 +mode=impair +delay ms=125 +rx port=if3 +tx cores=4t1 +drop=no + +task=1 +mode=l2fwd +dst mac=@@tester_p3 +rx ring=yes +tx port=if3 +drop=no
\ No newline at end of file diff --git a/samples/vnf_samples/nsut/prox/configs/handle_lb-2.cfg b/samples/vnf_samples/nsut/prox/configs/handle_lb-2.cfg new file mode 100644 index 000000000..18ae9f4f9 --- /dev/null +++ b/samples/vnf_samples/nsut/prox/configs/handle_lb-2.cfg @@ -0,0 +1,81 @@ +# Copyright (c) 2016-2017 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#; + +[eal options] +-n=4 +no-output=no ; disable DPDK debug output + +[lua] +dofile("tuples.lua") + +[port 0] +name=if0 +mac=hardware +rx desc=4096 +tx desc=2048 +promiscuous=yes + +[port 1] +name=if1 +mac=hardware +rx desc=2048 +tx desc=2048 +promiscuous=yes + +[defaults] +memcache size=512 +mempool size=16K + +[global] +start time=5 +name=Handle 5 Tuple Load Balance + +[core 0] +mode=master + +[core 1] +name=Handle_LB +task=0 +mode=lb5tuple +rx port=if0 +tx cores=3,4,3,4 +drop=no + +[core 2] +name=Handle_LB +task=0 +mode=lb5tuple +rx port=if1 +tx cores=3,4,3,4 +drop=no + +[core 3] +name=TX_p0 +task=0 +mode=l2fwd +dst mac=@@p0 +rx ring=yes +tx port=if0 +drop=no + +[core 4] +name=TX_p1 +task=0 +mode=l2fwd +dst mac=@@p1 +rx ring=yes +tx port=if1 +drop=no diff --git a/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg b/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg index b85e00b5c..233a88522 100644 --- a/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg +++ b/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg @@ -50,13 +50,12 @@ tx desc=2048 promiscuous=yes [defaults] -mempool size=13K memcache size=512 mempool size=16K [global] start time=5 -name=Handle 5 Tuple Load Balance 1-to-4 +name=Handle 5 Tuple Load Balance [core 0] mode=master @@ -66,10 +65,34 @@ name=Handle_LB task=0 mode=lb5tuple rx port=if0 -tx cores=2,3,4,5 +tx cores=5,6,7,8 drop=no [core 2] +name=Handle_LB +task=0 +mode=lb5tuple +rx port=if1 +tx cores=5,6,7,8 +drop=no + +[core 3] +name=Handle_LB +task=0 +mode=lb5tuple +rx port=if2 +tx cores=5,6,7,8 +drop=no + +[core 4] +name=Handle_LB +task=0 +mode=lb5tuple +rx port=if3 +tx cores=5,6,7,8 +drop=no + +[core 5] name=TX_p0 task=0 mode=l2fwd @@ -78,7 +101,7 @@ rx ring=yes tx port=if0 drop=no -[core 3] +[core 6] name=TX_p1 task=0 mode=l2fwd @@ -87,7 +110,7 @@ rx ring=yes tx port=if1 drop=no -[core 4] +[core 7] name=TX_p2 task=0 mode=l2fwd @@ -96,7 +119,7 @@ rx ring=yes tx port=if2 drop=no -[core 5] +[core 8] name=TX_p3 task=0 mode=l2fwd |