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authorVolodymyr Mytnyk <volodymyrx.mytnyk@intel.com>2019-01-10 15:46:03 +0000
committerGerrit Code Review <gerrit@opnfv.org>2019-01-10 15:46:03 +0000
commit12046179b57451908ab290393bd6fa85a6288c23 (patch)
tree10957239c06c95e4657003f4aababb2b9cbc55c9 /samples/vnf_samples/traffic_profiles
parent5f55fd0ac16ee37a5b4a55c74cc4f5020a35da54 (diff)
parent0b908d5d0b0e77c366f39f258f0a3f6a54bfe304 (diff)
Merge "Add IxNetwork L3 scenario implementation"
Diffstat (limited to 'samples/vnf_samples/traffic_profiles')
-rw-r--r--samples/vnf_samples/traffic_profiles/ixia_ipv4_latency_L3.yaml64
1 files changed, 64 insertions, 0 deletions
diff --git a/samples/vnf_samples/traffic_profiles/ixia_ipv4_latency_L3.yaml b/samples/vnf_samples/traffic_profiles/ixia_ipv4_latency_L3.yaml
new file mode 100644
index 000000000..e7221b1f7
--- /dev/null
+++ b/samples/vnf_samples/traffic_profiles/ixia_ipv4_latency_L3.yaml
@@ -0,0 +1,64 @@
+# Copyright (c) 2018 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+{% set vports = get(extra_args, 'vports', '2') %}
+---
+schema: "nsb:traffic_profile:0.1"
+
+# This file is a template, it will be filled with values from tc.yaml before passing to the traffic generator
+
+name: rfc2544
+description: Traffic profile to run RFC2544 latency with L3 support
+traffic_profile:
+ traffic_type : IXIARFC2544Profile # defines traffic behavior - constant or look for highest possible throughput
+ frame_rate : 100 # pc of linerate
+ duration: {{ duration }}
+ enable_latency: True
+
+{% for vport in range(vports|int) %}
+uplink_{{ vport }}:
+ ipv4:
+ id: {{ (vport * 2) + 1 }}
+ outer_l2:
+ framesize:
+ 64B: "{{get(imix, 'imix.uplink.64B', '0') }}"
+ 128B: "{{get(imix, 'imix.uplink.128B', '0') }}"
+ 256B: "{{get(imix, 'imix.uplink.256B', '0') }}"
+ 373b: "{{get(imix, 'imix.uplink.373B', '0') }}"
+ 512B: "{{get(imix, 'imix.uplink.512B', '0') }}"
+ 570B: "{{get(imix, 'imix.uplink.570B', '0') }}"
+ 1024B: "{{get(imix, 'imix.uplink.1024B', '0') }}"
+ 1280B: "{{get(imix, 'imix.uplink.1280B', '0') }}"
+ 1400B: "{{get(imix, 'imix.uplink.1400B', '0') }}"
+ 1500B: "{{get(imix, 'imix.uplink.1500B', '0') }}"
+ 1518B: "{{get(imix, 'imix.uplink.1518B', '0') }}"
+
+downlink_{{vport}}:
+ ipv4:
+ id: {{ (vport * 2) + 2 }}
+ outer_l2:
+ framesize:
+ 64B: "{{get(imix, 'imix.downlink.64B', '0') }}"
+ 128B: "{{get(imix, 'imix.downlink.128B', '0') }}"
+ 256B: "{{get(imix, 'imix.downlink.256B', '0') }}"
+ 373b: "{{get(imix, 'imix.downlink.373B', '0') }}"
+ 512B: "{{get(imix, 'imix.downlink.512B', '0') }}"
+ 570B: "{{get(imix, 'imix.downlink.570B', '0') }}"
+ 1024B: "{{get(imix, 'imix.downlink.1024B', '0') }}"
+ 1280B: "{{get(imix, 'imix.downlink.1280B', '0') }}"
+ 1400B: "{{get(imix, 'imix.downlink.1400B', '0') }}"
+ 1500B: "{{get(imix, 'imix.downlink.1500B', '0') }}"
+ 1518B: "{{get(imix, 'imix.downlink.1518B', '0') }}"
+{% endfor %}