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authorRoss Brattain <ross.b.brattain@intel.com>2017-09-28 17:13:34 +0000
committerGerrit Code Review <gerrit@opnfv.org>2017-09-28 17:13:34 +0000
commit0db868278e13d21998bd677bfc782557d44ab381 (patch)
treeda68d24711262194f1d2a4f4753c1ea1a290b453 /samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg
parentab4ee807fae82dc0b426dfdc562a72ed71ca18e0 (diff)
parentce9b1175dd9e382c623ee91755b1943eaf0e6cdb (diff)
Merge "Addition of Prox NSB BNG and BNG-QoS test"
Diffstat (limited to 'samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg')
-rw-r--r--samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg167
1 files changed, 167 insertions, 0 deletions
diff --git a/samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg b/samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg
new file mode 100644
index 000000000..e602fac11
--- /dev/null
+++ b/samples/vnf_samples/nsut/prox/configs/handle_bng-4.cfg
@@ -0,0 +1,167 @@
+# Copyright (c) 2016-2017 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+[lua]
+lpm4 = dofile("ipv4.lua")
+user_table = dofile("gre_table.lua")
+
+[eal options]
+-n=4 ; $sut_memory_channels
+no-output=no ; disable DPDK debug output
+
+[variables]
+$master =0
+$core_lb_cpe0 =1
+$core_inet0 =2
+$core_lb_cpe1 =3
+$core_inet1 =4
+$core_workers =13-14,15-16
+$core_tx_cpe0 =6
+$core_tx_cpe1 =8
+$core_tx_inet0 =9
+$core_tx_inet1 =11
+$core_cpe1 =12
+
+[port 0]
+name=cpe0
+mac=hardware
+rx desc=2048
+tx desc=2048
+[port 1]
+name=inet0
+mac=hardware
+rx desc=2048
+tx desc=2048
+[port 2]
+name=cpe1
+mac=hardware
+rx desc=2048
+tx desc=2048
+[port 3]
+name=inet1
+mac=hardware
+rx desc=2048
+tx desc=2048
+
+[defaults]
+mempool size=142K
+memcache size=512
+qinq tag=0xa888
+
+[global]
+start time=20
+name=BNG
+
+[core $master]
+mode=master
+
+; IPv4
+;*****************************************************************************************
+;##### Load Balancing receiving from CPE and from Internet ####
+[core $core_lb_cpe0]
+name=LB-cpe
+task=0
+mode=lbqinq
+rx port=cpe0
+tx cores=(${core_workers})t0 proto=ipv4
+tx cores=(${core_workers})t0 proto=arp
+drop=no
+
+[core $core_inet0]
+name=LB-inet
+task=0
+mode=lbnetwork
+rx port=inet0
+untag mpls=yes
+tx cores=(${core_workers})t1 proto=ipv4
+drop=no
+
+[core $core_lb_cpe1]
+name=LB-cpe
+task=0
+mode=lbqinq
+rx port=cpe1
+tx cores=(${core_workers})t0 proto=ipv4
+tx cores=(${core_workers})t0 proto=arp
+drop=no
+
+[core $core_inet1]
+name=LB-inet
+task=0
+mode=lbnetwork
+rx port=inet1
+untag mpls=yes
+tx cores=(${core_workers})t1 proto=ipv4
+drop=no
+
+[core $core_tx_cpe0]
+name=LB-cpe
+task=0
+mode=nop
+rx ring=yes
+tx port=cpe0
+drop=no
+
+[core $core_tx_inet0]
+name=LB-cpe
+task=0
+mode=nop
+rx ring=yes
+tx port=inet0
+drop=no
+
+[core $core_tx_cpe1]
+name=LB-cpe
+task=0
+mode=nop
+rx ring=yes
+tx port=cpe1
+drop=no
+
+[core $core_tx_inet1]
+name=LB-cpe
+task=0
+mode=nop
+rx ring=yes
+tx port=inet1
+drop=no
+
+
+;*****************************************************************************************
+;#### Workers receiving from LB
+;#### Task 0: QinQ decapsulation + gre encapsulation + routing
+;#### Task 1: ARP
+;#### Task 2: GRE depcapsulation + QinQ encapsulation + use learned mac
+[core $core_workers]
+name=Worker
+task=0
+mode=qinqdecapv4
+rx ring=yes
+tx cores from routing table=${core_tx_inet0},${core_tx_inet1}
+drop=no
+route table=lpm4
+local ipv4=21.22.23.24
+handle arp=yes
+user table=user_table
+fast path handle arp=yes
+
+task=1
+mode=qinqencapv4
+rx ring=yes ; gre received from internal queue
+tx cores from cpe table=${core_tx_cpe0},${core_tx_cpe1} remap=cpe0,cpe1
+drop=no
+user table=user_table
+
+;