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authorDanielMartinBuckley <daniel.m.buckley@intel.com>2017-09-05 19:39:23 +0100
committerRoss Brattain <ross.b.brattain@intel.com>2017-09-25 08:30:20 -0700
commit5295078171b9c7436f945b081d3015e1052bf721 (patch)
tree66b243e578e63d8dd74076107da74a0ea7c2a2ec /samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg
parent89cff47eab737ffd39a043a5e34309d6f926d1d7 (diff)
Addition of PROX NSB tests to yardstick
JIRA: YARDSTICK-802 Addition of PROX L2FWD_Multiflow, ACL, Load Balancing plus grafana dashboards Supports 2 and 4 port Baremetal & Heat Change-Id: I1f3990d5451de265ee3901302569c355ece3b146 Signed-off-by: Daniel Martin Buckley <daniel.m.buckley@intel.com>
Diffstat (limited to 'samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg')
-rw-r--r--samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg16
1 files changed, 10 insertions, 6 deletions
diff --git a/samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg b/samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg
index 51a1f8f2e..88551b29f 100644
--- a/samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg
+++ b/samples/vnf_samples/nsut/prox/configs/handle_acl-4.cfg
@@ -43,11 +43,11 @@ tx desc=2048
[defaults]
mempool size=65K
memcache size=512
-qinq tag=0xa888
+qinq tag="0xa888"
[global]
start time=5
-name=ACL handle
+name=ACL handle x4
[core 0]
task=0
@@ -63,10 +63,11 @@ rx port=if0
tx cores=1t1
drop=no
+name=l2fwd_if0
task=1
mode=l2fwd
-dst mac=00:00:00:00:00:01
rx ring=yes
+dst mac=@@tester_p0
tx port=if0
drop=no
@@ -80,10 +81,11 @@ rx port=if1
tx cores=2t1
drop=no
+name=l2fwd_if1
task=1
mode=l2fwd
-dst mac=00:00:00:00:00:02
rx ring=yes
+dst mac=@@tester_p1
tx port=if1
drop=no
@@ -97,10 +99,11 @@ rx port=if2
tx cores=3t1
drop=no
+name=l2fwd_if2
task=1
mode=l2fwd
-dst mac=00:00:00:00:00:03
rx ring=yes
+dst mac=@@tester_p2
tx port=if2
drop=no
@@ -114,9 +117,10 @@ rx port=if3
tx cores=4t1
drop=no
+name=l2fwd_if3
task=1
mode=l2fwd
-dst mac=00:00:00:00:00:04
rx ring=yes
+dst mac=@@tester_p3
tx port=if3
drop=no