diff options
| author |   Abhijit Sinha <abhijit.sinha@intel.com> | 2018-10-30 16:19:30 +0000 |
|---|---|---|
| committer |   Gerrit Code Review <gerrit@opnfv.org> | 2018-10-30 16:19:30 +0000 |
| commit | 83732e72649e123f3b6ada4da7de864ca550dba3 (patch) | |
| tree | 36a92cdd2e056762d9db816b5d4a67c9c706ffce /samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg | |
| parent | b09b9dd3d55a489620f9bb129eb2ddde49009b56 (diff) | |
| parent | b57b85a3dc513fb6580eb6074ffbc44ef8a64663 (diff) | |
Merge "Fix latency for ACL test cases" into stable/gambia
Diffstat (limited to 'samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg')
| -rw-r--r-- | samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg b/samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg index 816bb3297..bf49cd484 100644 --- a/samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg +++ b/samples/vnf_samples/nsut/prox/configs/gen_acl-2.cfg @@ -38,7 +38,7 @@ $qinq_tag_inline="88 a8" [global] start time=5 -name=Basic Gen +name=Basic ACL Gen x2 [core 0] mode=master @@ -50,7 +50,7 @@ mode=gen tx port=p0 bps=625000000 ; Ethernet + QinQ + IP + UDP -pkt inline=${sut_mac0} 70 00 00 00 00 01 ${qinq_tag_inline} 00 01 81 00 00 01 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 08 7c 21 FFFFFFFF +pkt inline=${sut_mac0} 70 00 00 00 00 01 ${qinq_tag_inline} 00 01 81 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 0c 7c 21 50 51 52 53 ; svlan: [0,1] random=000000000000000X rand_offset=14 @@ -72,7 +72,6 @@ random=000000000000XXX00000000XXXXXXXXX rand_offset=42 lat pos=50 - [core 2] name=p1 task=0 @@ -80,7 +79,7 @@ mode=gen tx port=p1 bps=625000000 ; Ethernet + QinQ + IP + UDP -pkt inline=${sut_mac1} 70 00 00 00 00 02 ${qinq_tag_inline} 00 01 81 00 00 01 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 08 7c 21 FFFFFFFF +pkt inline=${sut_mac1} 70 00 00 00 00 02 ${qinq_tag_inline} 00 01 81 00 00 01 08 00 45 00 00 20 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 0c 7c 21 50 51 52 53 ; svlan: [0,1] random=000000000000000X rand_offset=14 @@ -107,10 +106,12 @@ name=rec 0 task=0 mode=lat rx port=p0 +lat pos=50 [core 4] name=rec 1 task=0 mode=lat rx port=p1 +lat pos=50 |