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authorXavier Simonart <xavier.simonart@intel.com>2018-02-14 15:32:53 +0100
committerXavier Simonart <xavier.simonart@intel.com>2018-02-14 16:56:30 +0100
commit89566a29278fbef60ca14cba76b2ca6c1a57c32c (patch)
tree63fa8fd0b18bf508d235387720f2ececa81dd2ff /ansible/roles/vcpu_pin_set_reset
parent4e5893873d684069e57b2ef91a75b446bb319d56 (diff)
BugFix: Fix to pod context filename
The "context:file" of tc_prox_baremetal_lw_aftr has an incorrect path, compaired to all other prox test cases. Change-Id: Id24e74905f36bc84fdf93d1a2966211ecad55c8b Signed-off-by: Xavier Simonart <xavier.simonart@intel.com>
Diffstat (limited to 'ansible/roles/vcpu_pin_set_reset')
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