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| author |   Abhijit Sinha <abhijit.sinha@intel.com> | 2018-10-12 15:38:50 +0000 |
|---|---|---|
| committer |   Gerrit Code Review <gerrit@opnfv.org> | 2018-10-12 15:38:50 +0000 |
| commit | ae1e33ac7cfbad4b9a37329152ac4a42903a44d5 (patch) | |
| tree | f25c00068f093e517d48027256248ecc23476f67 /ansible/roles/vcpu_pin_set_reset | |
| parent | 26fa6904c58b9f748507876db1bdae2b864268e6 (diff) | |
| parent | adcc29e56130f0f047b99528ce72b6f149643da7 (diff) | |
Merge "Configure n_rxq DPDK port option when adding the port"
Diffstat (limited to 'ansible/roles/vcpu_pin_set_reset')
0 files changed, 0 insertions, 0 deletions