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| author |   Ross Brattain <ross.b.brattain@intel.com> | 2017-09-12 09:57:38 -0700 |
|---|---|---|
| committer |   Edward MacGillivray <edward.s.macgillivray@intel.com> | 2017-09-18 10:30:58 -0700 |
| commit | ae0cdbea1100a09d0c46191dd7e5d8d5eec8d484 (patch) | |
| tree | 0649b8b464c4c7379eed8e05976eaa7c836f990e /ansible/cpu_pin_setup.yaml | |
| parent | 468aeaf9fe6a5cd0d350f566ed7b9216efc752b6 (diff) | |
NSB: count from 0, vnf_0, tg_9, private->uplink, public->downlink
Also rename private to uplink, public to downlink
for scale-out template we need to count from 0
so we can use range() without +1/-1 errors
vnf_0, vnf_1
tg_0, tg_1
also fix Ixia defaults
Change-Id: I6aecfbb95f99af20f012a9df19c19be77d1b5b77
Signed-off-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Edward MacGillivray <edward.s.macgillivray@intel.com>
Diffstat (limited to 'ansible/cpu_pin_setup.yaml')
0 files changed, 0 insertions, 0 deletions