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authorMaryam Tahhan <maryam.tahhan@intel.com>2016-05-04 13:58:03 +0000
committerGerrit Code Review <gerrit@172.30.200.206>2016-05-04 13:58:03 +0000
commit6c888fd41de8889891c163d4757099aec84b34d8 (patch)
treed780aa2cbfab7a03c4532a6861610d21826c1ae5 /core
parenta4587f0127ccc93daba3696c5a1ec4f169f9d394 (diff)
parent47875a6f01fa9dc1738d4c4a29ad75e12e251077 (diff)
Merge "bidirectional value: Fix inconsistency for bidir param"
Diffstat (limited to 'core')
-rw-r--r--core/vswitch_controller_pvp.py2
-rw-r--r--core/vswitch_controller_pvvp.py2
2 files changed, 2 insertions, 2 deletions
diff --git a/core/vswitch_controller_pvp.py b/core/vswitch_controller_pvp.py
index 0c98cc7f..a4f61961 100644
--- a/core/vswitch_controller_pvp.py
+++ b/core/vswitch_controller_pvp.py
@@ -77,7 +77,7 @@ class VswitchControllerPVP(IVswitchController):
self._vswitch.add_flow(bridge, flow1)
self._vswitch.add_flow(bridge, flow2)
- if self._traffic['bidir']:
+ if self._traffic['bidir'] == 'True':
flow3 = add_ports_to_flow(flow_template, phy2_number,
vport2_number)
flow4 = add_ports_to_flow(flow_template, vport1_number,
diff --git a/core/vswitch_controller_pvvp.py b/core/vswitch_controller_pvvp.py
index c79ad9a3..729aca3f 100644
--- a/core/vswitch_controller_pvvp.py
+++ b/core/vswitch_controller_pvvp.py
@@ -82,7 +82,7 @@ class VswitchControllerPVVP(IVswitchController):
self._vswitch.add_flow(bridge, flow2)
self._vswitch.add_flow(bridge, flow3)
- if self._traffic['bidir']:
+ if self._traffic['bidir'] == 'True':
flow4 = add_ports_to_flow(flow_template, phy2_number,
vport4_number)
flow5 = add_ports_to_flow(flow_template, vport3_number,