| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-11-25 | Data Reporting Gate |   Mark Beierl | 2 | -0/+60 |
| 2016-08-24 | Slope error |   Mark Beierl | 1 | -0/+6 |
| 2016-07-15 | Add Steady State Detection module |   Tim Rault | 5 | -36/+228 |
| 2016-07-14 | Separation of test and source | Mark Beierl | 15 | -0/+887 |
| 2015-11-23 | Adding workload modules | mbeierl | 4 | -1014/+0 |
| 2015-10-15 | Logging and timestamp | mbeierl | 1 | -8/+837 |
| 2015-10-15 | Creation of converters | mbeierl | 1 | -0/+120 |
| 2015-10-15 | Created converters | mbeierl | 3 | -0/+65 |
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