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authorzhihui wu <wu.zhihui1@zte.com.cn>2016-11-08 08:47:49 +0000
committerGerrit Code Review <gerrit@opnfv.org>2016-11-08 08:47:49 +0000
commit72443baf2aeac22313e81f69c069df64192b71ef (patch)
treed7b4ccb09d813555808e91e480757b032b5f3a78
parent9c1b742e31cdd40dc6af77147bf71d0053d3a0b4 (diff)
parent9aa19e5f0eac7aeedd539d2705670fb2fc7ad1af (diff)
Merge "Add spec for time line diagram"
-rw-r--r--docs/designspec/dashboard.rst16
1 files changed, 16 insertions, 0 deletions
diff --git a/docs/designspec/dashboard.rst b/docs/designspec/dashboard.rst
index 555b3a24..60c4720d 100644
--- a/docs/designspec/dashboard.rst
+++ b/docs/designspec/dashboard.rst
@@ -133,3 +133,19 @@ A draft design is as following::
| HIDE COMMON|
+------------+
+Time line
+---------
+
+Time line diagram for analysis of time critical performance test::
+
+ +-----------------+-----------+-------------+-------------+-----+
+ | | | | | |
+ +-----------------> | | | |
+ | +-----------> | | |
+ | ? ms +-------------> | |
+ | ? ms +------------>+ |
+ | ? ms ? ms |
+ | |
+ +---------------------------------------------------------------+
+
+The time cost between checkpoints shall be displayed in the diagram.