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| author |   shangxdy <shang.xiaodong@zte.com.cn> | 2017-08-29 12:45:34 +0800 |
|---|---|---|
| committer | shangxdy <shang.xiaodong@zte.com.cn> | 2017-08-29 12:45:34 +0800 |
| commit | 7407c6c4cb09a80ec35a48716d4436ff98aba23f (patch) | |
| tree | f2adc6dc812952123493b9b734196828ed83cf1f /verigraph | |
| parent | d66af1c9113ec897049a55b80ca70496651502b7 (diff) | |
Add parameter validation in design time
Add validation for SDC from ONAP when use parse in design time: ignore
parameter validation and only print warning message.
JIRA: PARSER-142
Change-Id: I9372f20816f2acbda83c5f1e4f673f2ffc3c2e94
Signed-off-by: shangxdy <shang.xiaodong@zte.com.cn>
Diffstat (limited to 'verigraph')
0 files changed, 0 insertions, 0 deletions